Marshall Dawson | eb72487 | 2019-07-16 15:46:35 -0600 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
| 2 | |
| 3 | #include <acpi/acpigen.h> |
John Zhao | f6f1f73 | 2020-06-26 10:00:02 -0700 | [diff] [blame] | 4 | #include <assert.h> |
Marshall Dawson | eb72487 | 2019-07-16 15:46:35 -0600 | [diff] [blame] | 5 | #include <cbmem.h> |
| 6 | #include <console/console.h> |
| 7 | #include <cpu/amd/msr.h> |
| 8 | #include <cpu/amd/mtrr.h> |
| 9 | #include <device/device.h> |
| 10 | #include <device/pci.h> |
| 11 | #include <device/pci_ids.h> |
| 12 | #include <fsp/util.h> |
| 13 | #include <stdint.h> |
Furquan Shaikh | bc45650 | 2020-06-10 16:37:23 -0700 | [diff] [blame] | 14 | #include <soc/memmap.h> |
Marshall Dawson | 39c64b0 | 2020-09-04 12:07:27 -0600 | [diff] [blame] | 15 | #include <soc/iomap.h> |
Marshall Dawson | eb72487 | 2019-07-16 15:46:35 -0600 | [diff] [blame] | 16 | |
Furquan Shaikh | bc45650 | 2020-06-10 16:37:23 -0700 | [diff] [blame] | 17 | /* |
| 18 | * |
| 19 | * +--------------------------------+ |
| 20 | * | | |
| 21 | * | | |
| 22 | * | | |
| 23 | * | | |
| 24 | * | | |
| 25 | * | | |
| 26 | * | | |
| 27 | * reserved_dram_end +--------------------------------+ |
| 28 | * | | |
| 29 | * | verstage (if reqd) | |
| 30 | * | (VERSTAGE_SIZE) | |
| 31 | * +--------------------------------+ VERSTAGE_ADDR |
| 32 | * | | |
| 33 | * | FSP-M | |
| 34 | * | (FSP_M_SIZE) | |
| 35 | * +--------------------------------+ FSP_M_ADDR |
| 36 | * | |X86_RESET_VECTOR = ROMSTAGE_ADDR + ROMSTAGE_SIZE - 0x10 |
| 37 | * | romstage | |
| 38 | * | (ROMSTAGE_SIZE) | |
| 39 | * +--------------------------------+ ROMSTAGE_ADDR |
| 40 | * | bootblock | |
| 41 | * | (C_ENV_BOOTBLOCK_SIZE) | |
| 42 | * +--------------------------------+ BOOTBLOCK_ADDR |
| 43 | * | Unused hole | |
| 44 | * | (86KiB) | |
| 45 | * +--------------------------------+ |
| 46 | * | FMAP cache (FMAP_SIZE) | |
| 47 | * +--------------------------------+ PSP_SHAREDMEM_BASE + PSP_SHAREDMEM_SIZE + PRERAM_CBMEM_CONSOLE_SIZE + 0x200 |
| 48 | * | Early Timestamp region (512B) | |
| 49 | * +--------------------------------+ PSP_SHAREDMEM_BASE + PSP_SHAREDMEM_SIZE + PRERAM_CBMEM_CONSOLE_SIZE |
| 50 | * | Preram CBMEM console | |
| 51 | * | (PRERAM_CBMEM_CONSOLE_SIZE) | |
| 52 | * +--------------------------------+ PSP_SHAREDMEM_BASE + PSP_SHAREDMEM_SIZE |
| 53 | * | PSP shared (vboot workbuf) | |
| 54 | * | (PSP_SHAREDMEM_SIZE) | |
| 55 | * +--------------------------------+ PSP_SHAREDMEM_BASE |
| 56 | * | APOB (64KiB) | |
| 57 | * +--------------------------------+ PSP_APOB_DRAM_ADDRESS |
| 58 | * | Early BSP stack | |
| 59 | * | (EARLYRAM_BSP_STACK_SIZE) | |
| 60 | * reserved_dram_start +--------------------------------+ EARLY_RESERVED_DRAM_BASE |
| 61 | * | DRAM | |
| 62 | * +--------------------------------+ 0x100000 |
| 63 | * | Option ROM | |
| 64 | * +--------------------------------+ 0xc0000 |
| 65 | * | Legacy VGA | |
| 66 | * +--------------------------------+ 0xa0000 |
| 67 | * | DRAM | |
| 68 | * +--------------------------------+ 0x0 |
| 69 | */ |
Marshall Dawson | eb72487 | 2019-07-16 15:46:35 -0600 | [diff] [blame] | 70 | static void read_resources(struct device *dev) |
| 71 | { |
| 72 | uint32_t mem_usable = (uintptr_t)cbmem_top(); |
| 73 | unsigned int idx = 0; |
| 74 | const struct hob_header *hob = fsp_get_hob_list(); |
| 75 | const struct hob_resource *res; |
Marshall Dawson | 39c64b0 | 2020-09-04 12:07:27 -0600 | [diff] [blame] | 76 | struct resource *gnb_apic; |
Marshall Dawson | eb72487 | 2019-07-16 15:46:35 -0600 | [diff] [blame] | 77 | |
Furquan Shaikh | bc45650 | 2020-06-10 16:37:23 -0700 | [diff] [blame] | 78 | uintptr_t early_reserved_dram_start, early_reserved_dram_end; |
| 79 | const struct memmap_early_dram *e = memmap_get_early_dram_usage(); |
| 80 | |
| 81 | early_reserved_dram_start = e->base; |
| 82 | early_reserved_dram_end = e->base + e->size; |
| 83 | |
Marshall Dawson | eb72487 | 2019-07-16 15:46:35 -0600 | [diff] [blame] | 84 | /* 0x0 - 0x9ffff */ |
| 85 | ram_resource(dev, idx++, 0, 0xa0000 / KiB); |
| 86 | |
| 87 | /* 0xa0000 - 0xbffff: legacy VGA */ |
| 88 | mmio_resource(dev, idx++, 0xa0000 / KiB, 0x20000 / KiB); |
| 89 | |
| 90 | /* 0xc0000 - 0xfffff: Option ROM */ |
| 91 | reserved_ram_resource(dev, idx++, 0xc0000 / KiB, 0x40000 / KiB); |
| 92 | |
Furquan Shaikh | bc45650 | 2020-06-10 16:37:23 -0700 | [diff] [blame] | 93 | /* 1MB - bottom of DRAM reserved for early coreboot usage */ |
| 94 | ram_resource(dev, idx++, (1 * MiB) / KiB, |
| 95 | (early_reserved_dram_start - (1 * MiB)) / KiB); |
| 96 | |
| 97 | /* DRAM reserved for early coreboot usage */ |
| 98 | reserved_ram_resource(dev, idx++, early_reserved_dram_start / KiB, |
| 99 | (early_reserved_dram_end - early_reserved_dram_start) / KiB); |
| 100 | |
| 101 | /* top of DRAM consumed early - low top usable RAM |
| 102 | * cbmem_top() accounts for low UMA and TSEG if they are used. */ |
| 103 | ram_resource(dev, idx++, early_reserved_dram_end / KiB, |
| 104 | (mem_usable - early_reserved_dram_end) / KiB); |
Marshall Dawson | eb72487 | 2019-07-16 15:46:35 -0600 | [diff] [blame] | 105 | |
| 106 | mmconf_resource(dev, MMIO_CONF_BASE); |
| 107 | |
| 108 | if (!hob) { |
| 109 | printk(BIOS_ERR, "Error: %s incomplete because no HOB list was found\n", |
| 110 | __func__); |
| 111 | return; |
| 112 | } |
| 113 | |
| 114 | for (; hob->type != HOB_TYPE_END_OF_HOB_LIST; hob = fsp_next_hob(hob)) { |
| 115 | |
| 116 | if (hob->type != HOB_TYPE_RESOURCE_DESCRIPTOR) |
| 117 | continue; |
| 118 | |
| 119 | res = fsp_hob_header_to_resource(hob); |
| 120 | |
| 121 | if (res->type == EFI_RESOURCE_SYSTEM_MEMORY && res->addr < mem_usable) |
| 122 | continue; /* 0 through low usable was set above */ |
| 123 | if (res->type == EFI_RESOURCE_MEMORY_MAPPED_IO) |
| 124 | continue; /* Done separately */ |
| 125 | |
| 126 | if (res->type == EFI_RESOURCE_SYSTEM_MEMORY) |
| 127 | ram_resource(dev, idx++, res->addr / KiB, res->length / KiB); |
| 128 | else if (res->type == EFI_RESOURCE_MEMORY_RESERVED) |
| 129 | reserved_ram_resource(dev, idx++, res->addr / KiB, res->length / KiB); |
| 130 | else |
| 131 | printk(BIOS_ERR, "Error: failed to set resources for type %d\n", |
| 132 | res->type); |
| 133 | } |
Marshall Dawson | 39c64b0 | 2020-09-04 12:07:27 -0600 | [diff] [blame] | 134 | |
| 135 | /* GNB IOAPIC resource */ |
| 136 | gnb_apic = new_resource(dev, GNB_IO_APIC_ADDR); |
| 137 | gnb_apic->base = GNB_IO_APIC_ADDR; |
| 138 | gnb_apic->size = 0x00001000; |
| 139 | gnb_apic->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED; |
Marshall Dawson | eb72487 | 2019-07-16 15:46:35 -0600 | [diff] [blame] | 140 | } |
| 141 | |
| 142 | /* Used by \_SB.PCI0._CRS */ |
| 143 | static void root_complex_fill_ssdt(const struct device *device) |
| 144 | { |
| 145 | msr_t msr; |
John Zhao | f6f1f73 | 2020-06-26 10:00:02 -0700 | [diff] [blame] | 146 | const char *scope; |
Marshall Dawson | eb72487 | 2019-07-16 15:46:35 -0600 | [diff] [blame] | 147 | |
John Zhao | f6f1f73 | 2020-06-26 10:00:02 -0700 | [diff] [blame] | 148 | assert(device); |
Felix Held | 3858fb1 | 2020-06-27 15:11:36 +0200 | [diff] [blame] | 149 | |
John Zhao | f6f1f73 | 2020-06-26 10:00:02 -0700 | [diff] [blame] | 150 | scope = acpi_device_scope(device); |
| 151 | assert(scope); |
| 152 | acpigen_write_scope(scope); |
Marshall Dawson | eb72487 | 2019-07-16 15:46:35 -0600 | [diff] [blame] | 153 | |
| 154 | msr = rdmsr(TOP_MEM); |
| 155 | acpigen_write_name_dword("TOM1", msr.lo); |
| 156 | msr = rdmsr(TOP_MEM2); |
| 157 | /* |
| 158 | * Since XP only implements parts of ACPI 2.0, we can't use a qword |
| 159 | * here. |
| 160 | * See http://www.acpi.info/presentations/S01USMOBS169_OS%2520new.ppt |
| 161 | * slide 22ff. |
| 162 | * Shift value right by 20 bit to make it fit into 32bit, |
| 163 | * giving us 1MB granularity and a limit of almost 4Exabyte of memory. |
| 164 | */ |
| 165 | acpigen_write_name_dword("TOM2", (msr.hi << 12) | msr.lo >> 20); |
| 166 | acpigen_pop_len(); |
| 167 | } |
| 168 | |
| 169 | static struct device_operations root_complex_operations = { |
| 170 | .read_resources = read_resources, |
| 171 | .enable_resources = pci_dev_enable_resources, |
| 172 | .acpi_fill_ssdt = root_complex_fill_ssdt, |
| 173 | }; |
| 174 | |
| 175 | static const struct pci_driver family17_root_complex __pci_driver = { |
| 176 | .ops = &root_complex_operations, |
| 177 | .vendor = PCI_VENDOR_ID_AMD, |
| 178 | .device = PCI_DEVICE_ID_AMD_17H_MODEL_101F_NB, |
| 179 | }; |