blob: 3b98cbb6a16bbd8ce1ca20b38cbda08f8a04d20f [file] [log] [blame]
Frank Vibrans69da1b62011-02-14 19:04:45 +00001#*****************************************************************************
Patrick Georgi472efa62012-02-16 20:44:20 +01002#
Frank Vibrans69da1b62011-02-14 19:04:45 +00003# This file is part of the coreboot project.
Patrick Georgi472efa62012-02-16 20:44:20 +01004#
Frank Vibrans69da1b62011-02-14 19:04:45 +00005# Copyright (C) 2011 Advanced Micro Devices, Inc.
Patrick Georgi472efa62012-02-16 20:44:20 +01006#
Frank Vibrans69da1b62011-02-14 19:04:45 +00007# This program is free software; you can redistribute it and/or modify
8# it under the terms of the GNU General Public License as published by
9# the Free Software Foundation; version 2 of the License.
Patrick Georgi472efa62012-02-16 20:44:20 +010010#
Frank Vibrans69da1b62011-02-14 19:04:45 +000011# This program is distributed in the hope that it will be useful,
12# but WITHOUT ANY WARRANTY; without even the implied warranty of
13# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14# GNU General Public License for more details.
Patrick Georgi472efa62012-02-16 20:44:20 +010015#
Frank Vibrans69da1b62011-02-14 19:04:45 +000016# You should have received a copy of the GNU General Public License
17# along with this program; if not, write to the Free Software
18# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
19#*****************************************************************************
20
21entries
22
23#start-bit length config config-ID name
24#0 8 r 0 seconds
25#8 8 r 0 alarm_seconds
26#16 8 r 0 minutes
27#24 8 r 0 alarm_minutes
28#32 8 r 0 hours
29#40 8 r 0 alarm_hours
30#48 8 r 0 day_of_week
31#56 8 r 0 day_of_month
32#64 8 r 0 month
33#72 8 r 0 year
34#80 4 r 0 rate_select
35#84 3 r 0 REF_Clock
36#87 1 r 0 UIP
37#88 1 r 0 auto_switch_DST
38#89 1 r 0 24_hour_mode
39#90 1 r 0 binary_values_enable
40#91 1 r 0 square-wave_out_enable
41#92 1 r 0 update_finished_enable
42#93 1 r 0 alarm_interrupt_enable
43#94 1 r 0 periodic_interrupt_enable
44#95 1 r 0 disable_clock_updates
45#96 288 r 0 temporary_filler
460 384 r 0 reserved_memory
47384 1 e 4 boot_option
48385 1 e 4 last_boot
49386 1 e 1 ECC_memory
50388 4 r 0 reboot_bits
51392 3 e 5 baud_rate
52395 1 e 1 hw_scrubber
53396 1 e 1 interleave_chip_selects
54397 2 e 8 max_mem_clock
55399 1 e 2 multi_core
56400 1 e 1 power_on_after_fail
57412 4 e 6 debug_level
58416 4 e 7 boot_first
59420 4 e 7 boot_second
60424 4 e 7 boot_third
61428 4 h 0 boot_index
62432 8 h 0 boot_countdown
63440 4 e 9 slow_cpu
64444 1 e 1 nmi
65445 1 e 1 iommu
66728 256 h 0 user_data
67984 16 h 0 check_sum
68# Reserve the extended AMD configuration registers
691000 24 r 0 amd_reserved
70
71
72
73enumerations
74
75#ID value text
761 0 Disable
771 1 Enable
782 0 Enable
792 1 Disable
804 0 Fallback
814 1 Normal
825 0 115200
835 1 57600
845 2 38400
855 3 19200
865 4 9600
875 5 4800
885 6 2400
895 7 1200
906 6 Notice
916 7 Info
926 8 Debug
936 9 Spew
947 0 Network
957 1 HDD
967 2 Floppy
977 8 Fallback_Network
987 9 Fallback_HDD
997 10 Fallback_Floppy
100#7 3 ROM
1018 0 400Mhz
1028 1 333Mhz
1038 2 266Mhz
1048 3 200Mhz
1059 0 off
1069 1 87.5%
1079 2 75.0%
1089 3 62.5%
1099 4 50.0%
1109 5 37.5%
1119 6 25.0%
1129 7 12.5%
113
114checksums
115
116checksum 392 983 984
117
118