blob: 7364a75411711c83ebb5abfd2cfae975581e0fc4 [file] [log] [blame]
Stefan Reinauer4885daa2011-04-26 23:47:04 +00001/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright (C) 2011 Google Inc
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
Stefan Reinauer4885daa2011-04-26 23:47:04 +000014 */
15
16#include <device/device.h>
17#include <device/pci_def.h>
18#include <device/pci.h>
19#include <device/pci_ids.h>
20#include <console/console.h>
Kyösti Mälkki2b95da02014-02-15 10:19:23 +020021#include <console/uart.h>
Stefan Reinauer4885daa2011-04-26 23:47:04 +000022#include <arch/io.h>
Stefan Reinauer4885daa2011-04-26 23:47:04 +000023
Elyes HAOUASa26c1532018-05-02 22:02:45 +020024static void oxford_oxpcie_enable(struct device *dev)
Stefan Reinauer4885daa2011-04-26 23:47:04 +000025{
26 printk(BIOS_DEBUG, "Initializing Oxford OXPCIe952\n");
27
28 struct resource *res = find_resource(dev, 0x10);
29 if (!res) {
30 printk(BIOS_WARNING, "OXPCIe952: No UART resource found.\n");
31 return;
32 }
Kyösti Mälkki8517f942015-03-12 11:33:14 +020033 void *bar0 = res2mmio(res, 0, 0);
Stefan Reinauer4885daa2011-04-26 23:47:04 +000034
35 printk(BIOS_DEBUG, "OXPCIe952: Class=%x Revision ID=%x\n",
Kyösti Mälkki8517f942015-03-12 11:33:14 +020036 (read32(bar0) >> 8), (read32(bar0) & 0xff));
Stefan Reinauer4885daa2011-04-26 23:47:04 +000037 printk(BIOS_DEBUG, "OXPCIe952: %d UARTs detected.\n",
Kyösti Mälkki8517f942015-03-12 11:33:14 +020038 (read32(bar0 + 4) & 3));
Marc Jones48c6bae2012-07-02 22:31:22 -060039 printk(BIOS_DEBUG, "OXPCIe952: UART BAR: 0x%x\n", (u32)res->base);
Stefan Reinauer4885daa2011-04-26 23:47:04 +000040}
41
Stefan Reinauerdfab0f62011-05-10 12:54:56 -070042
43static void oxford_oxpcie_set_resources(struct device *dev)
44{
45 pci_dev_set_resources(dev);
46
Stefan Reinauerdfab0f62011-05-10 12:54:56 -070047 /* Re-initialize OXPCIe base address after set_resources */
Kyösti Mälkki2b95da02014-02-15 10:19:23 +020048 u32 mmio_base = pci_read_config32(dev, PCI_BASE_ADDRESS_0);
49 oxford_remap(mmio_base & ~0xf);
Stefan Reinauerdfab0f62011-05-10 12:54:56 -070050}
51
Stefan Reinauer4885daa2011-04-26 23:47:04 +000052static struct device_operations oxford_oxpcie_ops = {
53 .read_resources = pci_dev_read_resources,
Stefan Reinauerdfab0f62011-05-10 12:54:56 -070054 .set_resources = oxford_oxpcie_set_resources,
Stefan Reinauer4885daa2011-04-26 23:47:04 +000055 .enable_resources = pci_dev_enable_resources,
56 .init = oxford_oxpcie_enable,
57 .scan_bus = 0,
58};
59
60static const struct pci_driver oxford_oxpcie_driver __pci_driver = {
61 .ops = &oxford_oxpcie_ops,
62 .vendor = 0x1415,
63 .device = 0xc158,
64};
Stefan Reinauera6087d12011-05-09 15:19:29 -070065
66static const struct pci_driver oxford_oxpcie_driver_2 __pci_driver = {
67 .ops = &oxford_oxpcie_ops,
68 .vendor = 0x1415,
69 .device = 0xc11b,
70};