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review.coreboot.org / coreboot / 44e4a4e4db23677c960591d3209004f4f8b80326 / . / src / mainboard / supermicro / h8scm_fam10 / acpi_tables.c
blob: 08910cc4c23443d87108567f0fd017c7d40fbdb8 [file] [log] [blame]
Zheng Bao910f4ca2011-03-28 04:38:14 +0000[diff] [blame]1/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright (C) 2010 Advanced Micro Devices, Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
Zheng Bao910f4ca2011-03-28 04:38:14 +0000[diff] [blame]14 */
15
16#include <console/console.h>
17#include <string.h>
18#include <arch/acpi.h>
19#include <arch/ioapic.h>
20#include <device/pci.h>
21#include <device/pci_ids.h>
22#include <cpu/x86/msr.h>
23#include <cpu/amd/mtrr.h>
24#include <cpu/amd/amdfam10_sysconf.h>
25
26#include "mb_sysconf.h"
27
Zheng Bao910f4ca2011-03-28 04:38:14 +0000[diff] [blame]28unsigned long acpi_fill_madt(unsigned long current)
29{
30 device_t dev;
31 u32 dword;
32 u32 gsi_base=0;
33 /* create all subtables for processors */
34 current = acpi_create_madt_lapics(current);
35
36 /* Write SB700 IOAPIC, only one */
37 current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *) current, 2,
38 IO_APIC_ADDR, gsi_base);
39 /* IOAPIC on rs5690 */
40 gsi_base += 24; /* SB700 has 24 IOAPIC entries. */
41 dev = dev_find_slot(0, PCI_DEVFN(0, 0));
42 if (dev) {
43 pci_write_config32(dev, 0xF8, 0x1);
44 dword = pci_read_config32(dev, 0xFC) & 0xfffffff0;
45 current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *) current, 2+1,
46 dword, gsi_base);
47 }
48
49
50 current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *)
51 current, 0, 0, 2, 0);
52 current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *)
53 current, 0, 9, 9, 0xF);
54 /* 0: mean bus 0--->ISA */
55 /* 0: PIC 0 */
56 /* 2: APIC 2 */
Kyösti Mälkkid8747572014-06-26 05:30:54 +0300[diff] [blame]57 /* 5 mean: 0101 --> Edge-triggered, Active high */
Zheng Bao910f4ca2011-03-28 04:38:14 +0000[diff] [blame]58
59 /* create all subtables for processors */
60 /* current = acpi_create_madt_lapic_nmis(current, 5, 1); */
61 /* 1: LINT1 connect to NMI */
62
63 return current;
64}
Timothy Pearson44e4a4e2015-08-11 17:49:06 -0500[diff] [blame^]65
66unsigned long acpi_fill_ivrs_ioapic(acpi_ivrs_t* ivrs, unsigned long current)
67{
68 uint8_t *p;
69
70 uint32_t apicid_sp5100;
71 uint32_t apicid_sr5650;
72
73 apicid_sp5100 = 0x20;
74 apicid_sr5650 = apicid_sp5100 + 1;
75
76 /* Describe NB IOAPIC */
77 p = (uint8_t *)current;
78 p[0] = 0x48; /* Entry type */
79 p[1] = 0; /* Device */
80 p[2] = 0; /* Bus */
81 p[3] = 0x0; /* Data */
82 p[4] = apicid_sr5650; /* IOAPIC ID */
83 p[5] = 0x1; /* Device 0 Function 1 */
84 p[6] = 0x0; /* Northbridge bus */
85 p[7] = 0x1; /* Variety */
86 current += 8;
87
88 /* Describe SB IOAPIC */
89 p = (uint8_t *)current;
90 p[0] = 0x48; /* Entry type */
91 p[1] = 0; /* Device */
92 p[2] = 0; /* Bus */
93 p[3] = 0xd7; /* Data */
94 p[4] = apicid_sp5100; /* IOAPIC ID */
95 p[5] = 0x14 << 3; /* Device 0x14 Function 0 */
96 p[6] = 0x0; /* Southbridge bus */
97 p[7] = 0x1; /* Variety */
98 current += 8;
99
100 return current;
101}