Subrata Banik | 20fe24b | 2021-12-09 02:46:38 +0530 | [diff] [blame] | 1 | /** @file |
| 2 | Support for the PCI Express 4.0 standard. |
| 3 | |
| 4 | This header file may not define all structures. Please extend as required. |
| 5 | |
| 6 | Copyright (c) 2018, American Megatrends, Inc. All rights reserved.<BR> |
| 7 | Copyright (c) 2020, Intel Corporation. All rights reserved.<BR> |
| 8 | SPDX-License-Identifier: BSD-2-Clause-Patent |
| 9 | |
| 10 | **/ |
| 11 | |
| 12 | #ifndef _PCIEXPRESS40_H_ |
| 13 | #define _PCIEXPRESS40_H_ |
| 14 | |
| 15 | #include <IndustryStandard/PciExpress31.h> |
| 16 | |
| 17 | #pragma pack(1) |
| 18 | |
| 19 | /// The Physical Layer PCI Express Extended Capability definitions. |
| 20 | /// |
| 21 | /// Based on section 7.7.5 of PCI Express Base Specification 4.0. |
| 22 | ///@{ |
| 23 | #define PCI_EXPRESS_EXTENDED_CAPABILITY_PHYSICAL_LAYER_16_0_ID 0x0026 |
| 24 | #define PCI_EXPRESS_EXTENDED_CAPABILITY_PHYSICAL_LAYER_16_0_VER1 0x1 |
| 25 | |
| 26 | // Register offsets from Physical Layer PCI-E Ext Cap Header |
| 27 | #define PCI_EXPRESS_REG_PHYSICAL_LAYER_16_0_CAPABILITIES_OFFSET 0x04 |
| 28 | #define PCI_EXPRESS_REG_PHYSICAL_LAYER_16_0_CONTROL_OFFSET 0x08 |
| 29 | #define PCI_EXPRESS_REG_PHYSICAL_LAYER_16_0_STATUS_OFFSET 0x0C |
| 30 | #define PCI_EXPRESS_REG_PHYSICAL_LAYER_16_0_LOCAL_DATA_PARITY_STATUS_OFFSET 0x10 |
| 31 | #define PCI_EXPRESS_REG_PHYSICAL_LAYER_16_0_FIRST_RETIMER_DATA_PARITY_STATUS_OFFSET 0x14 |
| 32 | #define PCI_EXPRESS_REG_PHYSICAL_LAYER_16_0_SECOND_RETIMER_DATA_PARITY_STATUS_OFFSET 0x18 |
| 33 | #define PCI_EXPRESS_REG_PHYSICAL_LAYER_16_0_LANE_EQUALIZATION_CONTROL_OFFSET 0x20 |
| 34 | |
| 35 | typedef union { |
| 36 | struct { |
| 37 | UINT32 Reserved : 32; // Reserved bit 0:31 |
| 38 | } Bits; |
| 39 | UINT32 Uint32; |
| 40 | } PCI_EXPRESS_REG_PHYSICAL_LAYER_16_0_CAPABILITIES; |
| 41 | |
| 42 | typedef union { |
| 43 | struct { |
| 44 | UINT32 Reserved : 32; // Reserved bit 0:31 |
| 45 | } Bits; |
| 46 | UINT32 Uint32; |
| 47 | } PCI_EXPRESS_REG_PHYSICAL_LAYER_16_0_CONTROL; |
| 48 | |
| 49 | typedef union { |
| 50 | struct { |
| 51 | UINT32 EqualizationComplete : 1; // bit 0 |
| 52 | UINT32 EqualizationPhase1Success : 1; // bit 1 |
| 53 | UINT32 EqualizationPhase2Success : 1; // bit 2 |
| 54 | UINT32 EqualizationPhase3Success : 1; // bit 3 |
| 55 | UINT32 LinkEqualizationRequest : 1; // bit 4 |
| 56 | UINT32 Reserved : 27; // Reserved bit 5:31 |
| 57 | } Bits; |
| 58 | UINT32 Uint32; |
| 59 | } PCI_EXPRESS_REG_PHYSICAL_LAYER_16_0_STATUS; |
| 60 | |
| 61 | typedef union { |
| 62 | struct { |
| 63 | UINT8 DownstreamPortTransmitterPreset : 4; //bit 0..3 |
| 64 | UINT8 UpstreamPortTransmitterPreset : 4; //bit 4..7 |
| 65 | } Bits; |
| 66 | UINT8 Uint8; |
| 67 | } PCI_EXPRESS_REG_PHYSICAL_LAYER_16_0_LANE_EQUALIZATION_CONTROL; |
| 68 | |
| 69 | typedef struct { |
| 70 | PCI_EXPRESS_EXTENDED_CAPABILITIES_HEADER Header; |
| 71 | PCI_EXPRESS_REG_PHYSICAL_LAYER_16_0_CAPABILITIES Capablities; |
| 72 | PCI_EXPRESS_REG_PHYSICAL_LAYER_16_0_CONTROL Control; |
| 73 | PCI_EXPRESS_REG_PHYSICAL_LAYER_16_0_STATUS Status; |
| 74 | UINT32 LocalDataParityMismatchStatus; |
| 75 | UINT32 FirstRetimerDataParityMismatchStatus; |
| 76 | UINT32 SecondRetimerDataParityMismatchStatus; |
| 77 | UINT32 Reserved; |
| 78 | PCI_EXPRESS_REG_PHYSICAL_LAYER_16_0_LANE_EQUALIZATION_CONTROL LaneEqualizationControl[1]; |
| 79 | } PCI_EXPRESS_EXTENDED_CAPABILITIES_PHYSICAL_LAYER_16_0; |
| 80 | ///@} |
| 81 | |
| 82 | /// The Designated Vendor Specific Capability definitions |
| 83 | /// Based on section 7.9.6 of PCI Express Base Specification 4.0. |
| 84 | ///@{ |
| 85 | typedef union { |
| 86 | struct { |
| 87 | UINT32 DvsecVendorId : 16; //bit 0..15 |
| 88 | UINT32 DvsecRevision : 4; //bit 16..19 |
| 89 | UINT32 DvsecLength : 12; //bit 20..31 |
| 90 | }Bits; |
| 91 | UINT32 Uint32; |
| 92 | }PCI_EXPRESS_DESIGNATED_VENDOR_SPECIFIC_HEADER_1; |
| 93 | |
| 94 | typedef union { |
| 95 | struct { |
| 96 | UINT16 DvsecId : 16; //bit 0..15 |
| 97 | }Bits; |
| 98 | UINT16 Uint16; |
| 99 | }PCI_EXPRESS_DESIGNATED_VENDOR_SPECIFIC_HEADER_2; |
| 100 | |
| 101 | typedef struct { |
| 102 | PCI_EXPRESS_EXTENDED_CAPABILITIES_HEADER Header; |
| 103 | PCI_EXPRESS_DESIGNATED_VENDOR_SPECIFIC_HEADER_1 DesignatedVendorSpecificHeader1; |
| 104 | PCI_EXPRESS_DESIGNATED_VENDOR_SPECIFIC_HEADER_2 DesignatedVendorSpecificHeader2; |
| 105 | UINT8 DesignatedVendorSpecific[1]; |
| 106 | }PCI_EXPRESS_EXTENDED_CAPABILITIES_DESIGNATED_VENDOR_SPECIFIC; |
| 107 | ///@} |
| 108 | |
| 109 | #pragma pack() |
| 110 | |
| 111 | #endif |