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review.coreboot.org / coreboot / 43b7f416783ccc98952a4eb5f9274907442b03e5 / . / src / vendorcode / intel / edk2 / edk2-stable202005 / MdePkg / Include / IndustryStandard / IoRemappingTable.h
blob: 5ecf46097def4a683cd6ec231aecfbb6a7fc3fcb [file] [log] [blame]
Jonathan Zhang6d277782020-06-09 17:56:53 -0700[diff] [blame]1/** @file
2 ACPI IO Remapping Table (IORT) as specified in ARM spec DEN0049D
3
4 http://infocenter.arm.com/help/topic/com.arm.doc.den0049d/DEN0049D_IO_Remapping_Table.pdf
5
6 Copyright (c) 2017, Linaro Limited. All rights reserved.<BR>
7 Copyright (c) 2018, ARM Limited. All rights reserved.<BR>
8
9 SPDX-License-Identifier: BSD-2-Clause-Patent
10**/
11
12#ifndef __IO_REMAPPING_TABLE_H__
13#define __IO_REMAPPING_TABLE_H__
14
15#include <IndustryStandard/Acpi.h>
16
17#define EFI_ACPI_IO_REMAPPING_TABLE_REVISION 0x0
18
19#define EFI_ACPI_IORT_TYPE_ITS_GROUP 0x0
20#define EFI_ACPI_IORT_TYPE_NAMED_COMP 0x1
21#define EFI_ACPI_IORT_TYPE_ROOT_COMPLEX 0x2
22#define EFI_ACPI_IORT_TYPE_SMMUv1v2 0x3
23#define EFI_ACPI_IORT_TYPE_SMMUv3 0x4
24#define EFI_ACPI_IORT_TYPE_PMCG 0x5
25
26#define EFI_ACPI_IORT_MEM_ACCESS_PROP_CCA BIT0
27
28#define EFI_ACPI_IORT_MEM_ACCESS_PROP_AH_TR BIT0
29#define EFI_ACPI_IORT_MEM_ACCESS_PROP_AH_WA BIT1
30#define EFI_ACPI_IORT_MEM_ACCESS_PROP_AH_RA BIT2
31#define EFI_ACPI_IORT_MEM_ACCESS_PROP_AH_AHO BIT3
32
33#define EFI_ACPI_IORT_MEM_ACCESS_FLAGS_CPM BIT0
34#define EFI_ACPI_IORT_MEM_ACCESS_FLAGS_DACS BIT1
35
36#define EFI_ACPI_IORT_SMMUv1v2_MODEL_v1 0x0
37#define EFI_ACPI_IORT_SMMUv1v2_MODEL_v2 0x1
38#define EFI_ACPI_IORT_SMMUv1v2_MODEL_MMU400 0x2
39#define EFI_ACPI_IORT_SMMUv1v2_MODEL_MMU500 0x3
40#define EFI_ACPI_IORT_SMMUv1v2_MODEL_MMU401 0x4
41#define EFI_ACPI_IORT_SMMUv1v2_MODEL_CAVIUM_THX_v2 0x5
42
43#define EFI_ACPI_IORT_SMMUv1v2_FLAG_DVM BIT0
44#define EFI_ACPI_IORT_SMMUv1v2_FLAG_COH_WALK BIT1
45
46#define EFI_ACPI_IORT_SMMUv1v2_INT_FLAG_LEVEL 0x0
47#define EFI_ACPI_IORT_SMMUv1v2_INT_FLAG_EDGE 0x1
48
49#define EFI_ACPI_IORT_SMMUv3_FLAG_COHAC_OVERRIDE BIT0
50#define EFI_ACPI_IORT_SMMUv3_FLAG_HTTU_OVERRIDE BIT1
51#define EFI_ACPI_IORT_SMMUv3_FLAG_PROXIMITY_DOMAIN BIT3
52
53#define EFI_ACPI_IORT_SMMUv3_MODEL_GENERIC 0x0
54#define EFI_ACPI_IORT_SMMUv3_MODEL_HISILICON_HI161X 0x1
55#define EFI_ACPI_IORT_SMMUv3_MODEL_CAVIUM_CN99XX 0x2
56
57#define EFI_ACPI_IORT_ROOT_COMPLEX_ATS_UNSUPPORTED 0x0
58#define EFI_ACPI_IORT_ROOT_COMPLEX_ATS_SUPPORTED 0x1
59
60#define EFI_ACPI_IORT_ID_MAPPING_FLAGS_SINGLE BIT0
61
62#pragma pack(1)
63
64///
65/// Table header
66///
67typedef struct {
68 EFI_ACPI_DESCRIPTION_HEADER Header;
69 UINT32 NumNodes;
70 UINT32 NodeOffset;
71 UINT32 Reserved;
72} EFI_ACPI_6_0_IO_REMAPPING_TABLE;
73
74///
75/// Definition for ID mapping table shared by all node types
76///
77typedef struct {
78 UINT32 InputBase;
79 UINT32 NumIds;
80 UINT32 OutputBase;
81 UINT32 OutputReference;
82 UINT32 Flags;
83} EFI_ACPI_6_0_IO_REMAPPING_ID_TABLE;
84
85///
86/// Node header definition shared by all node types
87///
88typedef struct {
89 UINT8 Type;
90 UINT16 Length;
91 UINT8 Revision;
92 UINT32 Reserved;
93 UINT32 NumIdMappings;
94 UINT32 IdReference;
95} EFI_ACPI_6_0_IO_REMAPPING_NODE;
96
97///
98/// Node type 0: ITS node
99///
100typedef struct {
101 EFI_ACPI_6_0_IO_REMAPPING_NODE Node;
102
103 UINT32 NumItsIdentifiers;
104//UINT32 ItsIdentifiers[NumItsIdentifiers];
105} EFI_ACPI_6_0_IO_REMAPPING_ITS_NODE;
106
107///
108/// Node type 1: root complex node
109///
110typedef struct {
111 EFI_ACPI_6_0_IO_REMAPPING_NODE Node;
112
113 UINT32 CacheCoherent;
114 UINT8 AllocationHints;
115 UINT16 Reserved;
116 UINT8 MemoryAccessFlags;
117
118 UINT32 AtsAttribute;
119 UINT32 PciSegmentNumber;
120 UINT8 MemoryAddressSize;
121 UINT8 Reserved1[3];
122} EFI_ACPI_6_0_IO_REMAPPING_RC_NODE;
123
124///
125/// Node type 2: named component node
126///
127typedef struct {
128 EFI_ACPI_6_0_IO_REMAPPING_NODE Node;
129
130 UINT32 Flags;
131 UINT32 CacheCoherent;
132 UINT8 AllocationHints;
133 UINT16 Reserved;
134 UINT8 MemoryAccessFlags;
135 UINT8 AddressSizeLimit;
136//UINT8 ObjectName[];
137} EFI_ACPI_6_0_IO_REMAPPING_NAMED_COMP_NODE;
138
139///
140/// Node type 3: SMMUv1 or SMMUv2 node
141///
142typedef struct {
143 UINT32 Interrupt;
144 UINT32 InterruptFlags;
145} EFI_ACPI_6_0_IO_REMAPPING_SMMU_INT;
146
147typedef struct {
148 EFI_ACPI_6_0_IO_REMAPPING_NODE Node;
149
150 UINT64 Base;
151 UINT64 Span;
152 UINT32 Model;
153 UINT32 Flags;
154 UINT32 GlobalInterruptArrayRef;
155 UINT32 NumContextInterrupts;
156 UINT32 ContextInterruptArrayRef;
157 UINT32 NumPmuInterrupts;
158 UINT32 PmuInterruptArrayRef;
159
160 UINT32 SMMU_NSgIrpt;
161 UINT32 SMMU_NSgIrptFlags;
162 UINT32 SMMU_NSgCfgIrpt;
163 UINT32 SMMU_NSgCfgIrptFlags;
164
165//EFI_ACPI_6_0_IO_REMAPPING_SMMU_CTX_INT ContextInterrupt[NumContextInterrupts];
166//EFI_ACPI_6_0_IO_REMAPPING_SMMU_CTX_INT PmuInterrupt[NumPmuInterrupts];
167} EFI_ACPI_6_0_IO_REMAPPING_SMMU_NODE;
168
169///
170/// Node type 4: SMMUv3 node
171///
172typedef struct {
173 EFI_ACPI_6_0_IO_REMAPPING_NODE Node;
174
175 UINT64 Base;
176 UINT32 Flags;
177 UINT32 Reserved;
178 UINT64 VatosAddress;
179 UINT32 Model;
180 UINT32 Event;
181 UINT32 Pri;
182 UINT32 Gerr;
183 UINT32 Sync;
184 UINT32 ProximityDomain;
185 UINT32 DeviceIdMappingIndex;
186} EFI_ACPI_6_0_IO_REMAPPING_SMMU3_NODE;
187
188///
189/// Node type 5: PMCG node
190///
191typedef struct {
192 EFI_ACPI_6_0_IO_REMAPPING_NODE Node;
193
194 UINT64 Base;
195 UINT32 OverflowInterruptGsiv;
196 UINT32 NodeReference;
197 UINT64 Page1Base;
198//EFI_ACPI_6_0_IO_REMAPPING_ID_TABLE OverflowInterruptMsiMapping[1];
199} EFI_ACPI_6_0_IO_REMAPPING_PMCG_NODE;
200
201#pragma pack()
202
203#endif