Jonathan Zhang | 6d27778 | 2020-06-09 17:56:53 -0700 | [diff] [blame] | 1 | /** @file |
| 2 | ACPI 5.1 definitions from the ACPI Specification Revision 5.1 Errata B January, 2016. |
| 3 | |
| 4 | Copyright (c) 2014 Hewlett-Packard Development Company, L.P.<BR> |
| 5 | Copyright (c) 2014 - 2018, Intel Corporation. All rights reserved.<BR> |
| 6 | (C) Copyright 2015 Hewlett Packard Enterprise Development LP<BR> |
| 7 | Copyright (c) 2020, ARM Ltd. All rights reserved.<BR> |
| 8 | SPDX-License-Identifier: BSD-2-Clause-Patent |
| 9 | **/ |
| 10 | |
| 11 | #ifndef _ACPI_5_1_H_ |
| 12 | #define _ACPI_5_1_H_ |
| 13 | |
| 14 | #include <IndustryStandard/Acpi50.h> |
| 15 | |
| 16 | // |
| 17 | // Ensure proper structure formats |
| 18 | // |
| 19 | #pragma pack(1) |
| 20 | |
| 21 | /// |
| 22 | /// ACPI 5.1 Generic Address Space definition |
| 23 | /// |
| 24 | typedef struct { |
| 25 | UINT8 AddressSpaceId; |
| 26 | UINT8 RegisterBitWidth; |
| 27 | UINT8 RegisterBitOffset; |
| 28 | UINT8 AccessSize; |
| 29 | UINT64 Address; |
| 30 | } EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE; |
| 31 | |
| 32 | // |
| 33 | // Generic Address Space Address IDs |
| 34 | // |
| 35 | #define EFI_ACPI_5_1_SYSTEM_MEMORY 0 |
| 36 | #define EFI_ACPI_5_1_SYSTEM_IO 1 |
| 37 | #define EFI_ACPI_5_1_PCI_CONFIGURATION_SPACE 2 |
| 38 | #define EFI_ACPI_5_1_EMBEDDED_CONTROLLER 3 |
| 39 | #define EFI_ACPI_5_1_SMBUS 4 |
| 40 | #define EFI_ACPI_5_1_PLATFORM_COMMUNICATION_CHANNEL 0x0A |
| 41 | #define EFI_ACPI_5_1_FUNCTIONAL_FIXED_HARDWARE 0x7F |
| 42 | |
| 43 | // |
| 44 | // Generic Address Space Access Sizes |
| 45 | // |
| 46 | #define EFI_ACPI_5_1_UNDEFINED 0 |
| 47 | #define EFI_ACPI_5_1_BYTE 1 |
| 48 | #define EFI_ACPI_5_1_WORD 2 |
| 49 | #define EFI_ACPI_5_1_DWORD 3 |
| 50 | #define EFI_ACPI_5_1_QWORD 4 |
| 51 | |
| 52 | // |
| 53 | // ACPI 5.1 table structures |
| 54 | // |
| 55 | |
| 56 | /// |
| 57 | /// Root System Description Pointer Structure |
| 58 | /// |
| 59 | typedef struct { |
| 60 | UINT64 Signature; |
| 61 | UINT8 Checksum; |
| 62 | UINT8 OemId[6]; |
| 63 | UINT8 Revision; |
| 64 | UINT32 RsdtAddress; |
| 65 | UINT32 Length; |
| 66 | UINT64 XsdtAddress; |
| 67 | UINT8 ExtendedChecksum; |
| 68 | UINT8 Reserved[3]; |
| 69 | } EFI_ACPI_5_1_ROOT_SYSTEM_DESCRIPTION_POINTER; |
| 70 | |
| 71 | /// |
| 72 | /// RSD_PTR Revision (as defined in ACPI 5.1 spec.) |
| 73 | /// |
| 74 | #define EFI_ACPI_5_1_ROOT_SYSTEM_DESCRIPTION_POINTER_REVISION 0x02 ///< ACPISpec (Revision 5.1) says current value is 2 |
| 75 | |
| 76 | /// |
| 77 | /// Common table header, this prefaces all ACPI tables, including FACS, but |
| 78 | /// excluding the RSD PTR structure |
| 79 | /// |
| 80 | typedef struct { |
| 81 | UINT32 Signature; |
| 82 | UINT32 Length; |
| 83 | } EFI_ACPI_5_1_COMMON_HEADER; |
| 84 | |
| 85 | // |
| 86 | // Root System Description Table |
| 87 | // No definition needed as it is a common description table header, the same with |
| 88 | // EFI_ACPI_DESCRIPTION_HEADER, followed by a variable number of UINT32 table pointers. |
| 89 | // |
| 90 | |
| 91 | /// |
| 92 | /// RSDT Revision (as defined in ACPI 5.1 spec.) |
| 93 | /// |
| 94 | #define EFI_ACPI_5_1_ROOT_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01 |
| 95 | |
| 96 | // |
| 97 | // Extended System Description Table |
| 98 | // No definition needed as it is a common description table header, the same with |
| 99 | // EFI_ACPI_DESCRIPTION_HEADER, followed by a variable number of UINT64 table pointers. |
| 100 | // |
| 101 | |
| 102 | /// |
| 103 | /// XSDT Revision (as defined in ACPI 5.1 spec.) |
| 104 | /// |
| 105 | #define EFI_ACPI_5_1_EXTENDED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01 |
| 106 | |
| 107 | /// |
| 108 | /// Fixed ACPI Description Table Structure (FADT) |
| 109 | /// |
| 110 | typedef struct { |
| 111 | EFI_ACPI_DESCRIPTION_HEADER Header; |
| 112 | UINT32 FirmwareCtrl; |
| 113 | UINT32 Dsdt; |
| 114 | UINT8 Reserved0; |
| 115 | UINT8 PreferredPmProfile; |
| 116 | UINT16 SciInt; |
| 117 | UINT32 SmiCmd; |
| 118 | UINT8 AcpiEnable; |
| 119 | UINT8 AcpiDisable; |
| 120 | UINT8 S4BiosReq; |
| 121 | UINT8 PstateCnt; |
| 122 | UINT32 Pm1aEvtBlk; |
| 123 | UINT32 Pm1bEvtBlk; |
| 124 | UINT32 Pm1aCntBlk; |
| 125 | UINT32 Pm1bCntBlk; |
| 126 | UINT32 Pm2CntBlk; |
| 127 | UINT32 PmTmrBlk; |
| 128 | UINT32 Gpe0Blk; |
| 129 | UINT32 Gpe1Blk; |
| 130 | UINT8 Pm1EvtLen; |
| 131 | UINT8 Pm1CntLen; |
| 132 | UINT8 Pm2CntLen; |
| 133 | UINT8 PmTmrLen; |
| 134 | UINT8 Gpe0BlkLen; |
| 135 | UINT8 Gpe1BlkLen; |
| 136 | UINT8 Gpe1Base; |
| 137 | UINT8 CstCnt; |
| 138 | UINT16 PLvl2Lat; |
| 139 | UINT16 PLvl3Lat; |
| 140 | UINT16 FlushSize; |
| 141 | UINT16 FlushStride; |
| 142 | UINT8 DutyOffset; |
| 143 | UINT8 DutyWidth; |
| 144 | UINT8 DayAlrm; |
| 145 | UINT8 MonAlrm; |
| 146 | UINT8 Century; |
| 147 | UINT16 IaPcBootArch; |
| 148 | UINT8 Reserved1; |
| 149 | UINT32 Flags; |
| 150 | EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE ResetReg; |
| 151 | UINT8 ResetValue; |
| 152 | UINT16 ArmBootArch; |
| 153 | UINT8 MinorVersion; |
| 154 | UINT64 XFirmwareCtrl; |
| 155 | UINT64 XDsdt; |
| 156 | EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XPm1aEvtBlk; |
| 157 | EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XPm1bEvtBlk; |
| 158 | EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XPm1aCntBlk; |
| 159 | EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XPm1bCntBlk; |
| 160 | EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XPm2CntBlk; |
| 161 | EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XPmTmrBlk; |
| 162 | EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XGpe0Blk; |
| 163 | EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XGpe1Blk; |
| 164 | EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE SleepControlReg; |
| 165 | EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE SleepStatusReg; |
| 166 | } EFI_ACPI_5_1_FIXED_ACPI_DESCRIPTION_TABLE; |
| 167 | |
| 168 | /// |
| 169 | /// FADT Version (as defined in ACPI 5.1 spec.) |
| 170 | /// |
| 171 | #define EFI_ACPI_5_1_FIXED_ACPI_DESCRIPTION_TABLE_REVISION 0x05 |
| 172 | #define EFI_ACPI_5_1_FIXED_ACPI_DESCRIPTION_TABLE_MINOR_REVISION 0x01 |
| 173 | |
| 174 | // |
| 175 | // Fixed ACPI Description Table Preferred Power Management Profile |
| 176 | // |
| 177 | #define EFI_ACPI_5_1_PM_PROFILE_UNSPECIFIED 0 |
| 178 | #define EFI_ACPI_5_1_PM_PROFILE_DESKTOP 1 |
| 179 | #define EFI_ACPI_5_1_PM_PROFILE_MOBILE 2 |
| 180 | #define EFI_ACPI_5_1_PM_PROFILE_WORKSTATION 3 |
| 181 | #define EFI_ACPI_5_1_PM_PROFILE_ENTERPRISE_SERVER 4 |
| 182 | #define EFI_ACPI_5_1_PM_PROFILE_SOHO_SERVER 5 |
| 183 | #define EFI_ACPI_5_1_PM_PROFILE_APPLIANCE_PC 6 |
| 184 | #define EFI_ACPI_5_1_PM_PROFILE_PERFORMANCE_SERVER 7 |
| 185 | #define EFI_ACPI_5_1_PM_PROFILE_TABLET 8 |
| 186 | |
| 187 | // |
| 188 | // Fixed ACPI Description Table Boot Architecture Flags |
| 189 | // All other bits are reserved and must be set to 0. |
| 190 | // |
| 191 | #define EFI_ACPI_5_1_LEGACY_DEVICES BIT0 |
| 192 | #define EFI_ACPI_5_1_8042 BIT1 |
| 193 | #define EFI_ACPI_5_1_VGA_NOT_PRESENT BIT2 |
| 194 | #define EFI_ACPI_5_1_MSI_NOT_SUPPORTED BIT3 |
| 195 | #define EFI_ACPI_5_1_PCIE_ASPM_CONTROLS BIT4 |
| 196 | #define EFI_ACPI_5_1_CMOS_RTC_NOT_PRESENT BIT5 |
| 197 | |
| 198 | // |
| 199 | // Fixed ACPI Description Table Arm Boot Architecture Flags |
| 200 | // All other bits are reserved and must be set to 0. |
| 201 | // |
| 202 | #define EFI_ACPI_5_1_ARM_PSCI_COMPLIANT BIT0 |
| 203 | #define EFI_ACPI_5_1_ARM_PSCI_USE_HVC BIT1 |
| 204 | |
| 205 | // |
| 206 | // Fixed ACPI Description Table Fixed Feature Flags |
| 207 | // All other bits are reserved and must be set to 0. |
| 208 | // |
| 209 | #define EFI_ACPI_5_1_WBINVD BIT0 |
| 210 | #define EFI_ACPI_5_1_WBINVD_FLUSH BIT1 |
| 211 | #define EFI_ACPI_5_1_PROC_C1 BIT2 |
| 212 | #define EFI_ACPI_5_1_P_LVL2_UP BIT3 |
| 213 | #define EFI_ACPI_5_1_PWR_BUTTON BIT4 |
| 214 | #define EFI_ACPI_5_1_SLP_BUTTON BIT5 |
| 215 | #define EFI_ACPI_5_1_FIX_RTC BIT6 |
| 216 | #define EFI_ACPI_5_1_RTC_S4 BIT7 |
| 217 | #define EFI_ACPI_5_1_TMR_VAL_EXT BIT8 |
| 218 | #define EFI_ACPI_5_1_DCK_CAP BIT9 |
| 219 | #define EFI_ACPI_5_1_RESET_REG_SUP BIT10 |
| 220 | #define EFI_ACPI_5_1_SEALED_CASE BIT11 |
| 221 | #define EFI_ACPI_5_1_HEADLESS BIT12 |
| 222 | #define EFI_ACPI_5_1_CPU_SW_SLP BIT13 |
| 223 | #define EFI_ACPI_5_1_PCI_EXP_WAK BIT14 |
| 224 | #define EFI_ACPI_5_1_USE_PLATFORM_CLOCK BIT15 |
| 225 | #define EFI_ACPI_5_1_S4_RTC_STS_VALID BIT16 |
| 226 | #define EFI_ACPI_5_1_REMOTE_POWER_ON_CAPABLE BIT17 |
| 227 | #define EFI_ACPI_5_1_FORCE_APIC_CLUSTER_MODEL BIT18 |
| 228 | #define EFI_ACPI_5_1_FORCE_APIC_PHYSICAL_DESTINATION_MODE BIT19 |
| 229 | #define EFI_ACPI_5_1_HW_REDUCED_ACPI BIT20 |
| 230 | #define EFI_ACPI_5_1_LOW_POWER_S0_IDLE_CAPABLE BIT21 |
| 231 | |
| 232 | /// |
| 233 | /// Firmware ACPI Control Structure |
| 234 | /// |
| 235 | typedef struct { |
| 236 | UINT32 Signature; |
| 237 | UINT32 Length; |
| 238 | UINT32 HardwareSignature; |
| 239 | UINT32 FirmwareWakingVector; |
| 240 | UINT32 GlobalLock; |
| 241 | UINT32 Flags; |
| 242 | UINT64 XFirmwareWakingVector; |
| 243 | UINT8 Version; |
| 244 | UINT8 Reserved0[3]; |
| 245 | UINT32 OspmFlags; |
| 246 | UINT8 Reserved1[24]; |
| 247 | } EFI_ACPI_5_1_FIRMWARE_ACPI_CONTROL_STRUCTURE; |
| 248 | |
| 249 | /// |
| 250 | /// FACS Version (as defined in ACPI 5.1 spec.) |
| 251 | /// |
| 252 | #define EFI_ACPI_5_1_FIRMWARE_ACPI_CONTROL_STRUCTURE_VERSION 0x02 |
| 253 | |
| 254 | /// |
| 255 | /// Firmware Control Structure Feature Flags |
| 256 | /// All other bits are reserved and must be set to 0. |
| 257 | /// |
| 258 | #define EFI_ACPI_5_1_S4BIOS_F BIT0 |
| 259 | #define EFI_ACPI_5_1_64BIT_WAKE_SUPPORTED_F BIT1 |
| 260 | |
| 261 | /// |
| 262 | /// OSPM Enabled Firmware Control Structure Flags |
| 263 | /// All other bits are reserved and must be set to 0. |
| 264 | /// |
| 265 | #define EFI_ACPI_5_1_OSPM_64BIT_WAKE_F BIT0 |
| 266 | |
| 267 | // |
| 268 | // Differentiated System Description Table, |
| 269 | // Secondary System Description Table |
| 270 | // and Persistent System Description Table, |
| 271 | // no definition needed as they are common description table header, the same with |
| 272 | // EFI_ACPI_DESCRIPTION_HEADER, followed by a definition block. |
| 273 | // |
| 274 | #define EFI_ACPI_5_1_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x02 |
| 275 | #define EFI_ACPI_5_1_SECONDARY_SYSTEM_DESCRIPTION_TABLE_REVISION 0x02 |
| 276 | |
| 277 | /// |
| 278 | /// Multiple APIC Description Table header definition. The rest of the table |
| 279 | /// must be defined in a platform specific manner. |
| 280 | /// |
| 281 | typedef struct { |
| 282 | EFI_ACPI_DESCRIPTION_HEADER Header; |
| 283 | UINT32 LocalApicAddress; |
| 284 | UINT32 Flags; |
| 285 | } EFI_ACPI_5_1_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER; |
| 286 | |
| 287 | /// |
| 288 | /// MADT Revision (as defined in ACPI 5.1 spec.) |
| 289 | /// |
| 290 | #define EFI_ACPI_5_1_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION 0x03 |
| 291 | |
| 292 | /// |
| 293 | /// Multiple APIC Flags |
| 294 | /// All other bits are reserved and must be set to 0. |
| 295 | /// |
| 296 | #define EFI_ACPI_5_1_PCAT_COMPAT BIT0 |
| 297 | |
| 298 | // |
| 299 | // Multiple APIC Description Table APIC structure types |
| 300 | // All other values between 0x0D and 0x7F are reserved and |
| 301 | // will be ignored by OSPM. 0x80 ~ 0xFF are reserved for OEM. |
| 302 | // |
| 303 | #define EFI_ACPI_5_1_PROCESSOR_LOCAL_APIC 0x00 |
| 304 | #define EFI_ACPI_5_1_IO_APIC 0x01 |
| 305 | #define EFI_ACPI_5_1_INTERRUPT_SOURCE_OVERRIDE 0x02 |
| 306 | #define EFI_ACPI_5_1_NON_MASKABLE_INTERRUPT_SOURCE 0x03 |
| 307 | #define EFI_ACPI_5_1_LOCAL_APIC_NMI 0x04 |
| 308 | #define EFI_ACPI_5_1_LOCAL_APIC_ADDRESS_OVERRIDE 0x05 |
| 309 | #define EFI_ACPI_5_1_IO_SAPIC 0x06 |
| 310 | #define EFI_ACPI_5_1_LOCAL_SAPIC 0x07 |
| 311 | #define EFI_ACPI_5_1_PLATFORM_INTERRUPT_SOURCES 0x08 |
| 312 | #define EFI_ACPI_5_1_PROCESSOR_LOCAL_X2APIC 0x09 |
| 313 | #define EFI_ACPI_5_1_LOCAL_X2APIC_NMI 0x0A |
| 314 | #define EFI_ACPI_5_1_GIC 0x0B |
| 315 | #define EFI_ACPI_5_1_GICD 0x0C |
| 316 | #define EFI_ACPI_5_1_GIC_MSI_FRAME 0x0D |
| 317 | #define EFI_ACPI_5_1_GICR 0x0E |
| 318 | |
| 319 | // |
| 320 | // APIC Structure Definitions |
| 321 | // |
| 322 | |
| 323 | /// |
| 324 | /// Processor Local APIC Structure Definition |
| 325 | /// |
| 326 | typedef struct { |
| 327 | UINT8 Type; |
| 328 | UINT8 Length; |
| 329 | UINT8 AcpiProcessorId; |
| 330 | UINT8 ApicId; |
| 331 | UINT32 Flags; |
| 332 | } EFI_ACPI_5_1_PROCESSOR_LOCAL_APIC_STRUCTURE; |
| 333 | |
| 334 | /// |
| 335 | /// Local APIC Flags. All other bits are reserved and must be 0. |
| 336 | /// |
| 337 | #define EFI_ACPI_5_1_LOCAL_APIC_ENABLED BIT0 |
| 338 | |
| 339 | /// |
| 340 | /// IO APIC Structure |
| 341 | /// |
| 342 | typedef struct { |
| 343 | UINT8 Type; |
| 344 | UINT8 Length; |
| 345 | UINT8 IoApicId; |
| 346 | UINT8 Reserved; |
| 347 | UINT32 IoApicAddress; |
| 348 | UINT32 GlobalSystemInterruptBase; |
| 349 | } EFI_ACPI_5_1_IO_APIC_STRUCTURE; |
| 350 | |
| 351 | /// |
| 352 | /// Interrupt Source Override Structure |
| 353 | /// |
| 354 | typedef struct { |
| 355 | UINT8 Type; |
| 356 | UINT8 Length; |
| 357 | UINT8 Bus; |
| 358 | UINT8 Source; |
| 359 | UINT32 GlobalSystemInterrupt; |
| 360 | UINT16 Flags; |
| 361 | } EFI_ACPI_5_1_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE; |
| 362 | |
| 363 | /// |
| 364 | /// Platform Interrupt Sources Structure Definition |
| 365 | /// |
| 366 | typedef struct { |
| 367 | UINT8 Type; |
| 368 | UINT8 Length; |
| 369 | UINT16 Flags; |
| 370 | UINT8 InterruptType; |
| 371 | UINT8 ProcessorId; |
| 372 | UINT8 ProcessorEid; |
| 373 | UINT8 IoSapicVector; |
| 374 | UINT32 GlobalSystemInterrupt; |
| 375 | UINT32 PlatformInterruptSourceFlags; |
| 376 | UINT8 CpeiProcessorOverride; |
| 377 | UINT8 Reserved[31]; |
| 378 | } EFI_ACPI_5_1_PLATFORM_INTERRUPT_APIC_STRUCTURE; |
| 379 | |
| 380 | // |
| 381 | // MPS INTI flags. |
| 382 | // All other bits are reserved and must be set to 0. |
| 383 | // |
| 384 | #define EFI_ACPI_5_1_POLARITY (3 << 0) |
| 385 | #define EFI_ACPI_5_1_TRIGGER_MODE (3 << 2) |
| 386 | |
| 387 | /// |
| 388 | /// Non-Maskable Interrupt Source Structure |
| 389 | /// |
| 390 | typedef struct { |
| 391 | UINT8 Type; |
| 392 | UINT8 Length; |
| 393 | UINT16 Flags; |
| 394 | UINT32 GlobalSystemInterrupt; |
| 395 | } EFI_ACPI_5_1_NON_MASKABLE_INTERRUPT_SOURCE_STRUCTURE; |
| 396 | |
| 397 | /// |
| 398 | /// Local APIC NMI Structure |
| 399 | /// |
| 400 | typedef struct { |
| 401 | UINT8 Type; |
| 402 | UINT8 Length; |
| 403 | UINT8 AcpiProcessorId; |
| 404 | UINT16 Flags; |
| 405 | UINT8 LocalApicLint; |
| 406 | } EFI_ACPI_5_1_LOCAL_APIC_NMI_STRUCTURE; |
| 407 | |
| 408 | /// |
| 409 | /// Local APIC Address Override Structure |
| 410 | /// |
| 411 | typedef struct { |
| 412 | UINT8 Type; |
| 413 | UINT8 Length; |
| 414 | UINT16 Reserved; |
| 415 | UINT64 LocalApicAddress; |
| 416 | } EFI_ACPI_5_1_LOCAL_APIC_ADDRESS_OVERRIDE_STRUCTURE; |
| 417 | |
| 418 | /// |
| 419 | /// IO SAPIC Structure |
| 420 | /// |
| 421 | typedef struct { |
| 422 | UINT8 Type; |
| 423 | UINT8 Length; |
| 424 | UINT8 IoApicId; |
| 425 | UINT8 Reserved; |
| 426 | UINT32 GlobalSystemInterruptBase; |
| 427 | UINT64 IoSapicAddress; |
| 428 | } EFI_ACPI_5_1_IO_SAPIC_STRUCTURE; |
| 429 | |
| 430 | /// |
| 431 | /// Local SAPIC Structure |
| 432 | /// This struct followed by a null-terminated ASCII string - ACPI Processor UID String |
| 433 | /// |
| 434 | typedef struct { |
| 435 | UINT8 Type; |
| 436 | UINT8 Length; |
| 437 | UINT8 AcpiProcessorId; |
| 438 | UINT8 LocalSapicId; |
| 439 | UINT8 LocalSapicEid; |
| 440 | UINT8 Reserved[3]; |
| 441 | UINT32 Flags; |
| 442 | UINT32 ACPIProcessorUIDValue; |
| 443 | } EFI_ACPI_5_1_PROCESSOR_LOCAL_SAPIC_STRUCTURE; |
| 444 | |
| 445 | /// |
| 446 | /// Platform Interrupt Sources Structure |
| 447 | /// |
| 448 | typedef struct { |
| 449 | UINT8 Type; |
| 450 | UINT8 Length; |
| 451 | UINT16 Flags; |
| 452 | UINT8 InterruptType; |
| 453 | UINT8 ProcessorId; |
| 454 | UINT8 ProcessorEid; |
| 455 | UINT8 IoSapicVector; |
| 456 | UINT32 GlobalSystemInterrupt; |
| 457 | UINT32 PlatformInterruptSourceFlags; |
| 458 | } EFI_ACPI_5_1_PLATFORM_INTERRUPT_SOURCES_STRUCTURE; |
| 459 | |
| 460 | /// |
| 461 | /// Platform Interrupt Source Flags. |
| 462 | /// All other bits are reserved and must be set to 0. |
| 463 | /// |
| 464 | #define EFI_ACPI_5_1_CPEI_PROCESSOR_OVERRIDE BIT0 |
| 465 | |
| 466 | /// |
| 467 | /// Processor Local x2APIC Structure Definition |
| 468 | /// |
| 469 | typedef struct { |
| 470 | UINT8 Type; |
| 471 | UINT8 Length; |
| 472 | UINT8 Reserved[2]; |
| 473 | UINT32 X2ApicId; |
| 474 | UINT32 Flags; |
| 475 | UINT32 AcpiProcessorUid; |
| 476 | } EFI_ACPI_5_1_PROCESSOR_LOCAL_X2APIC_STRUCTURE; |
| 477 | |
| 478 | /// |
| 479 | /// Local x2APIC NMI Structure |
| 480 | /// |
| 481 | typedef struct { |
| 482 | UINT8 Type; |
| 483 | UINT8 Length; |
| 484 | UINT16 Flags; |
| 485 | UINT32 AcpiProcessorUid; |
| 486 | UINT8 LocalX2ApicLint; |
| 487 | UINT8 Reserved[3]; |
| 488 | } EFI_ACPI_5_1_LOCAL_X2APIC_NMI_STRUCTURE; |
| 489 | |
| 490 | /// |
| 491 | /// GIC Structure |
| 492 | /// |
| 493 | typedef struct { |
| 494 | UINT8 Type; |
| 495 | UINT8 Length; |
| 496 | UINT16 Reserved; |
| 497 | UINT32 CPUInterfaceNumber; |
| 498 | UINT32 AcpiProcessorUid; |
| 499 | UINT32 Flags; |
| 500 | UINT32 ParkingProtocolVersion; |
| 501 | UINT32 PerformanceInterruptGsiv; |
| 502 | UINT64 ParkedAddress; |
| 503 | UINT64 PhysicalBaseAddress; |
| 504 | UINT64 GICV; |
| 505 | UINT64 GICH; |
| 506 | UINT32 VGICMaintenanceInterrupt; |
| 507 | UINT64 GICRBaseAddress; |
| 508 | UINT64 MPIDR; |
| 509 | } EFI_ACPI_5_1_GIC_STRUCTURE; |
| 510 | |
| 511 | /// |
| 512 | /// GIC Flags. All other bits are reserved and must be 0. |
| 513 | /// |
| 514 | #define EFI_ACPI_5_1_GIC_ENABLED BIT0 |
| 515 | #define EFI_ACPI_5_1_PERFORMANCE_INTERRUPT_MODEL BIT1 |
| 516 | #define EFI_ACPI_5_1_VGIC_MAINTENANCE_INTERRUPT_MODE_FLAGS BIT2 |
| 517 | |
| 518 | /// |
| 519 | /// GIC Distributor Structure |
| 520 | /// |
| 521 | typedef struct { |
| 522 | UINT8 Type; |
| 523 | UINT8 Length; |
| 524 | UINT16 Reserved1; |
| 525 | UINT32 GicId; |
| 526 | UINT64 PhysicalBaseAddress; |
| 527 | UINT32 SystemVectorBase; |
| 528 | UINT8 GicVersion; |
| 529 | UINT8 Reserved2[3]; |
| 530 | } EFI_ACPI_5_1_GIC_DISTRIBUTOR_STRUCTURE; |
| 531 | |
| 532 | /// |
| 533 | /// GIC Version |
| 534 | /// |
| 535 | #define EFI_ACPI_5_1_GIC_V1 0x01 |
| 536 | #define EFI_ACPI_5_1_GIC_V2 0x02 |
| 537 | #define EFI_ACPI_5_1_GIC_V3 0x03 |
| 538 | #define EFI_ACPI_5_1_GIC_V4 0x04 |
| 539 | |
| 540 | /// |
| 541 | /// GIC MSI Frame Structure |
| 542 | /// |
| 543 | typedef struct { |
| 544 | UINT8 Type; |
| 545 | UINT8 Length; |
| 546 | UINT16 Reserved1; |
| 547 | UINT32 GicMsiFrameId; |
| 548 | UINT64 PhysicalBaseAddress; |
| 549 | UINT32 Flags; |
| 550 | UINT16 SPICount; |
| 551 | UINT16 SPIBase; |
| 552 | } EFI_ACPI_5_1_GIC_MSI_FRAME_STRUCTURE; |
| 553 | |
| 554 | /// |
| 555 | /// GIC MSI Frame Flags. All other bits are reserved and must be 0. |
| 556 | /// |
| 557 | #define EFI_ACPI_5_1_SPI_COUNT_BASE_SELECT BIT0 |
| 558 | |
| 559 | /// |
| 560 | /// GICR Structure |
| 561 | /// |
| 562 | typedef struct { |
| 563 | UINT8 Type; |
| 564 | UINT8 Length; |
| 565 | UINT16 Reserved; |
| 566 | UINT64 DiscoveryRangeBaseAddress; |
| 567 | UINT32 DiscoveryRangeLength; |
| 568 | } EFI_ACPI_5_1_GICR_STRUCTURE; |
| 569 | |
| 570 | /// |
| 571 | /// Smart Battery Description Table (SBST) |
| 572 | /// |
| 573 | typedef struct { |
| 574 | EFI_ACPI_DESCRIPTION_HEADER Header; |
| 575 | UINT32 WarningEnergyLevel; |
| 576 | UINT32 LowEnergyLevel; |
| 577 | UINT32 CriticalEnergyLevel; |
| 578 | } EFI_ACPI_5_1_SMART_BATTERY_DESCRIPTION_TABLE; |
| 579 | |
| 580 | /// |
| 581 | /// SBST Version (as defined in ACPI 5.1 spec.) |
| 582 | /// |
| 583 | #define EFI_ACPI_5_1_SMART_BATTERY_DESCRIPTION_TABLE_REVISION 0x01 |
| 584 | |
| 585 | /// |
| 586 | /// Embedded Controller Boot Resources Table (ECDT) |
| 587 | /// The table is followed by a null terminated ASCII string that contains |
| 588 | /// a fully qualified reference to the name space object. |
| 589 | /// |
| 590 | typedef struct { |
| 591 | EFI_ACPI_DESCRIPTION_HEADER Header; |
| 592 | EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE EcControl; |
| 593 | EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE EcData; |
| 594 | UINT32 Uid; |
| 595 | UINT8 GpeBit; |
| 596 | } EFI_ACPI_5_1_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE; |
| 597 | |
| 598 | /// |
| 599 | /// ECDT Version (as defined in ACPI 5.1 spec.) |
| 600 | /// |
| 601 | #define EFI_ACPI_5_1_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_REVISION 0x01 |
| 602 | |
| 603 | /// |
| 604 | /// System Resource Affinity Table (SRAT). The rest of the table |
| 605 | /// must be defined in a platform specific manner. |
| 606 | /// |
| 607 | typedef struct { |
| 608 | EFI_ACPI_DESCRIPTION_HEADER Header; |
| 609 | UINT32 Reserved1; ///< Must be set to 1 |
| 610 | UINT64 Reserved2; |
| 611 | } EFI_ACPI_5_1_SYSTEM_RESOURCE_AFFINITY_TABLE_HEADER; |
| 612 | |
| 613 | /// |
| 614 | /// SRAT Version (as defined in ACPI 5.1 spec.) |
| 615 | /// |
| 616 | #define EFI_ACPI_5_1_SYSTEM_RESOURCE_AFFINITY_TABLE_REVISION 0x03 |
| 617 | |
| 618 | // |
| 619 | // SRAT structure types. |
| 620 | // All other values between 0x04 an 0xFF are reserved and |
| 621 | // will be ignored by OSPM. |
| 622 | // |
| 623 | #define EFI_ACPI_5_1_PROCESSOR_LOCAL_APIC_SAPIC_AFFINITY 0x00 |
| 624 | #define EFI_ACPI_5_1_MEMORY_AFFINITY 0x01 |
| 625 | #define EFI_ACPI_5_1_PROCESSOR_LOCAL_X2APIC_AFFINITY 0x02 |
| 626 | #define EFI_ACPI_5_1_GICC_AFFINITY 0x03 |
| 627 | |
| 628 | /// |
| 629 | /// Processor Local APIC/SAPIC Affinity Structure Definition |
| 630 | /// |
| 631 | typedef struct { |
| 632 | UINT8 Type; |
| 633 | UINT8 Length; |
| 634 | UINT8 ProximityDomain7To0; |
| 635 | UINT8 ApicId; |
| 636 | UINT32 Flags; |
| 637 | UINT8 LocalSapicEid; |
| 638 | UINT8 ProximityDomain31To8[3]; |
| 639 | UINT32 ClockDomain; |
| 640 | } EFI_ACPI_5_1_PROCESSOR_LOCAL_APIC_SAPIC_AFFINITY_STRUCTURE; |
| 641 | |
| 642 | /// |
| 643 | /// Local APIC/SAPIC Flags. All other bits are reserved and must be 0. |
| 644 | /// |
| 645 | #define EFI_ACPI_5_1_PROCESSOR_LOCAL_APIC_SAPIC_ENABLED (1 << 0) |
| 646 | |
| 647 | /// |
| 648 | /// Memory Affinity Structure Definition |
| 649 | /// |
| 650 | typedef struct { |
| 651 | UINT8 Type; |
| 652 | UINT8 Length; |
| 653 | UINT32 ProximityDomain; |
| 654 | UINT16 Reserved1; |
| 655 | UINT32 AddressBaseLow; |
| 656 | UINT32 AddressBaseHigh; |
| 657 | UINT32 LengthLow; |
| 658 | UINT32 LengthHigh; |
| 659 | UINT32 Reserved2; |
| 660 | UINT32 Flags; |
| 661 | UINT64 Reserved3; |
| 662 | } EFI_ACPI_5_1_MEMORY_AFFINITY_STRUCTURE; |
| 663 | |
| 664 | // |
| 665 | // Memory Flags. All other bits are reserved and must be 0. |
| 666 | // |
| 667 | #define EFI_ACPI_5_1_MEMORY_ENABLED (1 << 0) |
| 668 | #define EFI_ACPI_5_1_MEMORY_HOT_PLUGGABLE (1 << 1) |
| 669 | #define EFI_ACPI_5_1_MEMORY_NONVOLATILE (1 << 2) |
| 670 | |
| 671 | /// |
| 672 | /// Processor Local x2APIC Affinity Structure Definition |
| 673 | /// |
| 674 | typedef struct { |
| 675 | UINT8 Type; |
| 676 | UINT8 Length; |
| 677 | UINT8 Reserved1[2]; |
| 678 | UINT32 ProximityDomain; |
| 679 | UINT32 X2ApicId; |
| 680 | UINT32 Flags; |
| 681 | UINT32 ClockDomain; |
| 682 | UINT8 Reserved2[4]; |
| 683 | } EFI_ACPI_5_1_PROCESSOR_LOCAL_X2APIC_AFFINITY_STRUCTURE; |
| 684 | |
| 685 | /// |
| 686 | /// GICC Affinity Structure Definition |
| 687 | /// |
| 688 | typedef struct { |
| 689 | UINT8 Type; |
| 690 | UINT8 Length; |
| 691 | UINT32 ProximityDomain; |
| 692 | UINT32 AcpiProcessorUid; |
| 693 | UINT32 Flags; |
| 694 | UINT32 ClockDomain; |
| 695 | } EFI_ACPI_5_1_GICC_AFFINITY_STRUCTURE; |
| 696 | |
| 697 | /// |
| 698 | /// GICC Flags. All other bits are reserved and must be 0. |
| 699 | /// |
| 700 | #define EFI_ACPI_5_1_GICC_ENABLED (1 << 0) |
| 701 | |
| 702 | /// |
| 703 | /// System Locality Distance Information Table (SLIT). |
| 704 | /// The rest of the table is a matrix. |
| 705 | /// |
| 706 | typedef struct { |
| 707 | EFI_ACPI_DESCRIPTION_HEADER Header; |
| 708 | UINT64 NumberOfSystemLocalities; |
| 709 | } EFI_ACPI_5_1_SYSTEM_LOCALITY_DISTANCE_INFORMATION_TABLE_HEADER; |
| 710 | |
| 711 | /// |
| 712 | /// SLIT Version (as defined in ACPI 5.1 spec.) |
| 713 | /// |
| 714 | #define EFI_ACPI_5_1_SYSTEM_LOCALITY_DISTANCE_INFORMATION_TABLE_REVISION 0x01 |
| 715 | |
| 716 | /// |
| 717 | /// Corrected Platform Error Polling Table (CPEP) |
| 718 | /// |
| 719 | typedef struct { |
| 720 | EFI_ACPI_DESCRIPTION_HEADER Header; |
| 721 | UINT8 Reserved[8]; |
| 722 | } EFI_ACPI_5_1_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_HEADER; |
| 723 | |
| 724 | /// |
| 725 | /// CPEP Version (as defined in ACPI 5.1 spec.) |
| 726 | /// |
| 727 | #define EFI_ACPI_5_1_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_REVISION 0x01 |
| 728 | |
| 729 | // |
| 730 | // CPEP processor structure types. |
| 731 | // |
| 732 | #define EFI_ACPI_5_1_CPEP_PROCESSOR_APIC_SAPIC 0x00 |
| 733 | |
| 734 | /// |
| 735 | /// Corrected Platform Error Polling Processor Structure Definition |
| 736 | /// |
| 737 | typedef struct { |
| 738 | UINT8 Type; |
| 739 | UINT8 Length; |
| 740 | UINT8 ProcessorId; |
| 741 | UINT8 ProcessorEid; |
| 742 | UINT32 PollingInterval; |
| 743 | } EFI_ACPI_5_1_CPEP_PROCESSOR_APIC_SAPIC_STRUCTURE; |
| 744 | |
| 745 | /// |
| 746 | /// Maximum System Characteristics Table (MSCT) |
| 747 | /// |
| 748 | typedef struct { |
| 749 | EFI_ACPI_DESCRIPTION_HEADER Header; |
| 750 | UINT32 OffsetProxDomInfo; |
| 751 | UINT32 MaximumNumberOfProximityDomains; |
| 752 | UINT32 MaximumNumberOfClockDomains; |
| 753 | UINT64 MaximumPhysicalAddress; |
| 754 | } EFI_ACPI_5_1_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_HEADER; |
| 755 | |
| 756 | /// |
| 757 | /// MSCT Version (as defined in ACPI 5.1 spec.) |
| 758 | /// |
| 759 | #define EFI_ACPI_5_1_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_REVISION 0x01 |
| 760 | |
| 761 | /// |
| 762 | /// Maximum Proximity Domain Information Structure Definition |
| 763 | /// |
| 764 | typedef struct { |
| 765 | UINT8 Revision; |
| 766 | UINT8 Length; |
| 767 | UINT32 ProximityDomainRangeLow; |
| 768 | UINT32 ProximityDomainRangeHigh; |
| 769 | UINT32 MaximumProcessorCapacity; |
| 770 | UINT64 MaximumMemoryCapacity; |
| 771 | } EFI_ACPI_5_1_MAXIMUM_PROXIMITY_DOMAIN_INFORMATION_STRUCTURE; |
| 772 | |
| 773 | /// |
| 774 | /// ACPI RAS Feature Table definition. |
| 775 | /// |
| 776 | typedef struct { |
| 777 | EFI_ACPI_DESCRIPTION_HEADER Header; |
| 778 | UINT8 PlatformCommunicationChannelIdentifier[12]; |
| 779 | } EFI_ACPI_5_1_RAS_FEATURE_TABLE; |
| 780 | |
| 781 | /// |
| 782 | /// RASF Version (as defined in ACPI 5.1 spec.) |
| 783 | /// |
| 784 | #define EFI_ACPI_5_1_RAS_FEATURE_TABLE_REVISION 0x01 |
| 785 | |
| 786 | /// |
| 787 | /// ACPI RASF Platform Communication Channel Shared Memory Region definition. |
| 788 | /// |
| 789 | typedef struct { |
| 790 | UINT32 Signature; |
| 791 | UINT16 Command; |
| 792 | UINT16 Status; |
| 793 | UINT16 Version; |
| 794 | UINT8 RASCapabilities[16]; |
| 795 | UINT8 SetRASCapabilities[16]; |
| 796 | UINT16 NumberOfRASFParameterBlocks; |
| 797 | UINT32 SetRASCapabilitiesStatus; |
| 798 | } EFI_ACPI_5_1_RASF_PLATFORM_COMMUNICATION_CHANNEL_SHARED_MEMORY_REGION; |
| 799 | |
| 800 | /// |
| 801 | /// ACPI RASF PCC command code |
| 802 | /// |
| 803 | #define EFI_ACPI_5_1_RASF_PCC_COMMAND_CODE_EXECUTE_RASF_COMMAND 0x01 |
| 804 | |
| 805 | /// |
| 806 | /// ACPI RASF Platform RAS Capabilities |
| 807 | /// |
| 808 | #define EFI_ACPI_5_1_RASF_PLATFORM_RAS_CAPABILITY_HARDWARE_BASED_PATROL_SCRUB_SUPPOTED 0x01 |
| 809 | #define EFI_ACPI_5_1_RASF_PLATFORM_RAS_CAPABILITY_HARDWARE_BASED_PATROL_SCRUB_SUPPOTED_AND_EXPOSED_TO_SOFTWARE 0x02 |
| 810 | |
| 811 | /// |
| 812 | /// ACPI RASF Parameter Block structure for PATROL_SCRUB |
| 813 | /// |
| 814 | typedef struct { |
| 815 | UINT16 Type; |
| 816 | UINT16 Version; |
| 817 | UINT16 Length; |
| 818 | UINT16 PatrolScrubCommand; |
| 819 | UINT64 RequestedAddressRange[2]; |
| 820 | UINT64 ActualAddressRange[2]; |
| 821 | UINT16 Flags; |
| 822 | UINT8 RequestedSpeed; |
| 823 | } EFI_ACPI_5_1_RASF_PATROL_SCRUB_PLATFORM_BLOCK_STRUCTURE; |
| 824 | |
| 825 | /// |
| 826 | /// ACPI RASF Patrol Scrub command |
| 827 | /// |
| 828 | #define EFI_ACPI_5_1_RASF_PATROL_SCRUB_COMMAND_GET_PATROL_PARAMETERS 0x01 |
| 829 | #define EFI_ACPI_5_1_RASF_PATROL_SCRUB_COMMAND_START_PATROL_SCRUBBER 0x02 |
| 830 | #define EFI_ACPI_5_1_RASF_PATROL_SCRUB_COMMAND_STOP_PATROL_SCRUBBER 0x03 |
| 831 | |
| 832 | /// |
| 833 | /// Memory Power State Table definition. |
| 834 | /// |
| 835 | typedef struct { |
| 836 | EFI_ACPI_DESCRIPTION_HEADER Header; |
| 837 | UINT8 PlatformCommunicationChannelIdentifier; |
| 838 | UINT8 Reserved[3]; |
| 839 | // Memory Power Node Structure |
| 840 | // Memory Power State Characteristics |
| 841 | } EFI_ACPI_5_1_MEMORY_POWER_STATUS_TABLE; |
| 842 | |
| 843 | /// |
| 844 | /// MPST Version (as defined in ACPI 5.1 spec.) |
| 845 | /// |
| 846 | #define EFI_ACPI_5_1_MEMORY_POWER_STATE_TABLE_REVISION 0x01 |
| 847 | |
| 848 | /// |
| 849 | /// MPST Platform Communication Channel Shared Memory Region definition. |
| 850 | /// |
| 851 | typedef struct { |
| 852 | UINT32 Signature; |
| 853 | UINT16 Command; |
| 854 | UINT16 Status; |
| 855 | UINT32 MemoryPowerCommandRegister; |
| 856 | UINT32 MemoryPowerStatusRegister; |
| 857 | UINT32 PowerStateId; |
| 858 | UINT32 MemoryPowerNodeId; |
| 859 | UINT64 MemoryEnergyConsumed; |
| 860 | UINT64 ExpectedAveragePowerComsuned; |
| 861 | } EFI_ACPI_5_1_MPST_PLATFORM_COMMUNICATION_CHANNEL_SHARED_MEMORY_REGION; |
| 862 | |
| 863 | /// |
| 864 | /// ACPI MPST PCC command code |
| 865 | /// |
| 866 | #define EFI_ACPI_5_1_MPST_PCC_COMMAND_CODE_EXECUTE_MPST_COMMAND 0x03 |
| 867 | |
| 868 | /// |
| 869 | /// ACPI MPST Memory Power command |
| 870 | /// |
| 871 | #define EFI_ACPI_5_1_MPST_MEMORY_POWER_COMMAND_GET_MEMORY_POWER_STATE 0x01 |
| 872 | #define EFI_ACPI_5_1_MPST_MEMORY_POWER_COMMAND_SET_MEMORY_POWER_STATE 0x02 |
| 873 | #define EFI_ACPI_5_1_MPST_MEMORY_POWER_COMMAND_GET_AVERAGE_POWER_CONSUMED 0x03 |
| 874 | #define EFI_ACPI_5_1_MPST_MEMORY_POWER_COMMAND_GET_MEMORY_ENERGY_CONSUMED 0x04 |
| 875 | |
| 876 | /// |
| 877 | /// MPST Memory Power Node Table |
| 878 | /// |
| 879 | typedef struct { |
| 880 | UINT8 PowerStateValue; |
| 881 | UINT8 PowerStateInformationIndex; |
| 882 | } EFI_ACPI_5_1_MPST_MEMORY_POWER_STATE; |
| 883 | |
| 884 | typedef struct { |
| 885 | UINT8 Flag; |
| 886 | UINT8 Reserved; |
| 887 | UINT16 MemoryPowerNodeId; |
| 888 | UINT32 Length; |
| 889 | UINT64 AddressBase; |
| 890 | UINT64 AddressLength; |
| 891 | UINT32 NumberOfPowerStates; |
| 892 | UINT32 NumberOfPhysicalComponents; |
| 893 | //EFI_ACPI_5_1_MPST_MEMORY_POWER_STATE MemoryPowerState[NumberOfPowerStates]; |
| 894 | //UINT16 PhysicalComponentIdentifier[NumberOfPhysicalComponents]; |
| 895 | } EFI_ACPI_5_1_MPST_MEMORY_POWER_STRUCTURE; |
| 896 | |
| 897 | #define EFI_ACPI_5_1_MPST_MEMORY_POWER_STRUCTURE_FLAG_ENABLE 0x01 |
| 898 | #define EFI_ACPI_5_1_MPST_MEMORY_POWER_STRUCTURE_FLAG_POWER_MANAGED 0x02 |
| 899 | #define EFI_ACPI_5_1_MPST_MEMORY_POWER_STRUCTURE_FLAG_HOT_PLUGGABLE 0x04 |
| 900 | |
| 901 | typedef struct { |
| 902 | UINT16 MemoryPowerNodeCount; |
| 903 | UINT8 Reserved[2]; |
| 904 | } EFI_ACPI_5_1_MPST_MEMORY_POWER_NODE_TABLE; |
| 905 | |
| 906 | /// |
| 907 | /// MPST Memory Power State Characteristics Table |
| 908 | /// |
| 909 | typedef struct { |
| 910 | UINT8 PowerStateStructureID; |
| 911 | UINT8 Flag; |
| 912 | UINT16 Reserved; |
| 913 | UINT32 AveragePowerConsumedInMPS0; |
| 914 | UINT32 RelativePowerSavingToMPS0; |
| 915 | UINT64 ExitLatencyToMPS0; |
| 916 | } EFI_ACPI_5_1_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE; |
| 917 | |
| 918 | #define EFI_ACPI_5_1_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_MEMORY_CONTENT_PRESERVED 0x01 |
| 919 | #define EFI_ACPI_5_1_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_AUTONOMOUS_MEMORY_POWER_STATE_ENTRY 0x02 |
| 920 | #define EFI_ACPI_5_1_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_AUTONOMOUS_MEMORY_POWER_STATE_EXIT 0x04 |
| 921 | |
| 922 | typedef struct { |
| 923 | UINT16 MemoryPowerStateCharacteristicsCount; |
| 924 | UINT8 Reserved[2]; |
| 925 | } EFI_ACPI_5_1_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_TABLE; |
| 926 | |
| 927 | /// |
| 928 | /// Memory Topology Table definition. |
| 929 | /// |
| 930 | typedef struct { |
| 931 | EFI_ACPI_DESCRIPTION_HEADER Header; |
| 932 | UINT32 Reserved; |
| 933 | } EFI_ACPI_5_1_MEMORY_TOPOLOGY_TABLE; |
| 934 | |
| 935 | /// |
| 936 | /// PMTT Version (as defined in ACPI 5.1 spec.) |
| 937 | /// |
| 938 | #define EFI_ACPI_5_1_MEMORY_TOPOLOGY_TABLE_REVISION 0x01 |
| 939 | |
| 940 | /// |
| 941 | /// Common Memory Aggregator Device Structure. |
| 942 | /// |
| 943 | typedef struct { |
| 944 | UINT8 Type; |
| 945 | UINT8 Reserved; |
| 946 | UINT16 Length; |
| 947 | UINT16 Flags; |
| 948 | UINT16 Reserved1; |
| 949 | } EFI_ACPI_5_1_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE; |
| 950 | |
| 951 | /// |
| 952 | /// Memory Aggregator Device Type |
| 953 | /// |
| 954 | #define EFI_ACPI_5_1_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_SOCKET 0x1 |
| 955 | #define EFI_ACPI_5_1_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_MEMORY_CONTROLLER 0x2 |
| 956 | #define EFI_ACPI_5_1_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_DIMM 0x3 |
| 957 | |
| 958 | /// |
| 959 | /// Socket Memory Aggregator Device Structure. |
| 960 | /// |
| 961 | typedef struct { |
| 962 | EFI_ACPI_5_1_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header; |
| 963 | UINT16 SocketIdentifier; |
| 964 | UINT16 Reserved; |
| 965 | //EFI_ACPI_5_1_PMMT_MEMORY_CONTROLLER_MEMORY_AGGREGATOR_DEVICE_STRUCTURE MemoryController[]; |
| 966 | } EFI_ACPI_5_1_PMMT_SOCKET_MEMORY_AGGREGATOR_DEVICE_STRUCTURE; |
| 967 | |
| 968 | /// |
| 969 | /// MemoryController Memory Aggregator Device Structure. |
| 970 | /// |
| 971 | typedef struct { |
| 972 | EFI_ACPI_5_1_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header; |
| 973 | UINT32 ReadLatency; |
| 974 | UINT32 WriteLatency; |
| 975 | UINT32 ReadBandwidth; |
| 976 | UINT32 WriteBandwidth; |
| 977 | UINT16 OptimalAccessUnit; |
| 978 | UINT16 OptimalAccessAlignment; |
| 979 | UINT16 Reserved; |
| 980 | UINT16 NumberOfProximityDomains; |
| 981 | //UINT32 ProximityDomain[NumberOfProximityDomains]; |
| 982 | //EFI_ACPI_5_1_PMMT_DIMM_MEMORY_AGGREGATOR_DEVICE_STRUCTURE PhysicalComponent[]; |
| 983 | } EFI_ACPI_5_1_PMMT_MEMORY_CONTROLLER_MEMORY_AGGREGATOR_DEVICE_STRUCTURE; |
| 984 | |
| 985 | /// |
| 986 | /// DIMM Memory Aggregator Device Structure. |
| 987 | /// |
| 988 | typedef struct { |
| 989 | EFI_ACPI_5_1_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header; |
| 990 | UINT16 PhysicalComponentIdentifier; |
| 991 | UINT16 Reserved; |
| 992 | UINT32 SizeOfDimm; |
| 993 | UINT32 SmbiosHandle; |
| 994 | } EFI_ACPI_5_1_PMMT_DIMM_MEMORY_AGGREGATOR_DEVICE_STRUCTURE; |
| 995 | |
| 996 | /// |
| 997 | /// Boot Graphics Resource Table definition. |
| 998 | /// |
| 999 | typedef struct { |
| 1000 | EFI_ACPI_DESCRIPTION_HEADER Header; |
| 1001 | /// |
| 1002 | /// 2-bytes (16 bit) version ID. This value must be 1. |
| 1003 | /// |
| 1004 | UINT16 Version; |
| 1005 | /// |
| 1006 | /// 1-byte status field indicating current status about the table. |
| 1007 | /// Bits[7:1] = Reserved (must be zero) |
| 1008 | /// Bit [0] = Valid. A one indicates the boot image graphic is valid. |
| 1009 | /// |
| 1010 | UINT8 Status; |
| 1011 | /// |
| 1012 | /// 1-byte enumerated type field indicating format of the image. |
| 1013 | /// 0 = Bitmap |
| 1014 | /// 1 - 255 Reserved (for future use) |
| 1015 | /// |
| 1016 | UINT8 ImageType; |
| 1017 | /// |
| 1018 | /// 8-byte (64 bit) physical address pointing to the firmware's in-memory copy |
| 1019 | /// of the image bitmap. |
| 1020 | /// |
| 1021 | UINT64 ImageAddress; |
| 1022 | /// |
| 1023 | /// A 4-byte (32-bit) unsigned long describing the display X-offset of the boot image. |
| 1024 | /// (X, Y) display offset of the top left corner of the boot image. |
| 1025 | /// The top left corner of the display is at offset (0, 0). |
| 1026 | /// |
| 1027 | UINT32 ImageOffsetX; |
| 1028 | /// |
| 1029 | /// A 4-byte (32-bit) unsigned long describing the display Y-offset of the boot image. |
| 1030 | /// (X, Y) display offset of the top left corner of the boot image. |
| 1031 | /// The top left corner of the display is at offset (0, 0). |
| 1032 | /// |
| 1033 | UINT32 ImageOffsetY; |
| 1034 | } EFI_ACPI_5_1_BOOT_GRAPHICS_RESOURCE_TABLE; |
| 1035 | |
| 1036 | /// |
| 1037 | /// BGRT Revision |
| 1038 | /// |
| 1039 | #define EFI_ACPI_5_1_BOOT_GRAPHICS_RESOURCE_TABLE_REVISION 1 |
| 1040 | |
| 1041 | /// |
| 1042 | /// BGRT Version |
| 1043 | /// |
| 1044 | #define EFI_ACPI_5_1_BGRT_VERSION 0x01 |
| 1045 | |
| 1046 | /// |
| 1047 | /// BGRT Status |
| 1048 | /// |
| 1049 | #define EFI_ACPI_5_1_BGRT_STATUS_NOT_DISPLAYED 0x00 |
| 1050 | #define EFI_ACPI_5_1_BGRT_STATUS_DISPLAYED 0x01 |
| 1051 | |
| 1052 | /// |
| 1053 | /// BGRT Image Type |
| 1054 | /// |
| 1055 | #define EFI_ACPI_5_1_BGRT_IMAGE_TYPE_BMP 0x00 |
| 1056 | |
| 1057 | /// |
| 1058 | /// FPDT Version (as defined in ACPI 5.1 spec.) |
| 1059 | /// |
| 1060 | #define EFI_ACPI_5_1_FIRMWARE_PERFORMANCE_DATA_TABLE_REVISION 0x01 |
| 1061 | |
| 1062 | /// |
| 1063 | /// FPDT Performance Record Types |
| 1064 | /// |
| 1065 | #define EFI_ACPI_5_1_FPDT_RECORD_TYPE_FIRMWARE_BASIC_BOOT_POINTER 0x0000 |
| 1066 | #define EFI_ACPI_5_1_FPDT_RECORD_TYPE_S3_PERFORMANCE_TABLE_POINTER 0x0001 |
| 1067 | |
| 1068 | /// |
| 1069 | /// FPDT Performance Record Revision |
| 1070 | /// |
| 1071 | #define EFI_ACPI_5_1_FPDT_RECORD_REVISION_FIRMWARE_BASIC_BOOT_POINTER 0x01 |
| 1072 | #define EFI_ACPI_5_1_FPDT_RECORD_REVISION_S3_PERFORMANCE_TABLE_POINTER 0x01 |
| 1073 | |
| 1074 | /// |
| 1075 | /// FPDT Runtime Performance Record Types |
| 1076 | /// |
| 1077 | #define EFI_ACPI_5_1_FPDT_RUNTIME_RECORD_TYPE_S3_RESUME 0x0000 |
| 1078 | #define EFI_ACPI_5_1_FPDT_RUNTIME_RECORD_TYPE_S3_SUSPEND 0x0001 |
| 1079 | #define EFI_ACPI_5_1_FPDT_RUNTIME_RECORD_TYPE_FIRMWARE_BASIC_BOOT 0x0002 |
| 1080 | |
| 1081 | /// |
| 1082 | /// FPDT Runtime Performance Record Revision |
| 1083 | /// |
| 1084 | #define EFI_ACPI_5_1_FPDT_RUNTIME_RECORD_REVISION_S3_RESUME 0x01 |
| 1085 | #define EFI_ACPI_5_1_FPDT_RUNTIME_RECORD_REVISION_S3_SUSPEND 0x01 |
| 1086 | #define EFI_ACPI_5_1_FPDT_RUNTIME_RECORD_REVISION_FIRMWARE_BASIC_BOOT 0x02 |
| 1087 | |
| 1088 | /// |
| 1089 | /// FPDT Performance Record header |
| 1090 | /// |
| 1091 | typedef struct { |
| 1092 | UINT16 Type; |
| 1093 | UINT8 Length; |
| 1094 | UINT8 Revision; |
| 1095 | } EFI_ACPI_5_1_FPDT_PERFORMANCE_RECORD_HEADER; |
| 1096 | |
| 1097 | /// |
| 1098 | /// FPDT Performance Table header |
| 1099 | /// |
| 1100 | typedef struct { |
| 1101 | UINT32 Signature; |
| 1102 | UINT32 Length; |
| 1103 | } EFI_ACPI_5_1_FPDT_PERFORMANCE_TABLE_HEADER; |
| 1104 | |
| 1105 | /// |
| 1106 | /// FPDT Firmware Basic Boot Performance Pointer Record Structure |
| 1107 | /// |
| 1108 | typedef struct { |
| 1109 | EFI_ACPI_5_1_FPDT_PERFORMANCE_RECORD_HEADER Header; |
| 1110 | UINT32 Reserved; |
| 1111 | /// |
| 1112 | /// 64-bit processor-relative physical address of the Basic Boot Performance Table. |
| 1113 | /// |
| 1114 | UINT64 BootPerformanceTablePointer; |
| 1115 | } EFI_ACPI_5_1_FPDT_BOOT_PERFORMANCE_TABLE_POINTER_RECORD; |
| 1116 | |
| 1117 | /// |
| 1118 | /// FPDT S3 Performance Table Pointer Record Structure |
| 1119 | /// |
| 1120 | typedef struct { |
| 1121 | EFI_ACPI_5_1_FPDT_PERFORMANCE_RECORD_HEADER Header; |
| 1122 | UINT32 Reserved; |
| 1123 | /// |
| 1124 | /// 64-bit processor-relative physical address of the S3 Performance Table. |
| 1125 | /// |
| 1126 | UINT64 S3PerformanceTablePointer; |
| 1127 | } EFI_ACPI_5_1_FPDT_S3_PERFORMANCE_TABLE_POINTER_RECORD; |
| 1128 | |
| 1129 | /// |
| 1130 | /// FPDT Firmware Basic Boot Performance Record Structure |
| 1131 | /// |
| 1132 | typedef struct { |
| 1133 | EFI_ACPI_5_1_FPDT_PERFORMANCE_RECORD_HEADER Header; |
| 1134 | UINT32 Reserved; |
| 1135 | /// |
| 1136 | /// Timer value logged at the beginning of firmware image execution. |
| 1137 | /// This may not always be zero or near zero. |
| 1138 | /// |
| 1139 | UINT64 ResetEnd; |
| 1140 | /// |
| 1141 | /// Timer value logged just prior to loading the OS boot loader into memory. |
| 1142 | /// For non-UEFI compatible boots, this field must be zero. |
| 1143 | /// |
| 1144 | UINT64 OsLoaderLoadImageStart; |
| 1145 | /// |
| 1146 | /// Timer value logged just prior to launching the previously loaded OS boot loader image. |
| 1147 | /// For non-UEFI compatible boots, the timer value logged will be just prior |
| 1148 | /// to the INT 19h handler invocation. |
| 1149 | /// |
| 1150 | UINT64 OsLoaderStartImageStart; |
| 1151 | /// |
| 1152 | /// Timer value logged at the point when the OS loader calls the |
| 1153 | /// ExitBootServices function for UEFI compatible firmware. |
| 1154 | /// For non-UEFI compatible boots, this field must be zero. |
| 1155 | /// |
| 1156 | UINT64 ExitBootServicesEntry; |
| 1157 | /// |
| 1158 | /// Timer value logged at the point just prior to when the OS loader gaining |
| 1159 | /// control back from calls the ExitBootServices function for UEFI compatible firmware. |
| 1160 | /// For non-UEFI compatible boots, this field must be zero. |
| 1161 | /// |
| 1162 | UINT64 ExitBootServicesExit; |
| 1163 | } EFI_ACPI_5_1_FPDT_FIRMWARE_BASIC_BOOT_RECORD; |
| 1164 | |
| 1165 | /// |
| 1166 | /// FPDT Firmware Basic Boot Performance Table signature |
| 1167 | /// |
| 1168 | #define EFI_ACPI_5_1_FPDT_BOOT_PERFORMANCE_TABLE_SIGNATURE SIGNATURE_32('F', 'B', 'P', 'T') |
| 1169 | |
| 1170 | // |
| 1171 | // FPDT Firmware Basic Boot Performance Table |
| 1172 | // |
| 1173 | typedef struct { |
| 1174 | EFI_ACPI_5_1_FPDT_PERFORMANCE_TABLE_HEADER Header; |
| 1175 | // |
| 1176 | // one or more Performance Records. |
| 1177 | // |
| 1178 | } EFI_ACPI_5_1_FPDT_FIRMWARE_BASIC_BOOT_TABLE; |
| 1179 | |
| 1180 | /// |
| 1181 | /// FPDT "S3PT" S3 Performance Table |
| 1182 | /// |
| 1183 | #define EFI_ACPI_5_1_FPDT_S3_PERFORMANCE_TABLE_SIGNATURE SIGNATURE_32('S', '3', 'P', 'T') |
| 1184 | |
| 1185 | // |
| 1186 | // FPDT Firmware S3 Boot Performance Table |
| 1187 | // |
| 1188 | typedef struct { |
| 1189 | EFI_ACPI_5_1_FPDT_PERFORMANCE_TABLE_HEADER Header; |
| 1190 | // |
| 1191 | // one or more Performance Records. |
| 1192 | // |
| 1193 | } EFI_ACPI_5_1_FPDT_FIRMWARE_S3_BOOT_TABLE; |
| 1194 | |
| 1195 | /// |
| 1196 | /// FPDT Basic S3 Resume Performance Record |
| 1197 | /// |
| 1198 | typedef struct { |
| 1199 | EFI_ACPI_5_1_FPDT_PERFORMANCE_RECORD_HEADER Header; |
| 1200 | /// |
| 1201 | /// A count of the number of S3 resume cycles since the last full boot sequence. |
| 1202 | /// |
| 1203 | UINT32 ResumeCount; |
| 1204 | /// |
| 1205 | /// Timer recorded at the end of BIOS S3 resume, just prior to handoff to the |
| 1206 | /// OS waking vector. Only the most recent resume cycle's time is retained. |
| 1207 | /// |
| 1208 | UINT64 FullResume; |
| 1209 | /// |
| 1210 | /// Average timer value of all resume cycles logged since the last full boot |
| 1211 | /// sequence, including the most recent resume. Note that the entire log of |
| 1212 | /// timer values does not need to be retained in order to calculate this average. |
| 1213 | /// |
| 1214 | UINT64 AverageResume; |
| 1215 | } EFI_ACPI_5_1_FPDT_S3_RESUME_RECORD; |
| 1216 | |
| 1217 | /// |
| 1218 | /// FPDT Basic S3 Suspend Performance Record |
| 1219 | /// |
| 1220 | typedef struct { |
| 1221 | EFI_ACPI_5_1_FPDT_PERFORMANCE_RECORD_HEADER Header; |
| 1222 | /// |
| 1223 | /// Timer value recorded at the OS write to SLP_TYP upon entry to S3. |
| 1224 | /// Only the most recent suspend cycle's timer value is retained. |
| 1225 | /// |
| 1226 | UINT64 SuspendStart; |
| 1227 | /// |
| 1228 | /// Timer value recorded at the final firmware write to SLP_TYP (or other |
| 1229 | /// mechanism) used to trigger hardware entry to S3. |
| 1230 | /// Only the most recent suspend cycle's timer value is retained. |
| 1231 | /// |
| 1232 | UINT64 SuspendEnd; |
| 1233 | } EFI_ACPI_5_1_FPDT_S3_SUSPEND_RECORD; |
| 1234 | |
| 1235 | /// |
| 1236 | /// Firmware Performance Record Table definition. |
| 1237 | /// |
| 1238 | typedef struct { |
| 1239 | EFI_ACPI_DESCRIPTION_HEADER Header; |
| 1240 | } EFI_ACPI_5_1_FIRMWARE_PERFORMANCE_RECORD_TABLE; |
| 1241 | |
| 1242 | /// |
| 1243 | /// Generic Timer Description Table definition. |
| 1244 | /// |
| 1245 | typedef struct { |
| 1246 | EFI_ACPI_DESCRIPTION_HEADER Header; |
| 1247 | UINT64 CntControlBasePhysicalAddress; |
| 1248 | UINT32 Reserved; |
| 1249 | UINT32 SecurePL1TimerGSIV; |
| 1250 | UINT32 SecurePL1TimerFlags; |
| 1251 | UINT32 NonSecurePL1TimerGSIV; |
| 1252 | UINT32 NonSecurePL1TimerFlags; |
| 1253 | UINT32 VirtualTimerGSIV; |
| 1254 | UINT32 VirtualTimerFlags; |
| 1255 | UINT32 NonSecurePL2TimerGSIV; |
| 1256 | UINT32 NonSecurePL2TimerFlags; |
| 1257 | UINT64 CntReadBasePhysicalAddress; |
| 1258 | UINT32 PlatformTimerCount; |
| 1259 | UINT32 PlatformTimerOffset; |
| 1260 | } EFI_ACPI_5_1_GENERIC_TIMER_DESCRIPTION_TABLE; |
| 1261 | |
| 1262 | /// |
| 1263 | /// GTDT Version (as defined in ACPI 5.1 spec.) |
| 1264 | /// |
| 1265 | #define EFI_ACPI_5_1_GENERIC_TIMER_DESCRIPTION_TABLE_REVISION 0x02 |
| 1266 | |
| 1267 | /// |
| 1268 | /// Timer Flags. All other bits are reserved and must be 0. |
| 1269 | /// |
| 1270 | #define EFI_ACPI_5_1_GTDT_TIMER_FLAG_TIMER_INTERRUPT_MODE BIT0 |
| 1271 | #define EFI_ACPI_5_1_GTDT_TIMER_FLAG_TIMER_INTERRUPT_POLARITY BIT1 |
| 1272 | #define EFI_ACPI_5_1_GTDT_TIMER_FLAG_ALWAYS_ON_CAPABILITY BIT2 |
| 1273 | |
| 1274 | /// |
| 1275 | /// Platform Timer Type |
| 1276 | /// |
| 1277 | #define EFI_ACPI_5_1_GTDT_GT_BLOCK 0 |
| 1278 | #define EFI_ACPI_5_1_GTDT_SBSA_GENERIC_WATCHDOG 1 |
| 1279 | |
| 1280 | /// |
| 1281 | /// GT Block Structure |
| 1282 | /// |
| 1283 | typedef struct { |
| 1284 | UINT8 Type; |
| 1285 | UINT16 Length; |
| 1286 | UINT8 Reserved; |
| 1287 | UINT64 CntCtlBase; |
| 1288 | UINT32 GTBlockTimerCount; |
| 1289 | UINT32 GTBlockTimerOffset; |
| 1290 | } EFI_ACPI_5_1_GTDT_GT_BLOCK_STRUCTURE; |
| 1291 | |
| 1292 | /// |
| 1293 | /// GT Block Timer Structure |
| 1294 | /// |
| 1295 | typedef struct { |
| 1296 | UINT8 GTFrameNumber; |
| 1297 | UINT8 Reserved[3]; |
| 1298 | UINT64 CntBaseX; |
| 1299 | UINT64 CntEL0BaseX; |
| 1300 | UINT32 GTxPhysicalTimerGSIV; |
| 1301 | UINT32 GTxPhysicalTimerFlags; |
| 1302 | UINT32 GTxVirtualTimerGSIV; |
| 1303 | UINT32 GTxVirtualTimerFlags; |
| 1304 | UINT32 GTxCommonFlags; |
| 1305 | } EFI_ACPI_5_1_GTDT_GT_BLOCK_TIMER_STRUCTURE; |
| 1306 | |
| 1307 | /// |
| 1308 | /// GT Block Physical Timers and Virtual Timers Flags. All other bits are reserved and must be 0. |
| 1309 | /// |
| 1310 | #define EFI_ACPI_5_1_GTDT_GT_BLOCK_TIMER_FLAG_TIMER_INTERRUPT_MODE BIT0 |
| 1311 | #define EFI_ACPI_5_1_GTDT_GT_BLOCK_TIMER_FLAG_TIMER_INTERRUPT_POLARITY BIT1 |
| 1312 | |
| 1313 | /// |
| 1314 | /// Common Flags Flags. All other bits are reserved and must be 0. |
| 1315 | /// |
| 1316 | #define EFI_ACPI_5_1_GTDT_GT_BLOCK_COMMON_FLAG_SECURE_TIMER BIT0 |
| 1317 | #define EFI_ACPI_5_1_GTDT_GT_BLOCK_COMMON_FLAG_ALWAYS_ON_CAPABILITY BIT1 |
| 1318 | |
| 1319 | /// |
| 1320 | /// SBSA Generic Watchdog Structure |
| 1321 | /// |
| 1322 | typedef struct { |
| 1323 | UINT8 Type; |
| 1324 | UINT16 Length; |
| 1325 | UINT8 Reserved; |
| 1326 | UINT64 RefreshFramePhysicalAddress; |
| 1327 | UINT64 WatchdogControlFramePhysicalAddress; |
| 1328 | UINT32 WatchdogTimerGSIV; |
| 1329 | UINT32 WatchdogTimerFlags; |
| 1330 | } EFI_ACPI_5_1_GTDT_SBSA_GENERIC_WATCHDOG_STRUCTURE; |
| 1331 | |
| 1332 | /// |
| 1333 | /// SBSA Generic Watchdog Timer Flags. All other bits are reserved and must be 0. |
| 1334 | /// |
| 1335 | #define EFI_ACPI_5_1_GTDT_SBSA_GENERIC_WATCHDOG_FLAG_TIMER_INTERRUPT_MODE BIT0 |
| 1336 | #define EFI_ACPI_5_1_GTDT_SBSA_GENERIC_WATCHDOG_FLAG_TIMER_INTERRUPT_POLARITY BIT1 |
| 1337 | #define EFI_ACPI_5_1_GTDT_SBSA_GENERIC_WATCHDOG_FLAG_SECURE_TIMER BIT2 |
| 1338 | |
| 1339 | /// |
| 1340 | /// Boot Error Record Table (BERT) |
| 1341 | /// |
| 1342 | typedef struct { |
| 1343 | EFI_ACPI_DESCRIPTION_HEADER Header; |
| 1344 | UINT32 BootErrorRegionLength; |
| 1345 | UINT64 BootErrorRegion; |
| 1346 | } EFI_ACPI_5_1_BOOT_ERROR_RECORD_TABLE_HEADER; |
| 1347 | |
| 1348 | /// |
| 1349 | /// BERT Version (as defined in ACPI 5.1 spec.) |
| 1350 | /// |
| 1351 | #define EFI_ACPI_5_1_BOOT_ERROR_RECORD_TABLE_REVISION 0x01 |
| 1352 | |
| 1353 | /// |
| 1354 | /// Boot Error Region Block Status Definition |
| 1355 | /// |
| 1356 | typedef struct { |
| 1357 | UINT32 UncorrectableErrorValid:1; |
| 1358 | UINT32 CorrectableErrorValid:1; |
| 1359 | UINT32 MultipleUncorrectableErrors:1; |
| 1360 | UINT32 MultipleCorrectableErrors:1; |
| 1361 | UINT32 ErrorDataEntryCount:10; |
| 1362 | UINT32 Reserved:18; |
| 1363 | } EFI_ACPI_5_1_ERROR_BLOCK_STATUS; |
| 1364 | |
| 1365 | /// |
| 1366 | /// Boot Error Region Definition |
| 1367 | /// |
| 1368 | typedef struct { |
| 1369 | EFI_ACPI_5_1_ERROR_BLOCK_STATUS BlockStatus; |
| 1370 | UINT32 RawDataOffset; |
| 1371 | UINT32 RawDataLength; |
| 1372 | UINT32 DataLength; |
| 1373 | UINT32 ErrorSeverity; |
| 1374 | } EFI_ACPI_5_1_BOOT_ERROR_REGION_STRUCTURE; |
| 1375 | |
| 1376 | // |
| 1377 | // Boot Error Severity types |
| 1378 | // |
| 1379 | #define EFI_ACPI_5_1_ERROR_SEVERITY_CORRECTABLE 0x00 |
| 1380 | #define EFI_ACPI_5_1_ERROR_SEVERITY_FATAL 0x01 |
| 1381 | #define EFI_ACPI_5_1_ERROR_SEVERITY_CORRECTED 0x02 |
| 1382 | #define EFI_ACPI_5_1_ERROR_SEVERITY_NONE 0x03 |
| 1383 | |
| 1384 | /// |
| 1385 | /// Generic Error Data Entry Definition |
| 1386 | /// |
| 1387 | typedef struct { |
| 1388 | UINT8 SectionType[16]; |
| 1389 | UINT32 ErrorSeverity; |
| 1390 | UINT16 Revision; |
| 1391 | UINT8 ValidationBits; |
| 1392 | UINT8 Flags; |
| 1393 | UINT32 ErrorDataLength; |
| 1394 | UINT8 FruId[16]; |
| 1395 | UINT8 FruText[20]; |
| 1396 | } EFI_ACPI_5_1_GENERIC_ERROR_DATA_ENTRY_STRUCTURE; |
| 1397 | |
| 1398 | /// |
| 1399 | /// Generic Error Data Entry Version (as defined in ACPI 5.1 spec.) |
| 1400 | /// |
| 1401 | #define EFI_ACPI_5_1_GENERIC_ERROR_DATA_ENTRY_REVISION 0x0201 |
| 1402 | |
| 1403 | /// |
| 1404 | /// HEST - Hardware Error Source Table |
| 1405 | /// |
| 1406 | typedef struct { |
| 1407 | EFI_ACPI_DESCRIPTION_HEADER Header; |
| 1408 | UINT32 ErrorSourceCount; |
| 1409 | } EFI_ACPI_5_1_HARDWARE_ERROR_SOURCE_TABLE_HEADER; |
| 1410 | |
| 1411 | /// |
| 1412 | /// HEST Version (as defined in ACPI 5.1 spec.) |
| 1413 | /// |
| 1414 | #define EFI_ACPI_5_1_HARDWARE_ERROR_SOURCE_TABLE_REVISION 0x01 |
| 1415 | |
| 1416 | // |
| 1417 | // Error Source structure types. |
| 1418 | // |
| 1419 | #define EFI_ACPI_5_1_IA32_ARCHITECTURE_MACHINE_CHECK_EXCEPTION 0x00 |
| 1420 | #define EFI_ACPI_5_1_IA32_ARCHITECTURE_CORRECTED_MACHINE_CHECK 0x01 |
| 1421 | #define EFI_ACPI_5_1_IA32_ARCHITECTURE_NMI_ERROR 0x02 |
| 1422 | #define EFI_ACPI_5_1_PCI_EXPRESS_ROOT_PORT_AER 0x06 |
| 1423 | #define EFI_ACPI_5_1_PCI_EXPRESS_DEVICE_AER 0x07 |
| 1424 | #define EFI_ACPI_5_1_PCI_EXPRESS_BRIDGE_AER 0x08 |
| 1425 | #define EFI_ACPI_5_1_GENERIC_HARDWARE_ERROR 0x09 |
| 1426 | |
| 1427 | // |
| 1428 | // Error Source structure flags. |
| 1429 | // |
| 1430 | #define EFI_ACPI_5_1_ERROR_SOURCE_FLAG_FIRMWARE_FIRST (1 << 0) |
| 1431 | #define EFI_ACPI_5_1_ERROR_SOURCE_FLAG_GLOBAL (1 << 1) |
| 1432 | |
| 1433 | /// |
| 1434 | /// IA-32 Architecture Machine Check Exception Structure Definition |
| 1435 | /// |
| 1436 | typedef struct { |
| 1437 | UINT16 Type; |
| 1438 | UINT16 SourceId; |
| 1439 | UINT8 Reserved0[2]; |
| 1440 | UINT8 Flags; |
| 1441 | UINT8 Enabled; |
| 1442 | UINT32 NumberOfRecordsToPreAllocate; |
| 1443 | UINT32 MaxSectionsPerRecord; |
| 1444 | UINT64 GlobalCapabilityInitData; |
| 1445 | UINT64 GlobalControlInitData; |
| 1446 | UINT8 NumberOfHardwareBanks; |
| 1447 | UINT8 Reserved1[7]; |
| 1448 | } EFI_ACPI_5_1_IA32_ARCHITECTURE_MACHINE_CHECK_EXCEPTION_STRUCTURE; |
| 1449 | |
| 1450 | /// |
| 1451 | /// IA-32 Architecture Machine Check Bank Structure Definition |
| 1452 | /// |
| 1453 | typedef struct { |
| 1454 | UINT8 BankNumber; |
| 1455 | UINT8 ClearStatusOnInitialization; |
| 1456 | UINT8 StatusDataFormat; |
| 1457 | UINT8 Reserved0; |
| 1458 | UINT32 ControlRegisterMsrAddress; |
| 1459 | UINT64 ControlInitData; |
| 1460 | UINT32 StatusRegisterMsrAddress; |
| 1461 | UINT32 AddressRegisterMsrAddress; |
| 1462 | UINT32 MiscRegisterMsrAddress; |
| 1463 | } EFI_ACPI_5_1_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_BANK_STRUCTURE; |
| 1464 | |
| 1465 | /// |
| 1466 | /// IA-32 Architecture Machine Check Bank Structure MCA data format |
| 1467 | /// |
| 1468 | #define EFI_ACPI_5_1_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_IA32 0x00 |
| 1469 | #define EFI_ACPI_5_1_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_INTEL64 0x01 |
| 1470 | #define EFI_ACPI_5_1_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_AMD64 0x02 |
| 1471 | |
| 1472 | // |
| 1473 | // Hardware Error Notification types. All other values are reserved |
| 1474 | // |
| 1475 | #define EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_POLLED 0x00 |
| 1476 | #define EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_EXTERNAL_INTERRUPT 0x01 |
| 1477 | #define EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_LOCAL_INTERRUPT 0x02 |
| 1478 | #define EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_SCI 0x03 |
| 1479 | #define EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_NMI 0x04 |
| 1480 | |
| 1481 | /// |
| 1482 | /// Hardware Error Notification Configuration Write Enable Structure Definition |
| 1483 | /// |
| 1484 | typedef struct { |
| 1485 | UINT16 Type:1; |
| 1486 | UINT16 PollInterval:1; |
| 1487 | UINT16 SwitchToPollingThresholdValue:1; |
| 1488 | UINT16 SwitchToPollingThresholdWindow:1; |
| 1489 | UINT16 ErrorThresholdValue:1; |
| 1490 | UINT16 ErrorThresholdWindow:1; |
| 1491 | UINT16 Reserved:10; |
| 1492 | } EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_CONFIGURATION_WRITE_ENABLE_STRUCTURE; |
| 1493 | |
| 1494 | /// |
| 1495 | /// Hardware Error Notification Structure Definition |
| 1496 | /// |
| 1497 | typedef struct { |
| 1498 | UINT8 Type; |
| 1499 | UINT8 Length; |
| 1500 | EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_CONFIGURATION_WRITE_ENABLE_STRUCTURE ConfigurationWriteEnable; |
| 1501 | UINT32 PollInterval; |
| 1502 | UINT32 Vector; |
| 1503 | UINT32 SwitchToPollingThresholdValue; |
| 1504 | UINT32 SwitchToPollingThresholdWindow; |
| 1505 | UINT32 ErrorThresholdValue; |
| 1506 | UINT32 ErrorThresholdWindow; |
| 1507 | } EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_STRUCTURE; |
| 1508 | |
| 1509 | /// |
| 1510 | /// IA-32 Architecture Corrected Machine Check Structure Definition |
| 1511 | /// |
| 1512 | typedef struct { |
| 1513 | UINT16 Type; |
| 1514 | UINT16 SourceId; |
| 1515 | UINT8 Reserved0[2]; |
| 1516 | UINT8 Flags; |
| 1517 | UINT8 Enabled; |
| 1518 | UINT32 NumberOfRecordsToPreAllocate; |
| 1519 | UINT32 MaxSectionsPerRecord; |
| 1520 | EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure; |
| 1521 | UINT8 NumberOfHardwareBanks; |
| 1522 | UINT8 Reserved1[3]; |
| 1523 | } EFI_ACPI_5_1_IA32_ARCHITECTURE_CORRECTED_MACHINE_CHECK_STRUCTURE; |
| 1524 | |
| 1525 | /// |
| 1526 | /// IA-32 Architecture NMI Error Structure Definition |
| 1527 | /// |
| 1528 | typedef struct { |
| 1529 | UINT16 Type; |
| 1530 | UINT16 SourceId; |
| 1531 | UINT8 Reserved0[2]; |
| 1532 | UINT32 NumberOfRecordsToPreAllocate; |
| 1533 | UINT32 MaxSectionsPerRecord; |
| 1534 | UINT32 MaxRawDataLength; |
| 1535 | } EFI_ACPI_5_1_IA32_ARCHITECTURE_NMI_ERROR_STRUCTURE; |
| 1536 | |
| 1537 | /// |
| 1538 | /// PCI Express Root Port AER Structure Definition |
| 1539 | /// |
| 1540 | typedef struct { |
| 1541 | UINT16 Type; |
| 1542 | UINT16 SourceId; |
| 1543 | UINT8 Reserved0[2]; |
| 1544 | UINT8 Flags; |
| 1545 | UINT8 Enabled; |
| 1546 | UINT32 NumberOfRecordsToPreAllocate; |
| 1547 | UINT32 MaxSectionsPerRecord; |
| 1548 | UINT32 Bus; |
| 1549 | UINT16 Device; |
| 1550 | UINT16 Function; |
| 1551 | UINT16 DeviceControl; |
| 1552 | UINT8 Reserved1[2]; |
| 1553 | UINT32 UncorrectableErrorMask; |
| 1554 | UINT32 UncorrectableErrorSeverity; |
| 1555 | UINT32 CorrectableErrorMask; |
| 1556 | UINT32 AdvancedErrorCapabilitiesAndControl; |
| 1557 | UINT32 RootErrorCommand; |
| 1558 | } EFI_ACPI_5_1_PCI_EXPRESS_ROOT_PORT_AER_STRUCTURE; |
| 1559 | |
| 1560 | /// |
| 1561 | /// PCI Express Device AER Structure Definition |
| 1562 | /// |
| 1563 | typedef struct { |
| 1564 | UINT16 Type; |
| 1565 | UINT16 SourceId; |
| 1566 | UINT8 Reserved0[2]; |
| 1567 | UINT8 Flags; |
| 1568 | UINT8 Enabled; |
| 1569 | UINT32 NumberOfRecordsToPreAllocate; |
| 1570 | UINT32 MaxSectionsPerRecord; |
| 1571 | UINT32 Bus; |
| 1572 | UINT16 Device; |
| 1573 | UINT16 Function; |
| 1574 | UINT16 DeviceControl; |
| 1575 | UINT8 Reserved1[2]; |
| 1576 | UINT32 UncorrectableErrorMask; |
| 1577 | UINT32 UncorrectableErrorSeverity; |
| 1578 | UINT32 CorrectableErrorMask; |
| 1579 | UINT32 AdvancedErrorCapabilitiesAndControl; |
| 1580 | } EFI_ACPI_5_1_PCI_EXPRESS_DEVICE_AER_STRUCTURE; |
| 1581 | |
| 1582 | /// |
| 1583 | /// PCI Express Bridge AER Structure Definition |
| 1584 | /// |
| 1585 | typedef struct { |
| 1586 | UINT16 Type; |
| 1587 | UINT16 SourceId; |
| 1588 | UINT8 Reserved0[2]; |
| 1589 | UINT8 Flags; |
| 1590 | UINT8 Enabled; |
| 1591 | UINT32 NumberOfRecordsToPreAllocate; |
| 1592 | UINT32 MaxSectionsPerRecord; |
| 1593 | UINT32 Bus; |
| 1594 | UINT16 Device; |
| 1595 | UINT16 Function; |
| 1596 | UINT16 DeviceControl; |
| 1597 | UINT8 Reserved1[2]; |
| 1598 | UINT32 UncorrectableErrorMask; |
| 1599 | UINT32 UncorrectableErrorSeverity; |
| 1600 | UINT32 CorrectableErrorMask; |
| 1601 | UINT32 AdvancedErrorCapabilitiesAndControl; |
| 1602 | UINT32 SecondaryUncorrectableErrorMask; |
| 1603 | UINT32 SecondaryUncorrectableErrorSeverity; |
| 1604 | UINT32 SecondaryAdvancedErrorCapabilitiesAndControl; |
| 1605 | } EFI_ACPI_5_1_PCI_EXPRESS_BRIDGE_AER_STRUCTURE; |
| 1606 | |
| 1607 | /// |
| 1608 | /// Generic Hardware Error Source Structure Definition |
| 1609 | /// |
| 1610 | typedef struct { |
| 1611 | UINT16 Type; |
| 1612 | UINT16 SourceId; |
| 1613 | UINT16 RelatedSourceId; |
| 1614 | UINT8 Flags; |
| 1615 | UINT8 Enabled; |
| 1616 | UINT32 NumberOfRecordsToPreAllocate; |
| 1617 | UINT32 MaxSectionsPerRecord; |
| 1618 | UINT32 MaxRawDataLength; |
| 1619 | EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE ErrorStatusAddress; |
| 1620 | EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure; |
| 1621 | UINT32 ErrorStatusBlockLength; |
| 1622 | } EFI_ACPI_5_1_GENERIC_HARDWARE_ERROR_SOURCE_STRUCTURE; |
| 1623 | |
| 1624 | /// |
| 1625 | /// Generic Error Status Definition |
| 1626 | /// |
| 1627 | typedef struct { |
| 1628 | EFI_ACPI_5_1_ERROR_BLOCK_STATUS BlockStatus; |
| 1629 | UINT32 RawDataOffset; |
| 1630 | UINT32 RawDataLength; |
| 1631 | UINT32 DataLength; |
| 1632 | UINT32 ErrorSeverity; |
| 1633 | } EFI_ACPI_5_1_GENERIC_ERROR_STATUS_STRUCTURE; |
| 1634 | |
| 1635 | /// |
| 1636 | /// ERST - Error Record Serialization Table |
| 1637 | /// |
| 1638 | typedef struct { |
| 1639 | EFI_ACPI_DESCRIPTION_HEADER Header; |
| 1640 | UINT32 SerializationHeaderSize; |
| 1641 | UINT8 Reserved0[4]; |
| 1642 | UINT32 InstructionEntryCount; |
| 1643 | } EFI_ACPI_5_1_ERROR_RECORD_SERIALIZATION_TABLE_HEADER; |
| 1644 | |
| 1645 | /// |
| 1646 | /// ERST Version (as defined in ACPI 5.1 spec.) |
| 1647 | /// |
| 1648 | #define EFI_ACPI_5_1_ERROR_RECORD_SERIALIZATION_TABLE_REVISION 0x01 |
| 1649 | |
| 1650 | /// |
| 1651 | /// ERST Serialization Actions |
| 1652 | /// |
| 1653 | #define EFI_ACPI_5_1_ERST_BEGIN_WRITE_OPERATION 0x00 |
| 1654 | #define EFI_ACPI_5_1_ERST_BEGIN_READ_OPERATION 0x01 |
| 1655 | #define EFI_ACPI_5_1_ERST_BEGIN_CLEAR_OPERATION 0x02 |
| 1656 | #define EFI_ACPI_5_1_ERST_END_OPERATION 0x03 |
| 1657 | #define EFI_ACPI_5_1_ERST_SET_RECORD_OFFSET 0x04 |
| 1658 | #define EFI_ACPI_5_1_ERST_EXECUTE_OPERATION 0x05 |
| 1659 | #define EFI_ACPI_5_1_ERST_CHECK_BUSY_STATUS 0x06 |
| 1660 | #define EFI_ACPI_5_1_ERST_GET_COMMAND_STATUS 0x07 |
| 1661 | #define EFI_ACPI_5_1_ERST_GET_RECORD_IDENTIFIER 0x08 |
| 1662 | #define EFI_ACPI_5_1_ERST_SET_RECORD_IDENTIFIER 0x09 |
| 1663 | #define EFI_ACPI_5_1_ERST_GET_RECORD_COUNT 0x0A |
| 1664 | #define EFI_ACPI_5_1_ERST_BEGIN_DUMMY_WRITE_OPERATION 0x0B |
| 1665 | #define EFI_ACPI_5_1_ERST_GET_ERROR_LOG_ADDRESS_RANGE 0x0D |
| 1666 | #define EFI_ACPI_5_1_ERST_GET_ERROR_LOG_ADDRESS_RANGE_LENGTH 0x0E |
| 1667 | #define EFI_ACPI_5_1_ERST_GET_ERROR_LOG_ADDRESS_RANGE_ATTRIBUTES 0x0F |
| 1668 | |
| 1669 | /// |
| 1670 | /// ERST Action Command Status |
| 1671 | /// |
| 1672 | #define EFI_ACPI_5_1_ERST_STATUS_SUCCESS 0x00 |
| 1673 | #define EFI_ACPI_5_1_ERST_STATUS_NOT_ENOUGH_SPACE 0x01 |
| 1674 | #define EFI_ACPI_5_1_ERST_STATUS_HARDWARE_NOT_AVAILABLE 0x02 |
| 1675 | #define EFI_ACPI_5_1_ERST_STATUS_FAILED 0x03 |
| 1676 | #define EFI_ACPI_5_1_ERST_STATUS_RECORD_STORE_EMPTY 0x04 |
| 1677 | #define EFI_ACPI_5_1_ERST_STATUS_RECORD_NOT_FOUND 0x05 |
| 1678 | |
| 1679 | /// |
| 1680 | /// ERST Serialization Instructions |
| 1681 | /// |
| 1682 | #define EFI_ACPI_5_1_ERST_READ_REGISTER 0x00 |
| 1683 | #define EFI_ACPI_5_1_ERST_READ_REGISTER_VALUE 0x01 |
| 1684 | #define EFI_ACPI_5_1_ERST_WRITE_REGISTER 0x02 |
| 1685 | #define EFI_ACPI_5_1_ERST_WRITE_REGISTER_VALUE 0x03 |
| 1686 | #define EFI_ACPI_5_1_ERST_NOOP 0x04 |
| 1687 | #define EFI_ACPI_5_1_ERST_LOAD_VAR1 0x05 |
| 1688 | #define EFI_ACPI_5_1_ERST_LOAD_VAR2 0x06 |
| 1689 | #define EFI_ACPI_5_1_ERST_STORE_VAR1 0x07 |
| 1690 | #define EFI_ACPI_5_1_ERST_ADD 0x08 |
| 1691 | #define EFI_ACPI_5_1_ERST_SUBTRACT 0x09 |
| 1692 | #define EFI_ACPI_5_1_ERST_ADD_VALUE 0x0A |
| 1693 | #define EFI_ACPI_5_1_ERST_SUBTRACT_VALUE 0x0B |
| 1694 | #define EFI_ACPI_5_1_ERST_STALL 0x0C |
| 1695 | #define EFI_ACPI_5_1_ERST_STALL_WHILE_TRUE 0x0D |
| 1696 | #define EFI_ACPI_5_1_ERST_SKIP_NEXT_INSTRUCTION_IF_TRUE 0x0E |
| 1697 | #define EFI_ACPI_5_1_ERST_GOTO 0x0F |
| 1698 | #define EFI_ACPI_5_1_ERST_SET_SRC_ADDRESS_BASE 0x10 |
| 1699 | #define EFI_ACPI_5_1_ERST_SET_DST_ADDRESS_BASE 0x11 |
| 1700 | #define EFI_ACPI_5_1_ERST_MOVE_DATA 0x12 |
| 1701 | |
| 1702 | /// |
| 1703 | /// ERST Instruction Flags |
| 1704 | /// |
| 1705 | #define EFI_ACPI_5_1_ERST_PRESERVE_REGISTER 0x01 |
| 1706 | |
| 1707 | /// |
| 1708 | /// ERST Serialization Instruction Entry |
| 1709 | /// |
| 1710 | typedef struct { |
| 1711 | UINT8 SerializationAction; |
| 1712 | UINT8 Instruction; |
| 1713 | UINT8 Flags; |
| 1714 | UINT8 Reserved0; |
| 1715 | EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE RegisterRegion; |
| 1716 | UINT64 Value; |
| 1717 | UINT64 Mask; |
| 1718 | } EFI_ACPI_5_1_ERST_SERIALIZATION_INSTRUCTION_ENTRY; |
| 1719 | |
| 1720 | /// |
| 1721 | /// EINJ - Error Injection Table |
| 1722 | /// |
| 1723 | typedef struct { |
| 1724 | EFI_ACPI_DESCRIPTION_HEADER Header; |
| 1725 | UINT32 InjectionHeaderSize; |
| 1726 | UINT8 InjectionFlags; |
| 1727 | UINT8 Reserved0[3]; |
| 1728 | UINT32 InjectionEntryCount; |
| 1729 | } EFI_ACPI_5_1_ERROR_INJECTION_TABLE_HEADER; |
| 1730 | |
| 1731 | /// |
| 1732 | /// EINJ Version (as defined in ACPI 5.1 spec.) |
| 1733 | /// |
| 1734 | #define EFI_ACPI_5_1_ERROR_INJECTION_TABLE_REVISION 0x01 |
| 1735 | |
| 1736 | /// |
| 1737 | /// EINJ Error Injection Actions |
| 1738 | /// |
| 1739 | #define EFI_ACPI_5_1_EINJ_BEGIN_INJECTION_OPERATION 0x00 |
| 1740 | #define EFI_ACPI_5_1_EINJ_GET_TRIGGER_ERROR_ACTION_TABLE 0x01 |
| 1741 | #define EFI_ACPI_5_1_EINJ_SET_ERROR_TYPE 0x02 |
| 1742 | #define EFI_ACPI_5_1_EINJ_GET_ERROR_TYPE 0x03 |
| 1743 | #define EFI_ACPI_5_1_EINJ_END_OPERATION 0x04 |
| 1744 | #define EFI_ACPI_5_1_EINJ_EXECUTE_OPERATION 0x05 |
| 1745 | #define EFI_ACPI_5_1_EINJ_CHECK_BUSY_STATUS 0x06 |
| 1746 | #define EFI_ACPI_5_1_EINJ_GET_COMMAND_STATUS 0x07 |
| 1747 | #define EFI_ACPI_5_1_EINJ_TRIGGER_ERROR 0xFF |
| 1748 | |
| 1749 | /// |
| 1750 | /// EINJ Action Command Status |
| 1751 | /// |
| 1752 | #define EFI_ACPI_5_1_EINJ_STATUS_SUCCESS 0x00 |
| 1753 | #define EFI_ACPI_5_1_EINJ_STATUS_UNKNOWN_FAILURE 0x01 |
| 1754 | #define EFI_ACPI_5_1_EINJ_STATUS_INVALID_ACCESS 0x02 |
| 1755 | |
| 1756 | /// |
| 1757 | /// EINJ Error Type Definition |
| 1758 | /// |
| 1759 | #define EFI_ACPI_5_1_EINJ_ERROR_PROCESSOR_CORRECTABLE (1 << 0) |
| 1760 | #define EFI_ACPI_5_1_EINJ_ERROR_PROCESSOR_UNCORRECTABLE_NONFATAL (1 << 1) |
| 1761 | #define EFI_ACPI_5_1_EINJ_ERROR_PROCESSOR_UNCORRECTABLE_FATAL (1 << 2) |
| 1762 | #define EFI_ACPI_5_1_EINJ_ERROR_MEMORY_CORRECTABLE (1 << 3) |
| 1763 | #define EFI_ACPI_5_1_EINJ_ERROR_MEMORY_UNCORRECTABLE_NONFATAL (1 << 4) |
| 1764 | #define EFI_ACPI_5_1_EINJ_ERROR_MEMORY_UNCORRECTABLE_FATAL (1 << 5) |
| 1765 | #define EFI_ACPI_5_1_EINJ_ERROR_PCI_EXPRESS_CORRECTABLE (1 << 6) |
| 1766 | #define EFI_ACPI_5_1_EINJ_ERROR_PCI_EXPRESS_UNCORRECTABLE_NONFATAL (1 << 7) |
| 1767 | #define EFI_ACPI_5_1_EINJ_ERROR_PCI_EXPRESS_UNCORRECTABLE_FATAL (1 << 8) |
| 1768 | #define EFI_ACPI_5_1_EINJ_ERROR_PLATFORM_CORRECTABLE (1 << 9) |
| 1769 | #define EFI_ACPI_5_1_EINJ_ERROR_PLATFORM_UNCORRECTABLE_NONFATAL (1 << 10) |
| 1770 | #define EFI_ACPI_5_1_EINJ_ERROR_PLATFORM_UNCORRECTABLE_FATAL (1 << 11) |
| 1771 | |
| 1772 | /// |
| 1773 | /// EINJ Injection Instructions |
| 1774 | /// |
| 1775 | #define EFI_ACPI_5_1_EINJ_READ_REGISTER 0x00 |
| 1776 | #define EFI_ACPI_5_1_EINJ_READ_REGISTER_VALUE 0x01 |
| 1777 | #define EFI_ACPI_5_1_EINJ_WRITE_REGISTER 0x02 |
| 1778 | #define EFI_ACPI_5_1_EINJ_WRITE_REGISTER_VALUE 0x03 |
| 1779 | #define EFI_ACPI_5_1_EINJ_NOOP 0x04 |
| 1780 | |
| 1781 | /// |
| 1782 | /// EINJ Instruction Flags |
| 1783 | /// |
| 1784 | #define EFI_ACPI_5_1_EINJ_PRESERVE_REGISTER 0x01 |
| 1785 | |
| 1786 | /// |
| 1787 | /// EINJ Injection Instruction Entry |
| 1788 | /// |
| 1789 | typedef struct { |
| 1790 | UINT8 InjectionAction; |
| 1791 | UINT8 Instruction; |
| 1792 | UINT8 Flags; |
| 1793 | UINT8 Reserved0; |
| 1794 | EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE RegisterRegion; |
| 1795 | UINT64 Value; |
| 1796 | UINT64 Mask; |
| 1797 | } EFI_ACPI_5_1_EINJ_INJECTION_INSTRUCTION_ENTRY; |
| 1798 | |
| 1799 | /// |
| 1800 | /// EINJ Trigger Action Table |
| 1801 | /// |
| 1802 | typedef struct { |
| 1803 | UINT32 HeaderSize; |
| 1804 | UINT32 Revision; |
| 1805 | UINT32 TableSize; |
| 1806 | UINT32 EntryCount; |
| 1807 | } EFI_ACPI_5_1_EINJ_TRIGGER_ACTION_TABLE; |
| 1808 | |
| 1809 | /// |
| 1810 | /// Platform Communications Channel Table (PCCT) |
| 1811 | /// |
| 1812 | typedef struct { |
| 1813 | EFI_ACPI_DESCRIPTION_HEADER Header; |
| 1814 | UINT32 Flags; |
| 1815 | UINT64 Reserved; |
| 1816 | } EFI_ACPI_5_1_PLATFORM_COMMUNICATION_CHANNEL_TABLE_HEADER; |
| 1817 | |
| 1818 | /// |
| 1819 | /// PCCT Version (as defined in ACPI 5.1 spec.) |
| 1820 | /// |
| 1821 | #define EFI_ACPI_5_1_PLATFORM_COMMUNICATION_CHANNEL_TABLE_REVISION 0x01 |
| 1822 | |
| 1823 | /// |
| 1824 | /// PCCT Global Flags |
| 1825 | /// |
| 1826 | #define EFI_ACPI_5_1_PCCT_FLAGS_SCI_DOORBELL BIT0 |
| 1827 | |
| 1828 | // |
| 1829 | // PCCT Subspace type |
| 1830 | // |
| 1831 | #define EFI_ACPI_5_1_PCCT_SUBSPACE_TYPE_GENERIC 0x00 |
| 1832 | |
| 1833 | /// |
| 1834 | /// PCC Subspace Structure Header |
| 1835 | /// |
| 1836 | typedef struct { |
| 1837 | UINT8 Type; |
| 1838 | UINT8 Length; |
| 1839 | } EFI_ACPI_5_1_PCCT_SUBSPACE_HEADER; |
| 1840 | |
| 1841 | /// |
| 1842 | /// Generic Communications Subspace Structure |
| 1843 | /// |
| 1844 | typedef struct { |
| 1845 | UINT8 Type; |
| 1846 | UINT8 Length; |
| 1847 | UINT8 Reserved[6]; |
| 1848 | UINT64 BaseAddress; |
| 1849 | UINT64 AddressLength; |
| 1850 | EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE DoorbellRegister; |
| 1851 | UINT64 DoorbellPreserve; |
| 1852 | UINT64 DoorbellWrite; |
| 1853 | UINT32 NominalLatency; |
| 1854 | UINT32 MaximumPeriodicAccessRate; |
| 1855 | UINT16 MinimumRequestTurnaroundTime; |
| 1856 | } EFI_ACPI_5_1_PCCT_SUBSPACE_GENERIC; |
| 1857 | |
| 1858 | /// |
| 1859 | /// Generic Communications Channel Shared Memory Region |
| 1860 | /// |
| 1861 | |
| 1862 | typedef struct { |
| 1863 | UINT8 Command; |
| 1864 | UINT8 Reserved:7; |
| 1865 | UINT8 GenerateSci:1; |
| 1866 | } EFI_ACPI_5_1_PCCT_GENERIC_SHARED_MEMORY_REGION_COMMAND; |
| 1867 | |
| 1868 | typedef struct { |
| 1869 | UINT8 CommandComplete:1; |
| 1870 | UINT8 SciDoorbell:1; |
| 1871 | UINT8 Error:1; |
| 1872 | UINT8 PlatformNotification:1; |
| 1873 | UINT8 Reserved:4; |
| 1874 | UINT8 Reserved1; |
| 1875 | } EFI_ACPI_5_1_PCCT_GENERIC_SHARED_MEMORY_REGION_STATUS; |
| 1876 | |
| 1877 | typedef struct { |
| 1878 | UINT32 Signature; |
| 1879 | EFI_ACPI_5_1_PCCT_GENERIC_SHARED_MEMORY_REGION_COMMAND Command; |
| 1880 | EFI_ACPI_5_1_PCCT_GENERIC_SHARED_MEMORY_REGION_STATUS Status; |
| 1881 | } EFI_ACPI_5_1_PCCT_GENERIC_SHARED_MEMORY_REGION_HEADER; |
| 1882 | |
| 1883 | // |
| 1884 | // Known table signatures |
| 1885 | // |
| 1886 | |
| 1887 | /// |
| 1888 | /// "RSD PTR " Root System Description Pointer |
| 1889 | /// |
| 1890 | #define EFI_ACPI_5_1_ROOT_SYSTEM_DESCRIPTION_POINTER_SIGNATURE SIGNATURE_64('R', 'S', 'D', ' ', 'P', 'T', 'R', ' ') |
| 1891 | |
| 1892 | /// |
| 1893 | /// "APIC" Multiple APIC Description Table |
| 1894 | /// |
| 1895 | #define EFI_ACPI_5_1_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('A', 'P', 'I', 'C') |
| 1896 | |
| 1897 | /// |
| 1898 | /// "BERT" Boot Error Record Table |
| 1899 | /// |
| 1900 | #define EFI_ACPI_5_1_BOOT_ERROR_RECORD_TABLE_SIGNATURE SIGNATURE_32('B', 'E', 'R', 'T') |
| 1901 | |
| 1902 | /// |
| 1903 | /// "BGRT" Boot Graphics Resource Table |
| 1904 | /// |
| 1905 | #define EFI_ACPI_5_1_BOOT_GRAPHICS_RESOURCE_TABLE_SIGNATURE SIGNATURE_32('B', 'G', 'R', 'T') |
| 1906 | |
| 1907 | /// |
| 1908 | /// "CPEP" Corrected Platform Error Polling Table |
| 1909 | /// |
| 1910 | #define EFI_ACPI_5_1_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_SIGNATURE SIGNATURE_32('C', 'P', 'E', 'P') |
| 1911 | |
| 1912 | /// |
| 1913 | /// "DSDT" Differentiated System Description Table |
| 1914 | /// |
| 1915 | #define EFI_ACPI_5_1_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('D', 'S', 'D', 'T') |
| 1916 | |
| 1917 | /// |
| 1918 | /// "ECDT" Embedded Controller Boot Resources Table |
| 1919 | /// |
| 1920 | #define EFI_ACPI_5_1_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_SIGNATURE SIGNATURE_32('E', 'C', 'D', 'T') |
| 1921 | |
| 1922 | /// |
| 1923 | /// "EINJ" Error Injection Table |
| 1924 | /// |
| 1925 | #define EFI_ACPI_5_1_ERROR_INJECTION_TABLE_SIGNATURE SIGNATURE_32('E', 'I', 'N', 'J') |
| 1926 | |
| 1927 | /// |
| 1928 | /// "ERST" Error Record Serialization Table |
| 1929 | /// |
| 1930 | #define EFI_ACPI_5_1_ERROR_RECORD_SERIALIZATION_TABLE_SIGNATURE SIGNATURE_32('E', 'R', 'S', 'T') |
| 1931 | |
| 1932 | /// |
| 1933 | /// "FACP" Fixed ACPI Description Table |
| 1934 | /// |
| 1935 | #define EFI_ACPI_5_1_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('F', 'A', 'C', 'P') |
| 1936 | |
| 1937 | /// |
| 1938 | /// "FACS" Firmware ACPI Control Structure |
| 1939 | /// |
| 1940 | #define EFI_ACPI_5_1_FIRMWARE_ACPI_CONTROL_STRUCTURE_SIGNATURE SIGNATURE_32('F', 'A', 'C', 'S') |
| 1941 | |
| 1942 | /// |
| 1943 | /// "FPDT" Firmware Performance Data Table |
| 1944 | /// |
| 1945 | #define EFI_ACPI_5_1_FIRMWARE_PERFORMANCE_DATA_TABLE_SIGNATURE SIGNATURE_32('F', 'P', 'D', 'T') |
| 1946 | |
| 1947 | /// |
| 1948 | /// "GTDT" Generic Timer Description Table |
| 1949 | /// |
| 1950 | #define EFI_ACPI_5_1_GENERIC_TIMER_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('G', 'T', 'D', 'T') |
| 1951 | |
| 1952 | /// |
| 1953 | /// "HEST" Hardware Error Source Table |
| 1954 | /// |
| 1955 | #define EFI_ACPI_5_1_HARDWARE_ERROR_SOURCE_TABLE_SIGNATURE SIGNATURE_32('H', 'E', 'S', 'T') |
| 1956 | |
| 1957 | /// |
| 1958 | /// "MPST" Memory Power State Table |
| 1959 | /// |
| 1960 | #define EFI_ACPI_5_1_MEMORY_POWER_STATE_TABLE_SIGNATURE SIGNATURE_32('M', 'P', 'S', 'T') |
| 1961 | |
| 1962 | /// |
| 1963 | /// "MSCT" Maximum System Characteristics Table |
| 1964 | /// |
| 1965 | #define EFI_ACPI_5_1_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_SIGNATURE SIGNATURE_32('M', 'S', 'C', 'T') |
| 1966 | |
| 1967 | /// |
| 1968 | /// "PMTT" Platform Memory Topology Table |
| 1969 | /// |
| 1970 | #define EFI_ACPI_5_1_PLATFORM_MEMORY_TOPOLOGY_TABLE_SIGNATURE SIGNATURE_32('P', 'M', 'T', 'T') |
| 1971 | |
| 1972 | /// |
| 1973 | /// "PSDT" Persistent System Description Table |
| 1974 | /// |
| 1975 | #define EFI_ACPI_5_1_PERSISTENT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('P', 'S', 'D', 'T') |
| 1976 | |
| 1977 | /// |
| 1978 | /// "RASF" ACPI RAS Feature Table |
| 1979 | /// |
| 1980 | #define EFI_ACPI_5_1_ACPI_RAS_FEATURE_TABLE_SIGNATURE SIGNATURE_32('R', 'A', 'S', 'F') |
| 1981 | |
| 1982 | /// |
| 1983 | /// "RSDT" Root System Description Table |
| 1984 | /// |
| 1985 | #define EFI_ACPI_5_1_ROOT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('R', 'S', 'D', 'T') |
| 1986 | |
| 1987 | /// |
| 1988 | /// "SBST" Smart Battery Specification Table |
| 1989 | /// |
| 1990 | #define EFI_ACPI_5_1_SMART_BATTERY_SPECIFICATION_TABLE_SIGNATURE SIGNATURE_32('S', 'B', 'S', 'T') |
| 1991 | |
| 1992 | /// |
| 1993 | /// "SLIT" System Locality Information Table |
| 1994 | /// |
| 1995 | #define EFI_ACPI_5_1_SYSTEM_LOCALITY_INFORMATION_TABLE_SIGNATURE SIGNATURE_32('S', 'L', 'I', 'T') |
| 1996 | |
| 1997 | /// |
| 1998 | /// "SRAT" System Resource Affinity Table |
| 1999 | /// |
| 2000 | #define EFI_ACPI_5_1_SYSTEM_RESOURCE_AFFINITY_TABLE_SIGNATURE SIGNATURE_32('S', 'R', 'A', 'T') |
| 2001 | |
| 2002 | /// |
| 2003 | /// "SSDT" Secondary System Description Table |
| 2004 | /// |
| 2005 | #define EFI_ACPI_5_1_SECONDARY_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('S', 'S', 'D', 'T') |
| 2006 | |
| 2007 | /// |
| 2008 | /// "XSDT" Extended System Description Table |
| 2009 | /// |
| 2010 | #define EFI_ACPI_5_1_EXTENDED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('X', 'S', 'D', 'T') |
| 2011 | |
| 2012 | /// |
| 2013 | /// "BOOT" MS Simple Boot Spec |
| 2014 | /// |
| 2015 | #define EFI_ACPI_5_1_SIMPLE_BOOT_FLAG_TABLE_SIGNATURE SIGNATURE_32('B', 'O', 'O', 'T') |
| 2016 | |
| 2017 | /// |
| 2018 | /// "CSRT" MS Core System Resource Table |
| 2019 | /// |
| 2020 | #define EFI_ACPI_5_1_CORE_SYSTEM_RESOURCE_TABLE_SIGNATURE SIGNATURE_32('C', 'S', 'R', 'T') |
| 2021 | |
| 2022 | /// |
| 2023 | /// "DBG2" MS Debug Port 2 Spec |
| 2024 | /// |
| 2025 | #define EFI_ACPI_5_1_DEBUG_PORT_2_TABLE_SIGNATURE SIGNATURE_32('D', 'B', 'G', '2') |
| 2026 | |
| 2027 | /// |
| 2028 | /// "DBGP" MS Debug Port Spec |
| 2029 | /// |
| 2030 | #define EFI_ACPI_5_1_DEBUG_PORT_TABLE_SIGNATURE SIGNATURE_32('D', 'B', 'G', 'P') |
| 2031 | |
| 2032 | /// |
| 2033 | /// "DMAR" DMA Remapping Table |
| 2034 | /// |
| 2035 | #define EFI_ACPI_5_1_DMA_REMAPPING_TABLE_SIGNATURE SIGNATURE_32('D', 'M', 'A', 'R') |
| 2036 | |
| 2037 | /// |
| 2038 | /// "DRTM" Dynamic Root of Trust for Measurement Table |
| 2039 | /// |
| 2040 | #define EFI_ACPI_5_1_DYNAMIC_ROOT_OF_TRUST_FOR_MEASUREMENT_TABLE_SIGNATURE SIGNATURE_32('D', 'R', 'T', 'M') |
| 2041 | |
| 2042 | /// |
| 2043 | /// "ETDT" Event Timer Description Table |
| 2044 | /// |
| 2045 | #define EFI_ACPI_5_1_EVENT_TIMER_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('E', 'T', 'D', 'T') |
| 2046 | |
| 2047 | /// |
| 2048 | /// "HPET" IA-PC High Precision Event Timer Table |
| 2049 | /// |
| 2050 | #define EFI_ACPI_5_1_HIGH_PRECISION_EVENT_TIMER_TABLE_SIGNATURE SIGNATURE_32('H', 'P', 'E', 'T') |
| 2051 | |
| 2052 | /// |
| 2053 | /// "iBFT" iSCSI Boot Firmware Table |
| 2054 | /// |
| 2055 | #define EFI_ACPI_5_1_ISCSI_BOOT_FIRMWARE_TABLE_SIGNATURE SIGNATURE_32('i', 'B', 'F', 'T') |
| 2056 | |
| 2057 | /// |
| 2058 | /// "IVRS" I/O Virtualization Reporting Structure |
| 2059 | /// |
| 2060 | #define EFI_ACPI_5_1_IO_VIRTUALIZATION_REPORTING_STRUCTURE_SIGNATURE SIGNATURE_32('I', 'V', 'R', 'S') |
| 2061 | |
| 2062 | /// |
| 2063 | /// "LPIT" Low Power Idle Table |
| 2064 | /// |
| 2065 | #define EFI_ACPI_5_1_IO_LOW_POWER_IDLE_TABLE_STRUCTURE_SIGNATURE SIGNATURE_32('L', 'P', 'I', 'T') |
| 2066 | |
| 2067 | /// |
| 2068 | /// "MCFG" PCI Express Memory Mapped Configuration Space Base Address Description Table |
| 2069 | /// |
| 2070 | #define EFI_ACPI_5_1_PCI_EXPRESS_MEMORY_MAPPED_CONFIGURATION_SPACE_BASE_ADDRESS_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('M', 'C', 'F', 'G') |
| 2071 | |
| 2072 | /// |
| 2073 | /// "MCHI" Management Controller Host Interface Table |
| 2074 | /// |
| 2075 | #define EFI_ACPI_5_1_MANAGEMENT_CONTROLLER_HOST_INTERFACE_TABLE_SIGNATURE SIGNATURE_32('M', 'C', 'H', 'I') |
| 2076 | |
| 2077 | /// |
| 2078 | /// "MSDM" MS Data Management Table |
| 2079 | /// |
| 2080 | #define EFI_ACPI_5_1_DATA_MANAGEMENT_TABLE_SIGNATURE SIGNATURE_32('M', 'S', 'D', 'M') |
| 2081 | |
| 2082 | /// |
| 2083 | /// "PCCT" Platform Communications Channel Table |
| 2084 | /// |
| 2085 | #define EFI_ACPI_5_1_PLATFORM_COMMUNICATIONS_CHANNEL_TABLE_SIGNATURE SIGNATURE_32('P', 'C', 'C', 'T') |
| 2086 | |
| 2087 | /// |
| 2088 | /// "SLIC" MS Software Licensing Table Specification |
| 2089 | /// |
| 2090 | #define EFI_ACPI_5_1_SOFTWARE_LICENSING_TABLE_SIGNATURE SIGNATURE_32('S', 'L', 'I', 'C') |
| 2091 | |
| 2092 | /// |
| 2093 | /// "SPCR" Serial Port Console Redirection Table |
| 2094 | /// |
| 2095 | #define EFI_ACPI_5_1_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_SIGNATURE SIGNATURE_32('S', 'P', 'C', 'R') |
| 2096 | |
| 2097 | /// |
| 2098 | /// "SPMI" Server Platform Management Interface Table |
| 2099 | /// |
| 2100 | #define EFI_ACPI_5_1_SERVER_PLATFORM_MANAGEMENT_INTERFACE_TABLE_SIGNATURE SIGNATURE_32('S', 'P', 'M', 'I') |
| 2101 | |
| 2102 | /// |
| 2103 | /// "TCPA" Trusted Computing Platform Alliance Capabilities Table |
| 2104 | /// |
| 2105 | #define EFI_ACPI_5_1_TRUSTED_COMPUTING_PLATFORM_ALLIANCE_CAPABILITIES_TABLE_SIGNATURE SIGNATURE_32('T', 'C', 'P', 'A') |
| 2106 | |
| 2107 | /// |
| 2108 | /// "TPM2" Trusted Computing Platform 1 Table |
| 2109 | /// |
| 2110 | #define EFI_ACPI_5_1_TRUSTED_COMPUTING_PLATFORM_2_TABLE_SIGNATURE SIGNATURE_32('T', 'P', 'M', '2') |
| 2111 | |
| 2112 | /// |
| 2113 | /// "UEFI" UEFI ACPI Data Table |
| 2114 | /// |
| 2115 | #define EFI_ACPI_5_1_UEFI_ACPI_DATA_TABLE_SIGNATURE SIGNATURE_32('U', 'E', 'F', 'I') |
| 2116 | |
| 2117 | /// |
| 2118 | /// "WAET" Windows ACPI Emulated Devices Table |
| 2119 | /// |
| 2120 | #define EFI_ACPI_5_1_WINDOWS_ACPI_EMULATED_DEVICES_TABLE_SIGNATURE SIGNATURE_32('W', 'A', 'E', 'T') |
| 2121 | |
| 2122 | /// |
| 2123 | /// "WDAT" Watchdog Action Table |
| 2124 | /// |
| 2125 | #define EFI_ACPI_5_1_WATCHDOG_ACTION_TABLE_SIGNATURE SIGNATURE_32('W', 'D', 'A', 'T') |
| 2126 | |
| 2127 | /// |
| 2128 | /// "WDRT" Watchdog Resource Table |
| 2129 | /// |
| 2130 | #define EFI_ACPI_5_1_WATCHDOG_RESOURCE_TABLE_SIGNATURE SIGNATURE_32('W', 'D', 'R', 'T') |
| 2131 | |
| 2132 | /// |
| 2133 | /// "WPBT" MS Platform Binary Table |
| 2134 | /// |
| 2135 | #define EFI_ACPI_5_1_PLATFORM_BINARY_TABLE_SIGNATURE SIGNATURE_32('W', 'P', 'B', 'T') |
| 2136 | |
| 2137 | #pragma pack() |
| 2138 | |
| 2139 | #endif |