blob: 45c5ceca67f68d256d08850087ac60a107fe495f [file] [log] [blame]
Angel Pons182dbde2020-04-02 23:49:05 +02001/* SPDX-License-Identifier: GPL-2.0-only */
Vladimir Serbinenko888d5592013-11-13 17:53:38 +01002
3#include <console/console.h>
4#include <device/device.h>
5#include <device/pci.h>
6#include <device/pci_ids.h>
7#include "pch.h"
Kyösti Mälkkie2227a22014-02-05 13:02:55 +02008#include <device/pci_ehci.h>
Kyösti Mälkki13f66502019-03-03 08:01:05 +02009#include <device/mmio.h>
Kyösti Mälkkif1b58b72019-03-01 13:43:02 +020010#include <device/pci_ops.h>
Vladimir Serbinenko888d5592013-11-13 17:53:38 +010011
12static void usb_ehci_init(struct device *dev)
13{
14 u32 reg32;
Vladimir Serbinenko61f902d2014-06-07 16:41:14 +020015 struct resource *res;
16 u8 access_cntl;
Vladimir Serbinenko888d5592013-11-13 17:53:38 +010017
18 /* Disable Wake on Disconnect in RMH */
19 reg32 = RCBA32(0x35b0);
20 reg32 |= 0x22;
21 RCBA32(0x35b0) = reg32;
22
23 printk(BIOS_DEBUG, "EHCI: Setting up controller.. ");
24
25 pci_write_config32(dev, 0x84, 0x130c8911);
26 pci_write_config32(dev, 0x88, 0xa0);
27 pci_write_config32(dev, 0xf4, 0x80808588);
28 pci_write_config32(dev, 0xf4, 0x00808588);
29 pci_write_config32(dev, 0xf4, 0x00808588);
30 pci_write_config32(dev, 0xfc, 0x301b1728);
31
Elyes HAOUAS8b6dfde2020-04-28 09:58:21 +020032 pci_or_config16(dev, PCI_COMMAND, PCI_COMMAND_MASTER);
Vladimir Serbinenko888d5592013-11-13 17:53:38 +010033
Vladimir Serbinenko61f902d2014-06-07 16:41:14 +020034 access_cntl = pci_read_config8(dev, 0x80);
35
36 /* Enable writes to protected registers. */
37 pci_write_config8(dev, 0x80, access_cntl | 1);
38
Angel Ponsf32ae102021-11-03 13:07:14 +010039 res = probe_resource(dev, PCI_BASE_ADDRESS_0);
Vladimir Serbinenko61f902d2014-06-07 16:41:14 +020040 if (res) {
41 /* Number of ports and companion controllers. */
Kevin Paul Herbertbde6d302014-12-24 18:43:20 -080042 reg32 = read32((u32 *)(uintptr_t)(res->base + 4));
43 write32((u32 *)(uintptr_t)(res->base + 4),
44 (reg32 & 0xfff00000) | 2);
Vladimir Serbinenko61f902d2014-06-07 16:41:14 +020045 }
46
47 /* Restore protection. */
48 pci_write_config8(dev, 0x80, access_cntl);
49
Vladimir Serbinenko888d5592013-11-13 17:53:38 +010050 printk(BIOS_DEBUG, "done.\n");
51}
52
Martin Rothff744bf2019-10-23 21:46:03 -060053static void usb_ehci_set_subsystem(struct device *dev, unsigned int vendor,
54 unsigned int device)
Vladimir Serbinenko888d5592013-11-13 17:53:38 +010055{
56 u8 access_cntl;
57
58 access_cntl = pci_read_config8(dev, 0x80);
59
60 /* Enable writes to protected registers. */
61 pci_write_config8(dev, 0x80, access_cntl | 1);
62
Subrata Banik4a0f0712019-03-20 14:29:47 +053063 pci_dev_set_subsystem(dev, vendor, device);
Vladimir Serbinenko888d5592013-11-13 17:53:38 +010064
65 /* Restore protection. */
66 pci_write_config8(dev, 0x80, access_cntl);
67}
68
Vladimir Serbinenko888d5592013-11-13 17:53:38 +010069static struct pci_operations lops_pci = {
70 .set_subsystem = &usb_ehci_set_subsystem,
71};
72
73static struct device_operations usb_ehci_ops = {
74 .read_resources = pci_ehci_read_resources,
75 .set_resources = pci_dev_set_resources,
Vladimir Serbinenko83ef7492014-03-03 23:21:12 +010076 .enable_resources = pci_dev_enable_resources,
Vladimir Serbinenko888d5592013-11-13 17:53:38 +010077 .init = usb_ehci_init,
Vladimir Serbinenko888d5592013-11-13 17:53:38 +010078 .ops_pci = &lops_pci,
79};
80
Felix Singer838fbc72019-11-21 21:23:32 +010081static const unsigned short pci_device_ids[] = {
82 PCI_DID_INTEL_IBEXPEAK_EHCI_1,
83 PCI_DID_INTEL_IBEXPEAK_EHCI_2,
84 0
85};
Vladimir Serbinenko888d5592013-11-13 17:53:38 +010086
87static const struct pci_driver pch_usb_ehci __pci_driver = {
88 .ops = &usb_ehci_ops,
Felix Singer43b7f412022-03-07 04:34:52 +010089 .vendor = PCI_VID_INTEL,
Vladimir Serbinenko888d5592013-11-13 17:53:38 +010090 .devices = pci_device_ids,
91};