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review.coreboot.org / coreboot / 43b7f416783ccc98952a4eb5f9274907442b03e5 / . / src / southbridge / amd / cimx / sb800 / Amd.h
blob: c5ca8b40d90ef0853c688fc4e29ab28b8e5161c0 [file] [log] [blame]
Frank Vibrans63e62b02011-02-14 18:38:14 +0000[diff] [blame]1/*****************************************************************************
2 * AMD Generic Encapsulated Software Architecture */
3/**
4 * @file
5 *
6 * Agesa structures and definitions
7 *
8 * Contains AMD AGESA/CIMx core interface
9 *
Frank Vibrans63e62b02011-02-14 18:38:14 +0000[diff] [blame]10 */
Angel Pons182dbde2020-04-02 23:49:05 +0200[diff] [blame]11/* SPDX-License-Identifier: GPL-2.0-only */
Frank Vibrans63e62b02011-02-14 18:38:14 +0000[diff] [blame]12
13#ifndef _AMD_H_
14#define _AMD_H_
15
16// AGESA Types and Definitions
17#ifndef NULL
18 #define NULL 0
19#endif
20
21#define LAST_ENTRY 0xFFFFFFFF
22#define IOCF8 0xCF8
23#define IOCFC 0xCFC
24#define IN
25#define OUT
26
27#ifndef Int16FromChar
28#define Int16FromChar(a,b) ((a) << 0 | (b) << 8)
29#endif
30#ifndef Int32FromChar
31#define Int32FromChar(a,b,c,d) ((a) << 0 | (b) << 8 | (c) << 16 | (d) << 24)
32#endif
33
34#define IMAGE_SIGNATURE Int32FromChar ('$', 'A', 'M', 'D')
35
36typedef unsigned int AGESA_STATUS;
37
38#define AGESA_SUCCESS ((AGESA_STATUS) 0x0)
39#define AGESA_ALERT ((AGESA_STATUS) 0x40000000)
40#define AGESA_WARNING ((AGESA_STATUS) 0x40000001)
41#define AGESA_UNSUPPORTED ((AGESA_STATUS) 0x80000003)
42#define AGESA_ERROR ((AGESA_STATUS) 0xC0000001)
43#define AGESA_CRITICAL ((AGESA_STATUS) 0xC0000002)
44#define AGESA_FATAL ((AGESA_STATUS) 0xC0000003)
45
Elyes HAOUAS251279c2018-07-08 12:41:56 +0200[diff] [blame]46typedef AGESA_STATUS(*CALLOUT_ENTRY) (unsigned int Param1, unsigned int Param2,
47 void *ConfigPtr);
48typedef AGESA_STATUS(*IMAGE_ENTRY) (IN OUT void *ConfigPtr);
49typedef AGESA_STATUS(*MODULE_ENTRY) (IN OUT void *ConfigPtr);
Frank Vibrans63e62b02011-02-14 18:38:14 +0000[diff] [blame]50
51///This allocation type is used by the AmdCreateStruct entry point
52typedef enum {
53 PreMemHeap = 0, ///< Create heap in cache.
54 PostMemDram, ///< Create heap in memory.
55 ByHost ///< Create heap by Host.
56} ALLOCATION_METHOD;
57
58/// These width descriptors are used by the library function, and others, to specify the data size
59typedef enum ACCESS_WIDTH {
60 AccessWidth8 = 1, ///< Access width is 8 bits.
61 AccessWidth16, ///< Access width is 16 bits.
62 AccessWidth32, ///< Access width is 32 bits.
63 AccessWidth64, ///< Access width is 64 bits.
64
65 AccessS3SaveWidth8 = 0x81, ///< Save 8 bits data.
66 AccessS3SaveWidth16, ///< Save 16 bits data.
67 AccessS3SaveWidth32, ///< Save 32 bits data.
68 AccessS3SaveWidth64, ///< Save 64 bits data.
69} ACCESS_WIDTH;
70
71// AGESA Structures
72
73/// The standard header for all AGESA services.
74typedef struct _AMD_CONFIG_PARAMS {
75 IN unsigned int ImageBasePtr; ///< The AGESA Image base address.
76 IN unsigned int Func; ///< The service desired, @sa dispatch.h.
77 IN unsigned int AltImageBasePtr; ///< Alternate Image location
78 IN unsigned int PcieBasePtr; ///< PCIe MMIO Base address, if configured.
79 union { ///< Callback pointer
80 IN unsigned long long PlaceHolder; ///< Place holder
81 IN CALLOUT_ENTRY CalloutPtr; ///< For Callout from AGESA
82 } CALLBACK;
83 IN OUT unsigned int Reserved[2]; ///< This space is reserved for future use.
84} AMD_CONFIG_PARAMS;
85
Frank Vibrans63e62b02011-02-14 18:38:14 +0000[diff] [blame]86/// AGESA Binary module header structure
87typedef struct _AMD_IMAGE_HEADER {
88 IN unsigned int Signature; ///< Binary Signature
89 IN signed char CreatorID[8]; ///< 8 characters ID
90 IN signed char Version[12]; ///< 12 characters version
91 IN unsigned int ModuleInfoOffset; ///< Offset of module
92 IN unsigned int EntryPointAddress; ///< Entry address
93 IN unsigned int ImageBase; ///< Image base
94 IN unsigned int RelocTableOffset; ///< Relocate Table offset
95 IN unsigned int ImageSize; ///< Size
96 IN unsigned short Checksum; ///< Checksum
97 IN unsigned char ImageType; ///< Type
98 IN unsigned char V_Reserved; ///< Reserved
99} AMD_IMAGE_HEADER;
100
101/// AGESA Binary module header structure
102typedef struct _AMD_MODULE_HEADER {
103 IN unsigned int ModuleHeaderSignature; ///< Module signature
104 IN signed char ModuleIdentifier[8]; ///< 8 characters ID
105 IN signed char ModuleVersion[12]; ///< 12 characters version
106 IN MODULE_ENTRY ModuleDispatcherPtr; ///< A pointer point to dispatcher
107 IN struct _AMD_MODULE_HEADER *NextBlockPtr; ///< Next module header link
108} AMD_MODULE_HEADER;
109
110#define FUNC_0 0 // bit-placed for PCI address creation
111#define FUNC_1 1
112#define FUNC_2 2
113#define FUNC_3 3
114#define FUNC_4 4
115#define FUNC_5 5
116#define FUNC_6 6
117#define FUNC_7 7
118
119// SBDFO - Segment Bus Device Function Offset
120// 31:28 Segment (4-bits)
121// 27:20 Bus (8-bits)
122// 19:15 Device (5-bits)
123// 14:12 Function (3-bits)
124// 11:00 Offset (12-bits)
125
Frank Vibrans63e62b02011-02-14 18:38:14 +0000[diff] [blame]126#define ILLEGAL_SBDFO 0xFFFFFFFF
127
128/// CPUID data received registers format
Kerry Shefeed3292011-08-18 18:03:44 +0800[diff] [blame]129typedef struct _CPUID_DATA {
Frank Vibrans63e62b02011-02-14 18:38:14 +0000[diff] [blame]130 IN OUT unsigned int EAX_Reg; ///< CPUID instruction result in EAX
131 IN OUT unsigned int EBX_Reg; ///< CPUID instruction result in EBX
132 IN OUT unsigned int ECX_Reg; ///< CPUID instruction result in ECX
133 IN OUT unsigned int EDX_Reg; ///< CPUID instruction result in EDX
Kerry Sheeb995c22011-05-07 08:43:40 +0000[diff] [blame]134} CPUID_DATA;
Frank Vibrans63e62b02011-02-14 18:38:14 +0000[diff] [blame]135
136#define WARM_RESET 1
137#define COLD_RESET 2 // Cold reset
138#define RESET_CPU 4 // Triggers a CPU reset
139
140/// HT frequency for external callbacks
141typedef enum {
142 HT_FREQUENCY_200M = 0, ///< HT speed 200 for external callbacks
143 HT_FREQUENCY_400M = 2, ///< HT speed 400 for external callbacks
144 HT_FREQUENCY_600M = 4, ///< HT speed 600 for external callbacks
145 HT_FREQUENCY_800M = 5, ///< HT speed 800 for external callbacks
146 HT_FREQUENCY_1000M = 6, ///< HT speed 1000 for external callbacks
147 HT_FREQUENCY_1200M = 7, ///< HT speed 1200 for external callbacks
148 HT_FREQUENCY_1400M = 8, ///< HT speed 1400 for external callbacks
149 HT_FREQUENCY_1600M = 9, ///< HT speed 1600 for external callbacks
150 HT_FREQUENCY_1800M = 10, ///< HT speed 1800 for external callbacks
151 HT_FREQUENCY_2000M = 11, ///< HT speed 2000 for external callbacks
152 HT_FREQUENCY_2200M = 12, ///< HT speed 2200 for external callbacks
153 HT_FREQUENCY_2400M = 13, ///< HT speed 2400 for external callbacks
154 HT_FREQUENCY_2600M = 14, ///< HT speed 2600 for external callbacks
155 HT_FREQUENCY_2800M = 17, ///< HT speed 2800 for external callbacks
156 HT_FREQUENCY_3000M = 18, ///< HT speed 3000 for external callbacks
157 HT_FREQUENCY_3200M = 19 ///< HT speed 3200 for external callbacks
158} HT_FREQUENCIES;
159
160#ifndef BIT0
161 #define BIT0 0x0000000000000001ull
162#endif
163#ifndef BIT1
164 #define BIT1 0x0000000000000002ull
165#endif
166#ifndef BIT2
167 #define BIT2 0x0000000000000004ull
168#endif
169#ifndef BIT3
170 #define BIT3 0x0000000000000008ull
171#endif
172#ifndef BIT4
173 #define BIT4 0x0000000000000010ull
174#endif
175#ifndef BIT5
176 #define BIT5 0x0000000000000020ull
177#endif
178#ifndef BIT6
179 #define BIT6 0x0000000000000040ull
180#endif
181#ifndef BIT7
182 #define BIT7 0x0000000000000080ull
183#endif
184#ifndef BIT8
185 #define BIT8 0x0000000000000100ull
186#endif
187#ifndef BIT9
188 #define BIT9 0x0000000000000200ull
189#endif
190#ifndef BIT10
191 #define BIT10 0x0000000000000400ull
192#endif
193#ifndef BIT11
194 #define BIT11 0x0000000000000800ull
195#endif
196#ifndef BIT12
197 #define BIT12 0x0000000000001000ull
198#endif
199#ifndef BIT13
200 #define BIT13 0x0000000000002000ull
201#endif
202#ifndef BIT14
203 #define BIT14 0x0000000000004000ull
204#endif
205#ifndef BIT15
206 #define BIT15 0x0000000000008000ull
207#endif
208#ifndef BIT16
209 #define BIT16 0x0000000000010000ull
210#endif
211#ifndef BIT17
212 #define BIT17 0x0000000000020000ull
213#endif
214#ifndef BIT18
215 #define BIT18 0x0000000000040000ull
216#endif
217#ifndef BIT19
218 #define BIT19 0x0000000000080000ull
219#endif
220#ifndef BIT20
221 #define BIT20 0x0000000000100000ull
222#endif
223#ifndef BIT21
224 #define BIT21 0x0000000000200000ull
225#endif
226#ifndef BIT22
227 #define BIT22 0x0000000000400000ull
228#endif
229#ifndef BIT23
230 #define BIT23 0x0000000000800000ull
231#endif
232#ifndef BIT24
233 #define BIT24 0x0000000001000000ull
234#endif
235#ifndef BIT25
236 #define BIT25 0x0000000002000000ull
237#endif
238#ifndef BIT26
239 #define BIT26 0x0000000004000000ull
240#endif
241#ifndef BIT27
242 #define BIT27 0x0000000008000000ull
243#endif
244#ifndef BIT28
245 #define BIT28 0x0000000010000000ull
246#endif
247#ifndef BIT29
248 #define BIT29 0x0000000020000000ull
249#endif
250#ifndef BIT30
251 #define BIT30 0x0000000040000000ull
252#endif
253#ifndef BIT31
254 #define BIT31 0x0000000080000000ull
255#endif
256#ifndef BIT32
257 #define BIT32 0x0000000100000000ull
258#endif
259#ifndef BIT33
260 #define BIT33 0x0000000200000000ull
261#endif
262#ifndef BIT34
263 #define BIT34 0x0000000400000000ull
264#endif
265#ifndef BIT35
266 #define BIT35 0x0000000800000000ull
267#endif
268#ifndef BIT36
269 #define BIT36 0x0000001000000000ull
270#endif
271#ifndef BIT37
272 #define BIT37 0x0000002000000000ull
273#endif
274#ifndef BIT38
275 #define BIT38 0x0000004000000000ull
276#endif
277#ifndef BIT39
278 #define BIT39 0x0000008000000000ull
279#endif
280#ifndef BIT40
281 #define BIT40 0x0000010000000000ull
282#endif
283#ifndef BIT41
284 #define BIT41 0x0000020000000000ull
285#endif
286#ifndef BIT42
287 #define BIT42 0x0000040000000000ull
288#endif
289#ifndef BIT43
290 #define BIT43 0x0000080000000000ull
291#endif
292#ifndef BIT44
293 #define BIT44 0x0000100000000000ull
294#endif
295#ifndef BIT45
296 #define BIT45 0x0000200000000000ull
297#endif
298#ifndef BIT46
299 #define BIT46 0x0000400000000000ull
300#endif
301#ifndef BIT47
302 #define BIT47 0x0000800000000000ull
303#endif
304#ifndef BIT48
305 #define BIT48 0x0001000000000000ull
306#endif
307#ifndef BIT49
308 #define BIT49 0x0002000000000000ull
309#endif
310#ifndef BIT50
311 #define BIT50 0x0004000000000000ull
312#endif
313#ifndef BIT51
314 #define BIT51 0x0008000000000000ull
315#endif
316#ifndef BIT52
317 #define BIT52 0x0010000000000000ull
318#endif
319#ifndef BIT53
320 #define BIT53 0x0020000000000000ull
321#endif
322#ifndef BIT54
323 #define BIT54 0x0040000000000000ull
324#endif
325#ifndef BIT55
326 #define BIT55 0x0080000000000000ull
327#endif
328#ifndef BIT56
329 #define BIT56 0x0100000000000000ull
330#endif
331#ifndef BIT57
332 #define BIT57 0x0200000000000000ull
333#endif
334#ifndef BIT58
335 #define BIT58 0x0400000000000000ull
336#endif
337#ifndef BIT59
338 #define BIT59 0x0800000000000000ull
339#endif
340#ifndef BIT60
341 #define BIT60 0x1000000000000000ull
342#endif
343#ifndef BIT61
344 #define BIT61 0x2000000000000000ull
345#endif
346#ifndef BIT62
347 #define BIT62 0x4000000000000000ull
348#endif
349#ifndef BIT63
350 #define BIT63 0x8000000000000000ull
351#endif
352#endif