| Angel Pons | 89ab250 | 2020-04-03 01:22:28 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
| Sven Schnelle | e2ca71e | 2011-02-14 20:02:47 +0000 | [diff] [blame] | 2 | |
| 3 | #include <arch/pirq_routing.h> |
| 4 | |
| Stefan Reinauer | a47bd91 | 2012-11-15 15:15:15 -0800 | [diff] [blame] | 5 | static const struct irq_routing_table intel_irq_routing_table = { |
| Sven Schnelle | e2ca71e | 2011-02-14 20:02:47 +0000 | [diff] [blame] | 6 | PIRQ_SIGNATURE, /* u32 signature */ |
| 7 | PIRQ_VERSION, /* u16 version */ |
| 8 | 32 + 16 * 15, /* Max. number of devices on the bus */ |
| 9 | 0x00, /* Interrupt router bus */ |
| 10 | (0x1f << 3) | 0x0, /* Interrupt router dev */ |
| 11 | 0, /* IRQs devoted exclusively to PCI usage */ |
| 12 | 0x8086, /* Vendor */ |
| 13 | 0x122e, /* Device */ |
| 14 | 0, /* Miniport */ |
| 15 | { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* u8 rfu[11] */ |
| 16 | 0xf5, /* Checksum (has to be set to some value that |
| 17 | * would give 0 after the sum of all bytes |
| 18 | * for this structure (including checksum). |
| Elyes HAOUAS | f4df9d1 | 2016-09-23 17:57:38 +0200 | [diff] [blame] | 19 | */ |
| Patrick Georgi | 7155595 | 2021-02-11 14:40:01 +0100 | [diff] [blame] | 20 | /* clang-format off */ |
| Sven Schnelle | e2ca71e | 2011-02-14 20:02:47 +0000 | [diff] [blame] | 21 | { |
| 22 | /* bus, dev | fn, {link, bitmap}, {link, bitmap}, {link, bitmap}, {link, bitmap}, slot, rfu */ |
| 23 | {0x00, (0x02 << 3) | 0x0, {{0x00, 0xdef8}, {0x61, 0x1cf8}, {0x00, 0xdef8}, {0x00, 0xdef8}}, 0x0, 0x0}, /* VGA 0:02.0 */ |
| 24 | {0x00, (0x1b << 3) | 0x0, {{0x00, 0xdef8}, {0x61, 0x1cf8}, {0x00, 0xdef8}, {0x00, 0xdef8}}, 0x0, 0x0}, /* HD Audio 0:1b.0 */ |
| 25 | {0x00, (0x1c << 3) | 0x0, {{0x68, 0x1cf8}, {0x69, 0x1cf8}, {0x6a, 0x1cf8}, {0x6b, 0x1cf8}}, 0x0, 0x0}, /* PCIe 0:1c.0 */ |
| 26 | {0x00, (0x1c << 3) | 0x1, {{0x68, 0x1cf8}, {0x69, 0x1cf8}, {0x6a, 0x1cf8}, {0x6b, 0x1cf8}}, 0x0, 0x0}, /* PCIe 0:1c.1 */ |
| 27 | {0x00, (0x1c << 3) | 0x2, {{0x68, 0x1cf8}, {0x69, 0x1cf8}, {0x6a, 0x1cf8}, {0x6b, 0x1cf8}}, 0x0, 0x0}, /* PCIe 0:1c.2 */ |
| 28 | {0x00, (0x1c << 3) | 0x3, {{0x68, 0x1cf8}, {0x69, 0x1cf8}, {0x6a, 0x1cf8}, {0x6b, 0x1cf8}}, 0x0, 0x0}, /* PCIe 0:1c.3 */ |
| 29 | {0x00, (0x1d << 3) | 0x0, {{0x60, 0x1cf8}, {0x61, 0x1cf8}, {0x62, 0x1cf8}, {0x63, 0x1cf8}}, 0x0, 0x0}, /* USB 0:1d.0 */ |
| 30 | {0x00, (0x1d << 3) | 0x1, {{0x60, 0x1cf8}, {0x61, 0x1cf8}, {0x62, 0x1cf8}, {0x63, 0x1cf8}}, 0x0, 0x0}, /* USB 0:1d.1 */ |
| 31 | {0x00, (0x1d << 3) | 0x2, {{0x60, 0x1cf8}, {0x61, 0x1cf8}, {0x62, 0x1cf8}, {0x63, 0x1cf8}}, 0x0, 0x0}, /* USB 0:1d.2 */ |
| 32 | {0x00, (0x1d << 3) | 0x3, {{0x60, 0x1cf8}, {0x61, 0x1cf8}, {0x62, 0x1cf8}, {0x63, 0x1cf8}}, 0x0, 0x0}, /* USB 0:1d.3 */ |
| 33 | {0x00, (0x1e << 3) | 0x0, {{0x60, 0x1cf8}, {0x61, 0x1cf8}, {0x62, 0x1cf8}, {0x63, 0x1cf8}}, 0x0, 0x0}, /* PCI 0:1e.0 */ |
| 34 | {0x00, (0x1f << 3) | 0x0, {{0x6b, 0x1cf8}, {0x60, 0x1cf8}, {0x60, 0x1cf8}, {0x00, 0xdef8}}, 0x0, 0x0}, /* LPC 0:1f.0 */ |
| 35 | {0x00, (0x1f << 3) | 0x1, {{0x6b, 0x1cf8}, {0x60, 0x1cf8}, {0x60, 0x1cf8}, {0x00, 0xdef8}}, 0x0, 0x0}, /* IDE 0:1f.1 */ |
| 36 | {0x00, (0x1f << 3) | 0x2, {{0x6b, 0x1cf8}, {0x60, 0x1cf8}, {0x60, 0x1cf8}, {0x00, 0xdef8}}, 0x0, 0x0}, /* SATA 0:1f.2 */ |
| 37 | } |
| Patrick Georgi | 7155595 | 2021-02-11 14:40:01 +0100 | [diff] [blame] | 38 | /* clang-format on */ |
| Sven Schnelle | e2ca71e | 2011-02-14 20:02:47 +0000 | [diff] [blame] | 39 | }; |
| 40 | |
| 41 | unsigned long write_pirq_routing_table(unsigned long addr) |
| 42 | { |
| Stefan Reinauer | a47bd91 | 2012-11-15 15:15:15 -0800 | [diff] [blame] | 43 | return copy_pirq_routing_table(addr, &intel_irq_routing_table); |
| Sven Schnelle | e2ca71e | 2011-02-14 20:02:47 +0000 | [diff] [blame] | 44 | } |