blob: 8882671bfae03b296e3082a682675a7e75733dc5 [file] [log] [blame]
Subrata Banik9b4f2212020-10-10 15:53:33 +05301/* SPDX-License-Identifier: GPL-2.0-only */
2
3#include <baseboard/gpio.h>
4#include <baseboard/variants.h>
5#include <device/device.h>
Meera Ravindranath8dffc382020-12-07 20:48:09 +05306#include <drivers/intel/gma/opregion.h>
Subrata Banik9b4f2212020-10-10 15:53:33 +05307#include <ec/ec.h>
8#include <soc/gpio.h>
Subrata Banik9b4f2212020-10-10 15:53:33 +05309#include <smbios.h>
10#include <stdint.h>
11#include <string.h>
Subrata Banik9b4f2212020-10-10 15:53:33 +053012#include "board_id.h"
Anil Kumar9b73c2b2021-06-09 11:51:10 -070013#include <fw_config.h>
Subrata Banik9b4f2212020-10-10 15:53:33 +053014
15const char *smbios_system_sku(void)
16{
17 static char sku_str[7] = "";
18 uint8_t sku_id = get_board_id();
19
20 snprintf(sku_str, sizeof(sku_str), "sku%u", sku_id);
21 return sku_str;
22}
23
24static void mainboard_init(void *chip_info)
25{
26 variant_configure_gpio_pads();
27
28 if (CONFIG(EC_GOOGLE_CHROMEEC))
29 mainboard_ec_init();
Sumeet Pawnikar698ee272021-08-09 16:08:40 +053030
31 variant_devtree_update();
32}
33
34void __weak variant_devtree_update(void)
35{
36 /* Override dev tree settings per board */
Subrata Banik9b4f2212020-10-10 15:53:33 +053037}
38
Usha P3ecee3c2022-02-02 11:31:27 +053039#if CONFIG(BOARD_INTEL_ADLRVP_M_EXT_EC) || CONFIG(BOARD_INTEL_ADLRVP_N_EXT_EC)
Anil Kumar9b73c2b2021-06-09 11:51:10 -070040static void add_fw_config_oem_string(const struct fw_config *config, void *arg)
41{
42 struct smbios_type11 *t;
43 char buffer[64];
44
45 t = (struct smbios_type11 *)arg;
46
47 snprintf(buffer, sizeof(buffer), "%s-%s", config->field_name, config->option_name);
48 t->count = smbios_add_string(t->eos, buffer);
49}
50
51static void mainboard_smbios_strings(struct device *dev, struct smbios_type11 *t)
52{
53 fw_config_for_each_found(add_fw_config_oem_string, t);
54}
55#endif
56
Subrata Banik9b4f2212020-10-10 15:53:33 +053057static void mainboard_enable(struct device *dev)
58{
Usha P3ecee3c2022-02-02 11:31:27 +053059#if CONFIG(BOARD_INTEL_ADLRVP_M_EXT_EC) || CONFIG(BOARD_INTEL_ADLRVP_N_EXT_EC)
Anil Kumar9b73c2b2021-06-09 11:51:10 -070060 dev->ops->get_smbios_strings = mainboard_smbios_strings;
61#endif
Subrata Banik9b4f2212020-10-10 15:53:33 +053062}
63
64struct chip_operations mainboard_ops = {
65 .init = mainboard_init,
66 .enable_dev = mainboard_enable,
67};
Meera Ravindranath8dffc382020-12-07 20:48:09 +053068
69const char *mainboard_vbt_filename(void)
70{
Lean Sheng Tan8ad51a82022-02-01 10:07:12 +010071 if (!CONFIG(CHROMEOS))
72 return "vbt.bin";
73
Meera Ravindranath8dffc382020-12-07 20:48:09 +053074 uint8_t sku_id = get_board_id();
75 switch (sku_id) {
76 case ADL_P_LP5_1:
77 case ADL_P_LP5_2:
Tim Wawrzynczaka10cc8a2021-04-01 15:41:16 -060078 return "vbt_adlrvp_lp5.bin";
Bernardo Perez Priegoc47beec2021-10-08 15:07:54 -070079 case ADL_M_LP5:
80 return "vbt_adlrvp_m_lp5.bin";
Deepti Deshatty193203f2021-04-29 21:32:58 +053081 case ADL_P_DDR5_1:
82 case ADL_P_DDR5_2:
Tim Wawrzynczaka10cc8a2021-04-01 15:41:16 -060083 return "vbt_adlrvp_ddr5.bin";
Bernardo Perez Priego7c1eda02021-06-29 11:21:59 -070084 case ADL_M_LP4:
Bernardo Perez Priegoc47beec2021-10-08 15:07:54 -070085 return "vbt_adlrvp_m_lp4.bin";
Meera Ravindranath8dffc382020-12-07 20:48:09 +053086 default:
87 return "vbt.bin";
88 }
89}