Angel Pons | b6636b0 | 2020-04-05 13:21:41 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
Edward O'Callaghan | 881f9cb | 2019-10-30 10:00:33 +1100 | [diff] [blame] | 2 | |
| 3 | #include <baseboard/variants.h> |
Elyes HAOUAS | 27718ac | 2020-09-19 09:32:36 +0200 | [diff] [blame] | 4 | #include <console/console.h> |
Edward O'Callaghan | 881f9cb | 2019-10-30 10:00:33 +1100 | [diff] [blame] | 5 | #include <soc/cnl_memcfg_init.h> |
| 6 | #include <soc/romstage.h> |
| 7 | #include <spd_bin.h> |
Jamie Chen | 7410992 | 2020-04-16 01:42:51 +0800 | [diff] [blame] | 8 | #include <spd_cache.h> |
Edward O'Callaghan | 881f9cb | 2019-10-30 10:00:33 +1100 | [diff] [blame] | 9 | |
| 10 | void mainboard_memory_init_params(FSPM_UPD *memupd) |
| 11 | { |
| 12 | struct cnl_mb_cfg memcfg; |
| 13 | variant_memory_params(&memcfg); |
| 14 | |
| 15 | /* Read spd block to get memory config */ |
| 16 | struct spd_block blk = { |
| 17 | .addr_map = { 0x50, 0x52, }, |
| 18 | }; |
| 19 | |
Jamie Chen | 7410992 | 2020-04-16 01:42:51 +0800 | [diff] [blame] | 20 | uint8_t *spd_cache; |
| 21 | size_t spd_cache_sz; |
| 22 | bool need_update_cache = false; |
| 23 | bool dimm_changed = true; |
| 24 | |
| 25 | /* load spd cache from RW_SPD_CACHE */ |
| 26 | if (load_spd_cache(&spd_cache, &spd_cache_sz) == CB_SUCCESS) { |
| 27 | if (!spd_cache_is_valid(spd_cache, spd_cache_sz)) { |
| 28 | printk(BIOS_WARNING, "Invalid SPD cache\n"); |
| 29 | } else { |
| 30 | dimm_changed = check_if_dimm_changed(spd_cache, &blk); |
Patrick Rudolph | 31218a4 | 2020-11-30 15:50:06 +0100 | [diff] [blame] | 31 | if (dimm_changed && memupd->FspmArchUpd.NvsBufferPtr != 0) { |
Jamie Chen | 7410992 | 2020-04-16 01:42:51 +0800 | [diff] [blame] | 32 | /* Set mrc_cache as invalid */ |
| 33 | printk(BIOS_INFO, "Set mrc_cache as invalid\n"); |
Patrick Rudolph | 31218a4 | 2020-11-30 15:50:06 +0100 | [diff] [blame] | 34 | memupd->FspmArchUpd.NvsBufferPtr = 0; |
Jamie Chen | 7410992 | 2020-04-16 01:42:51 +0800 | [diff] [blame] | 35 | } |
| 36 | } |
| 37 | need_update_cache = true; |
| 38 | } |
| 39 | |
| 40 | if (!dimm_changed) { |
| 41 | spd_fill_from_cache(spd_cache, &blk); |
| 42 | } else { |
| 43 | /* Access memory info through SMBUS. */ |
| 44 | get_spd_smbus(&blk); |
| 45 | |
| 46 | if (need_update_cache && update_spd_cache(&blk) == CB_ERR) |
| 47 | printk(BIOS_WARNING, "update SPD cache failed\n"); |
| 48 | } |
Edward O'Callaghan | 1075789 | 2020-04-29 14:05:52 +1000 | [diff] [blame] | 49 | |
| 50 | if (blk.spd_array[0] == NULL) { |
| 51 | memcfg.spd[0].read_type = NOT_EXISTING; |
| 52 | } else { |
| 53 | memcfg.spd[0].read_type = READ_SPD_MEMPTR; |
| 54 | memcfg.spd[0].spd_spec.spd_data_ptr_info.spd_data_len = blk.len; |
| 55 | memcfg.spd[0].spd_spec.spd_data_ptr_info.spd_data_ptr = (uintptr_t)blk.spd_array[0]; |
| 56 | } |
Edward O'Callaghan | 881f9cb | 2019-10-30 10:00:33 +1100 | [diff] [blame] | 57 | |
| 58 | memcfg.spd[1].read_type = NOT_EXISTING; |
| 59 | |
Edward O'Callaghan | 1075789 | 2020-04-29 14:05:52 +1000 | [diff] [blame] | 60 | if (blk.spd_array[1] == NULL) { |
| 61 | memcfg.spd[2].read_type = NOT_EXISTING; |
| 62 | } else { |
| 63 | memcfg.spd[2].read_type = READ_SPD_MEMPTR; |
| 64 | memcfg.spd[2].spd_spec.spd_data_ptr_info.spd_data_len = blk.len; |
| 65 | memcfg.spd[2].spd_spec.spd_data_ptr_info.spd_data_ptr = (uintptr_t)blk.spd_array[1]; |
| 66 | } |
Edward O'Callaghan | 881f9cb | 2019-10-30 10:00:33 +1100 | [diff] [blame] | 67 | |
| 68 | memcfg.spd[3].read_type = NOT_EXISTING; |
| 69 | dump_spd_info(&blk); |
| 70 | |
| 71 | /* set to 2 VREF_CA goes to CH_A and VREF_DQ_B goes to CH_B. */ |
| 72 | memcfg.vref_ca_config = 2; |
Edward O'Callaghan | 1a5c3bb | 2019-12-13 23:37:22 +1100 | [diff] [blame] | 73 | memcfg.dq_pins_interleaved = 1; |
Edward O'Callaghan | 881f9cb | 2019-10-30 10:00:33 +1100 | [diff] [blame] | 74 | |
| 75 | cannonlake_memcfg_init(&memupd->FspmConfig, &memcfg); |
| 76 | } |