blob: ee96c18d45858c6374d46af297f17dc504ccbd49 [file] [log] [blame]
Alan Huangb1da0512021-11-23 18:15:43 +08001/* SPDX-License-Identifier: GPL-2.0-or-later */
2
3#include <baseboard/variants.h>
4#include <chip.h>
5#include <device/device.h>
6#include <device/pci_ids.h>
7#include <device/pci_ops.h>
8#include <ec/google/chromeec/ec.h>
9#include <intelblocks/power_limit.h>
10
11const struct cpu_power_limits limits[] = {
12 /* SKU_ID, TDP (Watts), pl1_min, pl1_max, pl2_min, pl2_max, pl4 */
Felix Singer43b7f412022-03-07 04:34:52 +010013 { PCI_DID_INTEL_ADL_P_ID_10, 15, 15000, 15000, 55000, 55000, 123000 },
14 { PCI_DID_INTEL_ADL_P_ID_7, 15, 15000, 15000, 55000, 55000, 123000 },
15 { PCI_DID_INTEL_ADL_P_ID_6, 15, 15000, 15000, 55000, 55000, 123000 },
16 { PCI_DID_INTEL_ADL_P_ID_5, 28, 28000, 28000, 64000, 64000, 90000 },
17 { PCI_DID_INTEL_ADL_P_ID_3, 28, 28000, 28000, 64000, 64000, 140000 },
18 { PCI_DID_INTEL_ADL_P_ID_5, 45, 45000, 45000, 95000, 95000, 125000 },
19 { PCI_DID_INTEL_ADL_P_ID_4, 45, 45000, 45000, 115000, 115000, 215000 },
20 { PCI_DID_INTEL_ADL_P_ID_3, 45, 45000, 45000, 115000, 115000, 215000 },
21 { PCI_DID_INTEL_ADL_P_ID_1, 45, 45000, 45000, 95000, 95000, 125000 },
Alan Huangb1da0512021-11-23 18:15:43 +080022};
23
24const struct system_power_limits sys_limits[] = {
25 /* SKU_ID, TDP (Watts), psys_pl2 (Watts) */
Felix Singer43b7f412022-03-07 04:34:52 +010026 { PCI_DID_INTEL_ADL_P_ID_10, 15, 135 },
27 { PCI_DID_INTEL_ADL_P_ID_7, 15, 135 },
28 { PCI_DID_INTEL_ADL_P_ID_6, 15, 135 },
29 { PCI_DID_INTEL_ADL_P_ID_5, 28, 230 },
30 { PCI_DID_INTEL_ADL_P_ID_3, 28, 230 },
31 { PCI_DID_INTEL_ADL_P_ID_5, 45, 230 },
32 { PCI_DID_INTEL_ADL_P_ID_4, 45, 230 },
33 { PCI_DID_INTEL_ADL_P_ID_3, 45, 230 },
34 { PCI_DID_INTEL_ADL_P_ID_1, 45, 230 },
Alan Huangb1da0512021-11-23 18:15:43 +080035};
36
37/*
38 * Psys_pmax considerations.
39 *
40 * Given the hardware design in brask, the serial shunt resistor is 0.005ohm.
41 * The full scale of hardware PSYS signal 1.6v maps to system current 13.52A
42 * instead of real system power. The equation is shown below:
43 * PSYS = 1.6v = (0.005ohm x 13.52A) x 50 (INA213, gain 50V/V) x R501/(R501 + R510)
44 * R501/(R501 + R510) = 0.47 = 15K / (15K + 16.9K)
45 *
46 * The Psys_pmax is a SW setting which tells IMVP9.1 the mapping b/w system input
47 * current and the actual system power. Since there is no voltage information
48 * from PSYS, different voltage input would map to different Psys_pmax settings:
49 * For Type-C 15V, the Psys_pmax should be 15v x 13.52A = 202.8W
50 * For Type-C 20V, the Psys_pmax should be 20v x 13.52A = 270.4W
51 * For a barrel jack, the Psys_pmax should be 19.5v x 13.52A = 263.6W
52 *
53 * Imagine that there is a type-c 100W (20V/5A) connected to DUT w/ full loading,
54 * and the Psys_pmax setting is 270.4W. Then IMVP9.1 can calculate the current system
55 * power = 270.4W * 5A / 13.52A = 100W, which is the actual system power.
56 */
57const struct psys_config psys_config = {
58 .efficiency = 97,
59 .psys_imax_ma = 13520,
60 .bj_volts_mv = 19500
61};
62
63void variant_devtree_update(void)
64{
65 size_t total_entries = ARRAY_SIZE(limits);
66 variant_update_psys_power_limits(limits, sys_limits, total_entries, &psys_config);
67 variant_update_power_limits(limits, total_entries);
68}