Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1 | #ifndef DEVICE_PCIEXP_H |
| 2 | #define DEVICE_PCIEXP_H |
| 3 | /* (c) 2005 Linux Networx GPL see COPYING for details */ |
| 4 | |
Duncan Laurie | 90dcdd4 | 2011-10-25 14:15:11 -0700 | [diff] [blame] | 5 | enum aspm_type { |
| 6 | PCIE_ASPM_NONE = 0, |
| 7 | PCIE_ASPM_L0S = 1, |
| 8 | PCIE_ASPM_L1 = 2, |
| 9 | PCIE_ASPM_BOTH = 3, |
| 10 | }; |
| 11 | |
Patrick Georgi | 9adcbfe | 2017-12-05 16:36:30 -0500 | [diff] [blame] | 12 | #define ASPM_LTR_L12_THRESHOLD_VALUE_OFFSET 16 |
| 13 | #define ASPM_LTR_L12_THRESHOLD_VALUE_MASK (0x3ff << ASPM_LTR_L12_THRESHOLD_VALUE_OFFSET) |
| 14 | #define ASPM_LTR_L12_THRESHOLD_SCALE_OFFSET 29 |
| 15 | #define ASPM_LTR_L12_THRESHOLD_SCALE_MASK (0x7 << ASPM_LTR_L12_THRESHOLD_SCALE_OFFSET) |
| 16 | |
Subrata Banik | ed6996f | 2019-03-25 21:49:39 +0530 | [diff] [blame] | 17 | /* Latency tolerance reporting, max non-snoop latency value 3.14ms */ |
| 18 | #define PCIE_LTR_MAX_NO_SNOOP_LATENCY_3146US 0x1003 |
| 19 | /* Latency tolerance reporting, max snoop latency value 3.14ms */ |
| 20 | #define PCIE_LTR_MAX_SNOOP_LATENCY_3146US 0x1003 |
| 21 | |
Kyösti Mälkki | de271a8 | 2015-03-18 13:09:47 +0200 | [diff] [blame] | 22 | void pciexp_scan_bus(struct bus *bus, unsigned int min_devfn, |
| 23 | unsigned int max_devfn); |
| 24 | |
Elyes HAOUAS | c8a649c | 2018-06-10 23:36:44 +0200 | [diff] [blame] | 25 | void pciexp_scan_bridge(struct device *dev); |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 26 | |
| 27 | extern struct device_operations default_pciexp_ops_bus; |
| 28 | |
Jeremy Soller | cf2ac54 | 2019-10-09 21:40:36 -0600 | [diff] [blame] | 29 | void pciexp_hotplug_scan_bridge(struct device *dev); |
| 30 | |
| 31 | extern struct device_operations default_pciexp_hotplug_ops_bus; |
Jeremy Soller | cf2ac54 | 2019-10-09 21:40:36 -0600 | [diff] [blame] | 32 | |
Tim Wawrzynczak | 672e844 | 2022-01-19 11:22:51 -0700 | [diff] [blame] | 33 | unsigned int pciexp_find_extended_cap(const struct device *dev, unsigned int cap); |
Tim Wawrzynczak | 3d121ae1 | 2021-09-16 20:18:16 -0600 | [diff] [blame] | 34 | unsigned int pciexp_find_next_extended_cap(const struct device *dev, unsigned int cap, |
| 35 | unsigned int offset); |
Jianjun Wang | 777ffff | 2021-07-24 14:50:36 +0800 | [diff] [blame] | 36 | |
| 37 | static inline bool pciexp_is_downstream_port(int type) |
| 38 | { |
| 39 | return type == PCI_EXP_TYPE_ROOT_PORT || |
| 40 | type == PCI_EXP_TYPE_DOWNSTREAM || |
| 41 | type == PCI_EXP_TYPE_PCIE_BRIDGE; |
| 42 | } |
| 43 | |
Tim Wawrzynczak | a62cb56 | 2021-12-08 21:16:43 -0700 | [diff] [blame] | 44 | bool pciexp_get_ltr_max_latencies(struct device *dev, u16 *max_snoop, u16 *max_nosnoop); |
| 45 | |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 46 | #endif /* DEVICE_PCIEXP_H */ |