Patrick Georgi | 593124d | 2020-05-10 19:44:08 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: MIT */ |
Elyes HAOUAS | bf0970e | 2019-03-21 11:10:03 +0100 | [diff] [blame] | 2 | |
Ronald G. Minnich | 01ab2d1 | 2013-06-30 20:30:58 -0700 | [diff] [blame] | 3 | #include <types.h> |
Ronald G. Minnich | 01ab2d1 | 2013-06-30 20:30:58 -0700 | [diff] [blame] | 4 | #include <console/console.h> |
Ronald G. Minnich | 01ab2d1 | 2013-06-30 20:30:58 -0700 | [diff] [blame] | 5 | #include <drivers/intel/gma/i915.h> |
| 6 | |
| 7 | /* HDMI/DVI modes ignore everything but the last 2 items. So we share |
| 8 | * them for both DP and FDI transports, allowing those ports to |
| 9 | * automatically adapt to HDMI connections as well. |
| 10 | */ |
| 11 | static u32 hsw_ddi_translations_dp[] = { |
| 12 | 0x00FFFFFF, 0x0006000E, /* DP parameters */ |
| 13 | 0x00D75FFF, 0x0005000A, |
| 14 | 0x00C30FFF, 0x00040006, |
| 15 | 0x80AAAFFF, 0x000B0000, |
| 16 | 0x00FFFFFF, 0x0005000A, |
| 17 | 0x00D75FFF, 0x000C0004, |
| 18 | 0x80C30FFF, 0x000B0000, |
| 19 | 0x00FFFFFF, 0x00040006, |
| 20 | 0x80D75FFF, 0x000B0000, |
| 21 | 0x00FFFFFF, 0x00040006 /* HDMI parameters */ |
| 22 | }; |
| 23 | |
| 24 | static u32 hsw_ddi_translations_fdi[] = { |
| 25 | 0x00FFFFFF, 0x0007000E, /* FDI parameters */ |
| 26 | 0x00D75FFF, 0x000F000A, |
| 27 | 0x00C30FFF, 0x00060006, |
| 28 | 0x00AAAFFF, 0x001E0000, |
| 29 | 0x00FFFFFF, 0x000F000A, |
| 30 | 0x00D75FFF, 0x00160004, |
| 31 | 0x00C30FFF, 0x001E0000, |
| 32 | 0x00FFFFFF, 0x00060006, |
| 33 | 0x00D75FFF, 0x001E0000, |
| 34 | 0x00FFFFFF, 0x00040006 /* HDMI parameters */ |
| 35 | }; |
| 36 | |
| 37 | /* On Haswell, DDI port buffers must be programmed with correct values |
| 38 | * in advance. The buffer values are different for FDI and DP modes, |
| 39 | * but the HDMI/DVI fields are shared among those. So we program the DDI |
| 40 | * in either FDI or DP modes only, as HDMI connections will work with both |
| 41 | * of those. |
| 42 | */ |
Furquan Shaikh | 77f48cd | 2013-08-19 10:16:50 -0700 | [diff] [blame] | 43 | static void intel_prepare_ddi_buffers(int port, int use_fdi_mode) |
Ronald G. Minnich | 01ab2d1 | 2013-06-30 20:30:58 -0700 | [diff] [blame] | 44 | { |
| 45 | u32 reg; |
| 46 | int i; |
| 47 | u32 *ddi_translations = ((use_fdi_mode) ? |
| 48 | hsw_ddi_translations_fdi : |
| 49 | hsw_ddi_translations_dp); |
| 50 | |
| 51 | printk(BIOS_SPEW, "Initializing DDI buffers for port %d in %s mode\n", |
| 52 | port, |
| 53 | use_fdi_mode ? "FDI" : "DP"); |
| 54 | |
| 55 | for (i=0,reg=DDI_BUF_TRANS(port);i < ARRAY_SIZE(hsw_ddi_translations_fdi);i++) { |
Furquan Shaikh | 77f48cd | 2013-08-19 10:16:50 -0700 | [diff] [blame] | 56 | gtt_write(reg,ddi_translations[i]); |
Ronald G. Minnich | 01ab2d1 | 2013-06-30 20:30:58 -0700 | [diff] [blame] | 57 | reg += 4; |
| 58 | } |
| 59 | } |
| 60 | |
Furquan Shaikh | 77f48cd | 2013-08-19 10:16:50 -0700 | [diff] [blame] | 61 | void intel_prepare_ddi(void) |
| 62 | { |
| 63 | int port; |
| 64 | u32 use_fdi = 1; |
| 65 | |
| 66 | for (port = PORT_A; port < PORT_E; port++) |
| 67 | intel_prepare_ddi_buffers(port, !use_fdi); |
| 68 | |
| 69 | intel_prepare_ddi_buffers(PORT_E, use_fdi); |
| 70 | } |