Aaron Durbin | 97651c5 | 2013-11-01 14:36:03 -0500 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright (C) 2013 Google Inc. |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; version 2 of the License. |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
| 14 | * |
| 15 | * You should have received a copy of the GNU General Public License |
| 16 | * along with this program; if not, write to the Free Software |
| 17 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
| 18 | */ |
| 19 | |
Aaron Durbin | 8cbf47f | 2013-12-04 11:03:20 -0600 | [diff] [blame] | 20 | #include <arch/io.h> |
Aaron Durbin | 97651c5 | 2013-11-01 14:36:03 -0500 | [diff] [blame] | 21 | #include <console/console.h> |
| 22 | #include <device/device.h> |
| 23 | #include <device/pci.h> |
| 24 | #include <device/pci_ids.h> |
| 25 | |
Aaron Durbin | 8cbf47f | 2013-12-04 11:03:20 -0600 | [diff] [blame] | 26 | #include <baytrail/iomap.h> |
| 27 | #include <baytrail/pci_devs.h> |
| 28 | #include <baytrail/pmc.h> |
Aaron Durbin | 97651c5 | 2013-11-01 14:36:03 -0500 | [diff] [blame] | 29 | #include <baytrail/ramstage.h> |
Aaron Durbin | 8cbf47f | 2013-12-04 11:03:20 -0600 | [diff] [blame] | 30 | #include "chip.h" |
| 31 | |
| 32 | |
| 33 | static void setup_codec_clock(device_t dev) |
| 34 | { |
| 35 | uint32_t reg; |
| 36 | int clk_reg; |
| 37 | struct soc_intel_baytrail_config *config; |
| 38 | const char *freq_str; |
| 39 | |
| 40 | config = dev->chip_info; |
| 41 | switch (config->lpe_codec_clk_freq) { |
| 42 | case 19: |
| 43 | freq_str = "19.2"; |
| 44 | reg = CLK_FREQ_19P2MHZ; |
| 45 | break; |
| 46 | case 25: |
| 47 | freq_str = "25"; |
| 48 | reg = CLK_FREQ_25MHZ; |
| 49 | break; |
| 50 | default: |
| 51 | printk(BIOS_DEBUG, "LPE codec clock not required.\n"); |
| 52 | return; |
| 53 | } |
| 54 | |
| 55 | /* Default to always running. */ |
| 56 | reg |= CLK_CTL_ON; |
| 57 | |
| 58 | if (config->lpe_codec_clk_num < 0 || config->lpe_codec_clk_num > 5) { |
| 59 | printk(BIOS_DEBUG, "Invalid LPE codec clock number.\n"); |
| 60 | return; |
| 61 | } |
| 62 | |
| 63 | printk(BIOS_DEBUG, "LPE Audio codec clock set to %sMHz.\n", freq_str); |
| 64 | |
| 65 | clk_reg = PMC_BASE_ADDRESS + PLT_CLK_CTL_0; |
| 66 | clk_reg += 4 * config->lpe_codec_clk_num; |
| 67 | |
| 68 | write32(clk_reg, (read32(clk_reg) & ~0x7) | reg); |
| 69 | } |
Aaron Durbin | 97651c5 | 2013-11-01 14:36:03 -0500 | [diff] [blame] | 70 | |
| 71 | static void lpe_init(device_t dev) |
| 72 | { |
Aaron Durbin | 8cbf47f | 2013-12-04 11:03:20 -0600 | [diff] [blame] | 73 | setup_codec_clock(dev); |
Aaron Durbin | 97651c5 | 2013-11-01 14:36:03 -0500 | [diff] [blame] | 74 | } |
| 75 | |
| 76 | static const struct device_operations device_ops = { |
| 77 | .read_resources = pci_dev_read_resources, |
| 78 | .set_resources = pci_dev_set_resources, |
Aaron Durbin | 4334c87 | 2013-12-05 11:12:15 -0600 | [diff] [blame^] | 79 | .enable_resources = pci_dev_enable_resources, |
Aaron Durbin | 97651c5 | 2013-11-01 14:36:03 -0500 | [diff] [blame] | 80 | .init = lpe_init, |
| 81 | .enable = NULL, |
| 82 | .scan_bus = NULL, |
| 83 | .ops_pci = &soc_pci_ops, |
| 84 | }; |
| 85 | |
| 86 | static const struct pci_driver southcluster __pci_driver = { |
| 87 | .ops = &device_ops, |
| 88 | .vendor = PCI_VENDOR_ID_INTEL, |
| 89 | .device = LPE_DEVID, |
| 90 | }; |