Jason Schildt | 043b409 | 2005-08-10 15:16:44 +0000 | [diff] [blame] | 1 | /* |
Yinghai Lu | d4b278c | 2006-10-04 20:46:15 +0000 | [diff] [blame] | 2 | This should be done by Eric |
| 3 | 2004.12 yhlu add multi ht chain dynamically support |
| 4 | 2005.11 yhlu add let real sb to use small unitid |
| 5 | */ |
Eric Biederman | 5cd8173 | 2004-03-11 15:01:31 +0000 | [diff] [blame] | 6 | #include <device/pci_def.h> |
| 7 | #include <device/pci_ids.h> |
| 8 | #include <device/hypertransport_def.h> |
| 9 | |
Myles Watson | d61ada6 | 2008-10-02 19:20:22 +0000 | [diff] [blame] | 10 | // Do we need allocate MMIO? Current We direct last 64M to sblink only, We can not lose access to last 4M range to ROM |
Stefan Reinauer | 7ce8c54 | 2005-12-02 21:52:30 +0000 | [diff] [blame] | 11 | #ifndef K8_ALLOCATE_MMIO_RANGE |
Myles Watson | d61ada6 | 2008-10-02 19:20:22 +0000 | [diff] [blame] | 12 | #define K8_ALLOCATE_MMIO_RANGE 0 |
Stefan Reinauer | 7ce8c54 | 2005-12-02 21:52:30 +0000 | [diff] [blame] | 13 | #endif |
| 14 | |
Jason Schildt | 043b409 | 2005-08-10 15:16:44 +0000 | [diff] [blame] | 15 | static inline void print_linkn_in (const char *strval, uint8_t byteval) |
Yinghai Lu | 1bc5654 | 2005-01-06 02:23:31 +0000 | [diff] [blame] | 16 | { |
Stefan Reinauer | 64ed2b7 | 2010-03-31 14:47:43 +0000 | [diff] [blame] | 17 | printk(BIOS_DEBUG, "%s%02x\n", strval, byteval); |
Yinghai Lu | 1bc5654 | 2005-01-06 02:23:31 +0000 | [diff] [blame] | 18 | } |
| 19 | |
Jason Schildt | 043b409 | 2005-08-10 15:16:44 +0000 | [diff] [blame] | 20 | static uint8_t ht_lookup_capability(device_t dev, uint16_t val) |
Eric Biederman | 5cd8173 | 2004-03-11 15:01:31 +0000 | [diff] [blame] | 21 | { |
Jason Schildt | 043b409 | 2005-08-10 15:16:44 +0000 | [diff] [blame] | 22 | uint8_t pos; |
| 23 | uint8_t hdr_type; |
Eric Biederman | 5cd8173 | 2004-03-11 15:01:31 +0000 | [diff] [blame] | 24 | |
| 25 | hdr_type = pci_read_config8(dev, PCI_HEADER_TYPE); |
| 26 | pos = 0; |
| 27 | hdr_type &= 0x7f; |
| 28 | |
| 29 | if ((hdr_type == PCI_HEADER_TYPE_NORMAL) || |
Jason Schildt | 043b409 | 2005-08-10 15:16:44 +0000 | [diff] [blame] | 30 | (hdr_type == PCI_HEADER_TYPE_BRIDGE)) { |
Eric Biederman | 5cd8173 | 2004-03-11 15:01:31 +0000 | [diff] [blame] | 31 | pos = PCI_CAPABILITY_LIST; |
| 32 | } |
| 33 | if (pos > PCI_CAP_LIST_NEXT) { |
| 34 | pos = pci_read_config8(dev, pos); |
| 35 | } |
Yinghai Lu | d4b278c | 2006-10-04 20:46:15 +0000 | [diff] [blame] | 36 | while(pos != 0) { /* loop through the linked list */ |
Jason Schildt | 043b409 | 2005-08-10 15:16:44 +0000 | [diff] [blame] | 37 | uint8_t cap; |
Eric Biederman | 5cd8173 | 2004-03-11 15:01:31 +0000 | [diff] [blame] | 38 | cap = pci_read_config8(dev, pos + PCI_CAP_LIST_ID); |
| 39 | if (cap == PCI_CAP_ID_HT) { |
Jason Schildt | 043b409 | 2005-08-10 15:16:44 +0000 | [diff] [blame] | 40 | uint16_t flags; |
Eric Biederman | 5cd8173 | 2004-03-11 15:01:31 +0000 | [diff] [blame] | 41 | |
| 42 | flags = pci_read_config16(dev, pos + PCI_CAP_FLAGS); |
Jason Schildt | 043b409 | 2005-08-10 15:16:44 +0000 | [diff] [blame] | 43 | if ((flags >> 13) == val) { |
| 44 | /* Entry is a slave or host , success... */ |
Eric Biederman | 5cd8173 | 2004-03-11 15:01:31 +0000 | [diff] [blame] | 45 | break; |
| 46 | } |
| 47 | } |
| 48 | pos = pci_read_config8(dev, pos + PCI_CAP_LIST_NEXT); |
| 49 | } |
| 50 | return pos; |
| 51 | } |
| 52 | |
Jason Schildt | 043b409 | 2005-08-10 15:16:44 +0000 | [diff] [blame] | 53 | static uint8_t ht_lookup_slave_capability(device_t dev) |
Myles Watson | d61ada6 | 2008-10-02 19:20:22 +0000 | [diff] [blame] | 54 | { |
Jason Schildt | 043b409 | 2005-08-10 15:16:44 +0000 | [diff] [blame] | 55 | return ht_lookup_capability(dev, 0); // Slave/Primary Interface Block Format |
| 56 | } |
| 57 | |
Stefan Reinauer | eea66b7 | 2010-04-07 15:32:52 +0000 | [diff] [blame] | 58 | #if 0 |
Jason Schildt | 043b409 | 2005-08-10 15:16:44 +0000 | [diff] [blame] | 59 | static uint8_t ht_lookup_host_capability(device_t dev) |
| 60 | { |
Myles Watson | d61ada6 | 2008-10-02 19:20:22 +0000 | [diff] [blame] | 61 | return ht_lookup_capability(dev, 1); // Host/Secondary Interface Block Format |
Jason Schildt | 043b409 | 2005-08-10 15:16:44 +0000 | [diff] [blame] | 62 | } |
Stefan Reinauer | eea66b7 | 2010-04-07 15:32:52 +0000 | [diff] [blame] | 63 | #endif |
Jason Schildt | 043b409 | 2005-08-10 15:16:44 +0000 | [diff] [blame] | 64 | |
Stefan Reinauer | 7ce8c54 | 2005-12-02 21:52:30 +0000 | [diff] [blame] | 65 | static void ht_collapse_previous_enumeration(uint8_t bus, unsigned offset_unitid) |
Eric Biederman | 5cd8173 | 2004-03-11 15:01:31 +0000 | [diff] [blame] | 66 | { |
| 67 | device_t dev; |
Jason Schildt | 043b409 | 2005-08-10 15:16:44 +0000 | [diff] [blame] | 68 | |
Yinghai Lu | d4b278c | 2006-10-04 20:46:15 +0000 | [diff] [blame] | 69 | //actually, only for one HT device HT chain, and unitid is 0 |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 70 | #if CONFIG_HT_CHAIN_UNITID_BASE == 0 |
Stefan Reinauer | 7ce8c54 | 2005-12-02 21:52:30 +0000 | [diff] [blame] | 71 | if(offset_unitid) { |
| 72 | return; |
| 73 | } |
| 74 | #endif |
| 75 | |
Jason Schildt | 043b409 | 2005-08-10 15:16:44 +0000 | [diff] [blame] | 76 | /* Check if is already collapsed */ |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 77 | if((!offset_unitid) || (offset_unitid && (!((CONFIG_HT_CHAIN_END_UNITID_BASE == 0) && (CONFIG_HT_CHAIN_END_UNITID_BASE <CONFIG_HT_CHAIN_UNITID_BASE))))) { |
Myles Watson | fa12b67 | 2009-04-30 22:45:41 +0000 | [diff] [blame] | 78 | uint32_t id; |
Stefan Reinauer | 7ce8c54 | 2005-12-02 21:52:30 +0000 | [diff] [blame] | 79 | dev = PCI_DEV(bus, 0, 0); |
Myles Watson | d61ada6 | 2008-10-02 19:20:22 +0000 | [diff] [blame] | 80 | id = pci_read_config32(dev, PCI_VENDOR_ID); |
| 81 | if (!((id == 0xffffffff) || (id == 0x00000000) || |
| 82 | (id == 0x0000ffff) || (id == 0xffff0000))) { |
| 83 | return; |
| 84 | } |
| 85 | } |
Jason Schildt | 043b409 | 2005-08-10 15:16:44 +0000 | [diff] [blame] | 86 | |
Eric Biederman | 5cd8173 | 2004-03-11 15:01:31 +0000 | [diff] [blame] | 87 | /* Spin through the devices and collapse any previous |
| 88 | * hypertransport enumeration. |
| 89 | */ |
Yinghai Lu | 2c956bb | 2004-12-17 21:08:16 +0000 | [diff] [blame] | 90 | for(dev = PCI_DEV(bus, 1, 0); dev <= PCI_DEV(bus, 0x1f, 0x7); dev += PCI_DEV(0, 1, 0)) { |
Jason Schildt | 043b409 | 2005-08-10 15:16:44 +0000 | [diff] [blame] | 91 | uint32_t id; |
| 92 | uint8_t pos; |
| 93 | uint16_t flags; |
Myles Watson | d61ada6 | 2008-10-02 19:20:22 +0000 | [diff] [blame] | 94 | |
Eric Biederman | 5cd8173 | 2004-03-11 15:01:31 +0000 | [diff] [blame] | 95 | id = pci_read_config32(dev, PCI_VENDOR_ID); |
Jason Schildt | 043b409 | 2005-08-10 15:16:44 +0000 | [diff] [blame] | 96 | if ((id == 0xffffffff) || (id == 0x00000000) || |
| 97 | (id == 0x0000ffff) || (id == 0xffff0000)) { |
Eric Biederman | 5cd8173 | 2004-03-11 15:01:31 +0000 | [diff] [blame] | 98 | continue; |
| 99 | } |
Myles Watson | d61ada6 | 2008-10-02 19:20:22 +0000 | [diff] [blame] | 100 | |
Eric Biederman | 5cd8173 | 2004-03-11 15:01:31 +0000 | [diff] [blame] | 101 | pos = ht_lookup_slave_capability(dev); |
| 102 | if (!pos) { |
| 103 | continue; |
| 104 | } |
Yinghai Lu | 6a61d6a | 2004-10-20 05:07:16 +0000 | [diff] [blame] | 105 | |
Eric Biederman | 5cd8173 | 2004-03-11 15:01:31 +0000 | [diff] [blame] | 106 | /* Clear the unitid */ |
| 107 | flags = pci_read_config16(dev, pos + PCI_CAP_FLAGS); |
| 108 | flags &= ~0x1f; |
| 109 | pci_write_config16(dev, pos + PCI_CAP_FLAGS, flags); |
| 110 | } |
| 111 | } |
| 112 | |
Jason Schildt | 043b409 | 2005-08-10 15:16:44 +0000 | [diff] [blame] | 113 | static uint16_t ht_read_freq_cap(device_t dev, uint8_t pos) |
Eric Biederman | 5cd8173 | 2004-03-11 15:01:31 +0000 | [diff] [blame] | 114 | { |
| 115 | /* Handle bugs in valid hypertransport frequency reporting */ |
Jason Schildt | 043b409 | 2005-08-10 15:16:44 +0000 | [diff] [blame] | 116 | uint16_t freq_cap; |
| 117 | uint32_t id; |
Eric Biederman | 5cd8173 | 2004-03-11 15:01:31 +0000 | [diff] [blame] | 118 | |
| 119 | freq_cap = pci_read_config16(dev, pos); |
Stefan Reinauer | 64ed2b7 | 2010-03-31 14:47:43 +0000 | [diff] [blame] | 120 | printk(BIOS_SPEW, "pos=0x%x, unfiltered freq_cap=0x%x\n", pos, freq_cap); |
Eric Biederman | 5cd8173 | 2004-03-11 15:01:31 +0000 | [diff] [blame] | 121 | freq_cap &= ~(1 << HT_FREQ_VENDOR); /* Ignore Vendor HT frequencies */ |
| 122 | |
| 123 | id = pci_read_config32(dev, 0); |
| 124 | |
| 125 | /* AMD 8131 Errata 48 */ |
| 126 | if (id == (PCI_VENDOR_ID_AMD | (PCI_DEVICE_ID_AMD_8131_PCIX << 16))) { |
| 127 | freq_cap &= ~(1 << HT_FREQ_800Mhz); |
Stefan Reinauer | 7ce8c54 | 2005-12-02 21:52:30 +0000 | [diff] [blame] | 128 | return freq_cap; |
| 129 | } |
arch import user (historical) | 98d0d30 | 2005-07-06 17:13:46 +0000 | [diff] [blame] | 130 | |
Eric Biederman | 5cd8173 | 2004-03-11 15:01:31 +0000 | [diff] [blame] | 131 | /* AMD 8151 Errata 23 */ |
| 132 | if (id == (PCI_VENDOR_ID_AMD | (PCI_DEVICE_ID_AMD_8151_SYSCTRL << 16))) { |
| 133 | freq_cap &= ~(1 << HT_FREQ_800Mhz); |
Stefan Reinauer | 7ce8c54 | 2005-12-02 21:52:30 +0000 | [diff] [blame] | 134 | return freq_cap; |
Myles Watson | d61ada6 | 2008-10-02 19:20:22 +0000 | [diff] [blame] | 135 | } |
| 136 | |
Eric Biederman | 5cd8173 | 2004-03-11 15:01:31 +0000 | [diff] [blame] | 137 | /* AMD K8 Unsupported 1Ghz? */ |
| 138 | if (id == (PCI_VENDOR_ID_AMD | (0x1100 << 16))) { |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 139 | #if CONFIG_K8_HT_FREQ_1G_SUPPORT == 1 |
| 140 | #if CONFIG_K8_REV_F_SUPPORT == 0 |
Myles Watson | d61ada6 | 2008-10-02 19:20:22 +0000 | [diff] [blame] | 141 | if (is_cpu_pre_e0()) { // only E0 later support 1GHz |
Jason Schildt | cf6df2a | 2005-10-25 21:41:45 +0000 | [diff] [blame] | 142 | freq_cap &= ~(1 << HT_FREQ_1000Mhz); |
Stefan Reinauer | 7ce8c54 | 2005-12-02 21:52:30 +0000 | [diff] [blame] | 143 | } |
Yinghai Lu | d4b278c | 2006-10-04 20:46:15 +0000 | [diff] [blame] | 144 | #endif |
Myles Watson | d61ada6 | 2008-10-02 19:20:22 +0000 | [diff] [blame] | 145 | #else |
| 146 | freq_cap &= ~(1 << HT_FREQ_1000Mhz); |
Stefan Reinauer | 7ce8c54 | 2005-12-02 21:52:30 +0000 | [diff] [blame] | 147 | #endif |
Eric Biederman | 5cd8173 | 2004-03-11 15:01:31 +0000 | [diff] [blame] | 148 | } |
arch import user (historical) | 98d0d30 | 2005-07-06 17:13:46 +0000 | [diff] [blame] | 149 | |
Stefan Reinauer | 64ed2b7 | 2010-03-31 14:47:43 +0000 | [diff] [blame] | 150 | printk(BIOS_SPEW, "pos=0x%x, filtered freq_cap=0x%x\n", pos, freq_cap); |
| 151 | //printk(BIOS_SPEW, "capping to 800/600/400/200 MHz\n"); |
Carl-Daniel Hailfinger | c589e5a | 2008-12-23 02:05:55 +0000 | [diff] [blame] | 152 | //freq_cap &= 0x3f; |
Eric Biederman | 5cd8173 | 2004-03-11 15:01:31 +0000 | [diff] [blame] | 153 | return freq_cap; |
| 154 | } |
Myles Watson | d61ada6 | 2008-10-02 19:20:22 +0000 | [diff] [blame] | 155 | |
Yinghai Lu | 00a018f | 2007-04-06 21:06:44 +0000 | [diff] [blame] | 156 | static uint8_t ht_read_width_cap(device_t dev, uint8_t pos) |
| 157 | { |
| 158 | uint8_t width_cap = pci_read_config8(dev, pos); |
| 159 | |
| 160 | uint32_t id; |
| 161 | |
| 162 | id = pci_read_config32(dev, 0); |
| 163 | |
| 164 | /* netlogic micro cap doesn't support 16 bit yet */ |
| 165 | if (id == (0x184e | (0x0001 << 16))) { |
| 166 | if((width_cap & 0x77) == 0x11) { |
| 167 | width_cap &= 0x88; |
| 168 | } |
| 169 | } |
Myles Watson | d61ada6 | 2008-10-02 19:20:22 +0000 | [diff] [blame] | 170 | |
Yinghai Lu | 00a018f | 2007-04-06 21:06:44 +0000 | [diff] [blame] | 171 | return width_cap; |
Myles Watson | d61ada6 | 2008-10-02 19:20:22 +0000 | [diff] [blame] | 172 | |
Yinghai Lu | 00a018f | 2007-04-06 21:06:44 +0000 | [diff] [blame] | 173 | } |
Myles Watson | d61ada6 | 2008-10-02 19:20:22 +0000 | [diff] [blame] | 174 | |
Jason Schildt | 6e44b42 | 2005-08-09 21:53:07 +0000 | [diff] [blame] | 175 | #define LINK_OFFS(CTRL, WIDTH,FREQ,FREQ_CAP) \ |
Myles Watson | d61ada6 | 2008-10-02 19:20:22 +0000 | [diff] [blame] | 176 | (((CTRL & 0xff) << 24) | ((WIDTH & 0xff) << 16) | ((FREQ & 0xff) << 8) | (FREQ_CAP & 0xFF)) |
Jason Schildt | 6e44b42 | 2005-08-09 21:53:07 +0000 | [diff] [blame] | 177 | |
Jason Schildt | 043b409 | 2005-08-10 15:16:44 +0000 | [diff] [blame] | 178 | #define LINK_CTRL(OFFS) ((OFFS >> 24) & 0xFF) |
Eric Biederman | 5cd8173 | 2004-03-11 15:01:31 +0000 | [diff] [blame] | 179 | #define LINK_WIDTH(OFFS) ((OFFS >> 16) & 0xFF) |
Jason Schildt | 043b409 | 2005-08-10 15:16:44 +0000 | [diff] [blame] | 180 | #define LINK_FREQ(OFFS) ((OFFS >> 8) & 0xFF) |
Eric Biederman | 5cd8173 | 2004-03-11 15:01:31 +0000 | [diff] [blame] | 181 | #define LINK_FREQ_CAP(OFFS) ((OFFS) & 0xFF) |
| 182 | |
Li-Ta Lo | 4cd79f3 | 2004-03-26 21:34:04 +0000 | [diff] [blame] | 183 | #define PCI_HT_HOST_OFFS LINK_OFFS( \ |
Myles Watson | d61ada6 | 2008-10-02 19:20:22 +0000 | [diff] [blame] | 184 | PCI_HT_CAP_HOST_CTRL, \ |
Li-Ta Lo | 4cd79f3 | 2004-03-26 21:34:04 +0000 | [diff] [blame] | 185 | PCI_HT_CAP_HOST_WIDTH, \ |
| 186 | PCI_HT_CAP_HOST_FREQ, \ |
| 187 | PCI_HT_CAP_HOST_FREQ_CAP) |
Eric Biederman | 5cd8173 | 2004-03-11 15:01:31 +0000 | [diff] [blame] | 188 | |
Li-Ta Lo | 4cd79f3 | 2004-03-26 21:34:04 +0000 | [diff] [blame] | 189 | #define PCI_HT_SLAVE0_OFFS LINK_OFFS( \ |
Myles Watson | d61ada6 | 2008-10-02 19:20:22 +0000 | [diff] [blame] | 190 | PCI_HT_CAP_SLAVE_CTRL0, \ |
Li-Ta Lo | 4cd79f3 | 2004-03-26 21:34:04 +0000 | [diff] [blame] | 191 | PCI_HT_CAP_SLAVE_WIDTH0, \ |
| 192 | PCI_HT_CAP_SLAVE_FREQ0, \ |
| 193 | PCI_HT_CAP_SLAVE_FREQ_CAP0) |
Eric Biederman | 5cd8173 | 2004-03-11 15:01:31 +0000 | [diff] [blame] | 194 | |
Li-Ta Lo | 4cd79f3 | 2004-03-26 21:34:04 +0000 | [diff] [blame] | 195 | #define PCI_HT_SLAVE1_OFFS LINK_OFFS( \ |
Myles Watson | d61ada6 | 2008-10-02 19:20:22 +0000 | [diff] [blame] | 196 | PCI_HT_CAP_SLAVE_CTRL1, \ |
Li-Ta Lo | 4cd79f3 | 2004-03-26 21:34:04 +0000 | [diff] [blame] | 197 | PCI_HT_CAP_SLAVE_WIDTH1, \ |
| 198 | PCI_HT_CAP_SLAVE_FREQ1, \ |
| 199 | PCI_HT_CAP_SLAVE_FREQ_CAP1) |
Eric Biederman | 5cd8173 | 2004-03-11 15:01:31 +0000 | [diff] [blame] | 200 | |
| 201 | static int ht_optimize_link( |
Jason Schildt | 043b409 | 2005-08-10 15:16:44 +0000 | [diff] [blame] | 202 | device_t dev1, uint8_t pos1, unsigned offs1, |
| 203 | device_t dev2, uint8_t pos2, unsigned offs2) |
Eric Biederman | 5cd8173 | 2004-03-11 15:01:31 +0000 | [diff] [blame] | 204 | { |
| 205 | static const uint8_t link_width_to_pow2[]= { 3, 4, 0, 5, 1, 2, 0, 0 }; |
| 206 | static const uint8_t pow2_to_link_width[] = { 0x7, 4, 5, 0, 1, 3 }; |
Jason Schildt | 043b409 | 2005-08-10 15:16:44 +0000 | [diff] [blame] | 207 | uint16_t freq_cap1, freq_cap2; |
| 208 | uint8_t width_cap1, width_cap2, width, old_width, ln_width1, ln_width2; |
| 209 | uint8_t freq, old_freq; |
Eric Biederman | 5cd8173 | 2004-03-11 15:01:31 +0000 | [diff] [blame] | 210 | int needs_reset; |
| 211 | /* Set link width and frequency */ |
| 212 | |
Stefan Reinauer | 64ed2b7 | 2010-03-31 14:47:43 +0000 | [diff] [blame] | 213 | printk(BIOS_SPEW, "entering ht_optimize_link\n"); |
Eric Biederman | 5cd8173 | 2004-03-11 15:01:31 +0000 | [diff] [blame] | 214 | /* Initially assume everything is already optimized and I don't need a reset */ |
| 215 | needs_reset = 0; |
| 216 | |
| 217 | /* Get the frequency capabilities */ |
| 218 | freq_cap1 = ht_read_freq_cap(dev1, pos1 + LINK_FREQ_CAP(offs1)); |
| 219 | freq_cap2 = ht_read_freq_cap(dev2, pos2 + LINK_FREQ_CAP(offs2)); |
Stefan Reinauer | 64ed2b7 | 2010-03-31 14:47:43 +0000 | [diff] [blame] | 220 | printk(BIOS_SPEW, "freq_cap1=0x%x, freq_cap2=0x%x\n", freq_cap1, freq_cap2); |
Eric Biederman | 5cd8173 | 2004-03-11 15:01:31 +0000 | [diff] [blame] | 221 | |
| 222 | /* Calculate the highest possible frequency */ |
| 223 | freq = log2(freq_cap1 & freq_cap2); |
| 224 | |
| 225 | /* See if I am changing the link freqency */ |
| 226 | old_freq = pci_read_config8(dev1, pos1 + LINK_FREQ(offs1)); |
Jason Schildt | cf6df2a | 2005-10-25 21:41:45 +0000 | [diff] [blame] | 227 | old_freq &= 0x0f; |
Eric Biederman | 5cd8173 | 2004-03-11 15:01:31 +0000 | [diff] [blame] | 228 | needs_reset |= old_freq != freq; |
Stefan Reinauer | 64ed2b7 | 2010-03-31 14:47:43 +0000 | [diff] [blame] | 229 | printk(BIOS_SPEW, "dev1 old_freq=0x%x, freq=0x%x, needs_reset=0x%0x\n", old_freq, freq, needs_reset); |
Eric Biederman | 5cd8173 | 2004-03-11 15:01:31 +0000 | [diff] [blame] | 230 | old_freq = pci_read_config8(dev2, pos2 + LINK_FREQ(offs2)); |
Jason Schildt | cf6df2a | 2005-10-25 21:41:45 +0000 | [diff] [blame] | 231 | old_freq &= 0x0f; |
Eric Biederman | 5cd8173 | 2004-03-11 15:01:31 +0000 | [diff] [blame] | 232 | needs_reset |= old_freq != freq; |
Stefan Reinauer | 64ed2b7 | 2010-03-31 14:47:43 +0000 | [diff] [blame] | 233 | printk(BIOS_SPEW, "dev2 old_freq=0x%x, freq=0x%x, needs_reset=0x%0x\n", old_freq, freq, needs_reset); |
Eric Biederman | 5cd8173 | 2004-03-11 15:01:31 +0000 | [diff] [blame] | 234 | |
Carl-Daniel Hailfinger | c589e5a | 2008-12-23 02:05:55 +0000 | [diff] [blame] | 235 | /* Set the Calculated link frequency */ |
Eric Biederman | 5cd8173 | 2004-03-11 15:01:31 +0000 | [diff] [blame] | 236 | pci_write_config8(dev1, pos1 + LINK_FREQ(offs1), freq); |
| 237 | pci_write_config8(dev2, pos2 + LINK_FREQ(offs2), freq); |
| 238 | |
| 239 | /* Get the width capabilities */ |
Yinghai Lu | 00a018f | 2007-04-06 21:06:44 +0000 | [diff] [blame] | 240 | width_cap1 = ht_read_width_cap(dev1, pos1 + LINK_WIDTH(offs1)); |
| 241 | width_cap2 = ht_read_width_cap(dev2, pos2 + LINK_WIDTH(offs2)); |
Stefan Reinauer | 64ed2b7 | 2010-03-31 14:47:43 +0000 | [diff] [blame] | 242 | printk(BIOS_SPEW, "width_cap1=0x%x, width_cap2=0x%x\n", width_cap1, width_cap2); |
Eric Biederman | 5cd8173 | 2004-03-11 15:01:31 +0000 | [diff] [blame] | 243 | |
| 244 | /* Calculate dev1's input width */ |
| 245 | ln_width1 = link_width_to_pow2[width_cap1 & 7]; |
| 246 | ln_width2 = link_width_to_pow2[(width_cap2 >> 4) & 7]; |
Stefan Reinauer | 64ed2b7 | 2010-03-31 14:47:43 +0000 | [diff] [blame] | 247 | printk(BIOS_SPEW, "dev1 input ln_width1=0x%x, ln_width2=0x%x\n", ln_width1, ln_width2); |
Eric Biederman | 5cd8173 | 2004-03-11 15:01:31 +0000 | [diff] [blame] | 248 | if (ln_width1 > ln_width2) { |
| 249 | ln_width1 = ln_width2; |
| 250 | } |
| 251 | width = pow2_to_link_width[ln_width1]; |
Stefan Reinauer | 64ed2b7 | 2010-03-31 14:47:43 +0000 | [diff] [blame] | 252 | printk(BIOS_SPEW, "dev1 input width=0x%x\n", width); |
Eric Biederman | 5cd8173 | 2004-03-11 15:01:31 +0000 | [diff] [blame] | 253 | /* Calculate dev1's output width */ |
| 254 | ln_width1 = link_width_to_pow2[(width_cap1 >> 4) & 7]; |
| 255 | ln_width2 = link_width_to_pow2[width_cap2 & 7]; |
Stefan Reinauer | 64ed2b7 | 2010-03-31 14:47:43 +0000 | [diff] [blame] | 256 | printk(BIOS_SPEW, "dev1 output ln_width1=0x%x, ln_width2=0x%x\n", ln_width1, ln_width2); |
Eric Biederman | 5cd8173 | 2004-03-11 15:01:31 +0000 | [diff] [blame] | 257 | if (ln_width1 > ln_width2) { |
| 258 | ln_width1 = ln_width2; |
| 259 | } |
| 260 | width |= pow2_to_link_width[ln_width1] << 4; |
Stefan Reinauer | 64ed2b7 | 2010-03-31 14:47:43 +0000 | [diff] [blame] | 261 | printk(BIOS_SPEW, "dev1 input|output width=0x%x\n", width); |
Eric Biederman | 5cd8173 | 2004-03-11 15:01:31 +0000 | [diff] [blame] | 262 | |
| 263 | /* See if I am changing dev1's width */ |
| 264 | old_width = pci_read_config8(dev1, pos1 + LINK_WIDTH(offs1) + 1); |
Stefan Reinauer | 7ce8c54 | 2005-12-02 21:52:30 +0000 | [diff] [blame] | 265 | old_width &= 0x77; |
Eric Biederman | 5cd8173 | 2004-03-11 15:01:31 +0000 | [diff] [blame] | 266 | needs_reset |= old_width != width; |
Stefan Reinauer | 64ed2b7 | 2010-03-31 14:47:43 +0000 | [diff] [blame] | 267 | printk(BIOS_SPEW, "old dev1 input|output width=0x%x\n", width); |
Eric Biederman | 5cd8173 | 2004-03-11 15:01:31 +0000 | [diff] [blame] | 268 | |
| 269 | /* Set dev1's widths */ |
| 270 | pci_write_config8(dev1, pos1 + LINK_WIDTH(offs1) + 1, width); |
| 271 | |
| 272 | /* Calculate dev2's width */ |
| 273 | width = ((width & 0x70) >> 4) | ((width & 0x7) << 4); |
Stefan Reinauer | 64ed2b7 | 2010-03-31 14:47:43 +0000 | [diff] [blame] | 274 | printk(BIOS_SPEW, "dev2 input|output width=0x%x\n", width); |
Eric Biederman | 5cd8173 | 2004-03-11 15:01:31 +0000 | [diff] [blame] | 275 | |
| 276 | /* See if I am changing dev2's width */ |
| 277 | old_width = pci_read_config8(dev2, pos2 + LINK_WIDTH(offs2) + 1); |
Stefan Reinauer | 7ce8c54 | 2005-12-02 21:52:30 +0000 | [diff] [blame] | 278 | old_width &= 0x77; |
Eric Biederman | 5cd8173 | 2004-03-11 15:01:31 +0000 | [diff] [blame] | 279 | needs_reset |= old_width != width; |
Stefan Reinauer | 64ed2b7 | 2010-03-31 14:47:43 +0000 | [diff] [blame] | 280 | printk(BIOS_SPEW, "old dev2 input|output width=0x%x\n", width); |
Eric Biederman | 5cd8173 | 2004-03-11 15:01:31 +0000 | [diff] [blame] | 281 | |
| 282 | /* Set dev2's widths */ |
| 283 | pci_write_config8(dev2, pos2 + LINK_WIDTH(offs2) + 1, width); |
| 284 | |
| 285 | return needs_reset; |
| 286 | } |
Myles Watson | d61ada6 | 2008-10-02 19:20:22 +0000 | [diff] [blame] | 287 | |
Jonathan Kollasch | e5b7507 | 2010-10-07 23:02:06 +0000 | [diff] [blame] | 288 | #if CONFIG_RAMINIT_SYSINFO |
Stefan Reinauer | 7ce8c54 | 2005-12-02 21:52:30 +0000 | [diff] [blame] | 289 | static void ht_setup_chainx(device_t udev, uint8_t upos, uint8_t bus, unsigned offset_unitid, struct sys_info *sysinfo) |
| 290 | #else |
| 291 | static int ht_setup_chainx(device_t udev, uint8_t upos, uint8_t bus, unsigned offset_unitid) |
| 292 | #endif |
Jason Schildt | 043b409 | 2005-08-10 15:16:44 +0000 | [diff] [blame] | 293 | { |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 294 | //even CONFIG_HT_CHAIN_UNITID_BASE == 0, we still can go through this function, because of end_of_chain check, also We need it to optimize link |
Stefan Reinauer | 7ce8c54 | 2005-12-02 21:52:30 +0000 | [diff] [blame] | 295 | |
Jason Schildt | 043b409 | 2005-08-10 15:16:44 +0000 | [diff] [blame] | 296 | uint8_t next_unitid, last_unitid; |
| 297 | unsigned uoffs; |
Stefan Reinauer | 7ce8c54 | 2005-12-02 21:52:30 +0000 | [diff] [blame] | 298 | |
Jonathan Kollasch | e5b7507 | 2010-10-07 23:02:06 +0000 | [diff] [blame] | 299 | #if !CONFIG_RAMINIT_SYSINFO |
Stefan Reinauer | 7ce8c54 | 2005-12-02 21:52:30 +0000 | [diff] [blame] | 300 | int reset_needed = 0; |
| 301 | #endif |
| 302 | |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 303 | #if CONFIG_HT_CHAIN_END_UNITID_BASE != 0x20 |
| 304 | //let't record the device of last ht device, So we can set the Unitid to CONFIG_HT_CHAIN_END_UNITID_BASE |
Myles Watson | d61ada6 | 2008-10-02 19:20:22 +0000 | [diff] [blame] | 305 | unsigned real_last_unitid; |
| 306 | uint8_t real_last_pos; |
Stefan Reinauer | 7ce8c54 | 2005-12-02 21:52:30 +0000 | [diff] [blame] | 307 | int ht_dev_num = 0; |
Yinghai Lu | 18c70d7 | 2007-09-14 14:58:33 +0000 | [diff] [blame] | 308 | uint8_t end_used = 0; |
Stefan Reinauer | 7ce8c54 | 2005-12-02 21:52:30 +0000 | [diff] [blame] | 309 | #endif |
Jason Schildt | 043b409 | 2005-08-10 15:16:44 +0000 | [diff] [blame] | 310 | |
Li-Ta Lo | 4cd79f3 | 2004-03-26 21:34:04 +0000 | [diff] [blame] | 311 | uoffs = PCI_HT_HOST_OFFS; |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 312 | next_unitid = (offset_unitid) ? CONFIG_HT_CHAIN_UNITID_BASE:1; |
Yinghai Lu | 6a61d6a | 2004-10-20 05:07:16 +0000 | [diff] [blame] | 313 | |
Li-Ta Lo | 4cd79f3 | 2004-03-26 21:34:04 +0000 | [diff] [blame] | 314 | do { |
Jason Schildt | 043b409 | 2005-08-10 15:16:44 +0000 | [diff] [blame] | 315 | uint32_t id; |
| 316 | uint8_t pos; |
| 317 | uint16_t flags, ctrl; |
| 318 | uint8_t count; |
| 319 | unsigned offs; |
Myles Watson | d61ada6 | 2008-10-02 19:20:22 +0000 | [diff] [blame] | 320 | |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 321 | /* Wait until the link initialization is complete */ |
| 322 | do { |
| 323 | ctrl = pci_read_config16(udev, upos + LINK_CTRL(uoffs)); |
| 324 | /* Is this the end of the hypertransport chain? */ |
| 325 | if (ctrl & (1 << 6)) { |
Myles Watson | d61ada6 | 2008-10-02 19:20:22 +0000 | [diff] [blame] | 326 | goto end_of_chain; |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 327 | } |
Stefan Reinauer | 7ce8c54 | 2005-12-02 21:52:30 +0000 | [diff] [blame] | 328 | |
| 329 | if (ctrl & ((1 << 4) | (1 << 8))) { |
Myles Watson | d61ada6 | 2008-10-02 19:20:22 +0000 | [diff] [blame] | 330 | /* |
| 331 | * Either the link has failed, or we have |
| 332 | * a CRC error. |
| 333 | * Sometimes this can happen due to link |
| 334 | * retrain, so lets knock it down and see |
| 335 | * if its transient |
| 336 | */ |
Stefan Reinauer | fbce0ff | 2006-04-11 18:36:42 +0000 | [diff] [blame] | 337 | ctrl |= ((1 << 4) | (1 <<8)); // Link fail + Crc |
Myles Watson | d61ada6 | 2008-10-02 19:20:22 +0000 | [diff] [blame] | 338 | pci_write_config16(udev, upos + LINK_CTRL(uoffs), ctrl); |
| 339 | ctrl = pci_read_config16(udev, upos + LINK_CTRL(uoffs)); |
| 340 | if (ctrl & ((1 << 4) | (1 << 8))) { |
| 341 | print_err("Detected error on Hypertransport Link\n"); |
Stefan Reinauer | 7ce8c54 | 2005-12-02 21:52:30 +0000 | [diff] [blame] | 342 | break; |
Myles Watson | d61ada6 | 2008-10-02 19:20:22 +0000 | [diff] [blame] | 343 | } |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 344 | } |
| 345 | } while((ctrl & (1 << 5)) == 0); |
Myles Watson | d61ada6 | 2008-10-02 19:20:22 +0000 | [diff] [blame] | 346 | |
Yinghai Lu | 6a61d6a | 2004-10-20 05:07:16 +0000 | [diff] [blame] | 347 | device_t dev = PCI_DEV(bus, 0, 0); |
Jason Schildt | 043b409 | 2005-08-10 15:16:44 +0000 | [diff] [blame] | 348 | last_unitid = next_unitid; |
| 349 | |
Li-Ta Lo | 4cd79f3 | 2004-03-26 21:34:04 +0000 | [diff] [blame] | 350 | id = pci_read_config32(dev, PCI_VENDOR_ID); |
Jason Schildt | 043b409 | 2005-08-10 15:16:44 +0000 | [diff] [blame] | 351 | |
Li-Ta Lo | 4cd79f3 | 2004-03-26 21:34:04 +0000 | [diff] [blame] | 352 | /* If the chain is enumerated quit */ |
Myles Watson | d61ada6 | 2008-10-02 19:20:22 +0000 | [diff] [blame] | 353 | if ((id == 0xffffffff) || (id == 0x00000000) || |
| 354 | (id == 0x0000ffff) || (id == 0xffff0000)) |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 355 | { |
Li-Ta Lo | 4cd79f3 | 2004-03-26 21:34:04 +0000 | [diff] [blame] | 356 | break; |
| 357 | } |
Yinghai Lu | 6a61d6a | 2004-10-20 05:07:16 +0000 | [diff] [blame] | 358 | |
Li-Ta Lo | 4cd79f3 | 2004-03-26 21:34:04 +0000 | [diff] [blame] | 359 | pos = ht_lookup_slave_capability(dev); |
| 360 | if (!pos) { |
Myles Watson | d61ada6 | 2008-10-02 19:20:22 +0000 | [diff] [blame] | 361 | print_err("udev="); print_err_hex32(udev); |
| 362 | print_err("\tupos="); print_err_hex32(upos); |
| 363 | print_err("\tuoffs="); print_err_hex32(uoffs); |
Stefan Reinauer | 64ed2b7 | 2010-03-31 14:47:43 +0000 | [diff] [blame] | 364 | print_err("\tHT link capability not found\n"); |
Li-Ta Lo | 4cd79f3 | 2004-03-26 21:34:04 +0000 | [diff] [blame] | 365 | break; |
| 366 | } |
Yinghai Lu | 6a61d6a | 2004-10-20 05:07:16 +0000 | [diff] [blame] | 367 | |
Yinghai Lu | 00a018f | 2007-04-06 21:06:44 +0000 | [diff] [blame] | 368 | |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 369 | #if CONFIG_HT_CHAIN_END_UNITID_BASE != 0x20 |
Yinghai Lu | 00a018f | 2007-04-06 21:06:44 +0000 | [diff] [blame] | 370 | if(offset_unitid) { |
Yinghai Lu | 18c70d7 | 2007-09-14 14:58:33 +0000 | [diff] [blame] | 371 | if(next_unitid>= (bus ? 0x20:0x18) ) { |
| 372 | if(!end_used) { |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 373 | next_unitid = CONFIG_HT_CHAIN_END_UNITID_BASE; |
Yinghai Lu | 18c70d7 | 2007-09-14 14:58:33 +0000 | [diff] [blame] | 374 | end_used = 1; |
| 375 | } else { |
| 376 | goto out; |
| 377 | } |
Myles Watson | d61ada6 | 2008-10-02 19:20:22 +0000 | [diff] [blame] | 378 | |
| 379 | } |
| 380 | real_last_pos = pos; |
Yinghai Lu | 18c70d7 | 2007-09-14 14:58:33 +0000 | [diff] [blame] | 381 | real_last_unitid = next_unitid; |
Yinghai Lu | 00a018f | 2007-04-06 21:06:44 +0000 | [diff] [blame] | 382 | ht_dev_num++; |
Myles Watson | d61ada6 | 2008-10-02 19:20:22 +0000 | [diff] [blame] | 383 | } |
Yinghai Lu | 00a018f | 2007-04-06 21:06:44 +0000 | [diff] [blame] | 384 | #endif |
Yinghai Lu | 18c70d7 | 2007-09-14 14:58:33 +0000 | [diff] [blame] | 385 | /* Update the Unitid of the current device */ |
| 386 | flags = pci_read_config16(dev, pos + PCI_CAP_FLAGS); |
| 387 | flags &= ~0x1f; /* mask out the base Unit ID */ |
| 388 | flags |= next_unitid & 0x1f; |
arch import user (historical) | 98d0d30 | 2005-07-06 17:13:46 +0000 | [diff] [blame] | 389 | pci_write_config16(dev, pos + PCI_CAP_FLAGS, flags); |
| 390 | |
Myles Watson | d61ada6 | 2008-10-02 19:20:22 +0000 | [diff] [blame] | 391 | /* Compute the number of unitids consumed */ |
| 392 | count = (flags >> 5) & 0x1f; |
Yinghai Lu | 18c70d7 | 2007-09-14 14:58:33 +0000 | [diff] [blame] | 393 | |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 394 | /* Note the change in device number */ |
Yinghai Lu | 18c70d7 | 2007-09-14 14:58:33 +0000 | [diff] [blame] | 395 | dev = PCI_DEV(bus, next_unitid, 0); |
Yinghai Lu | e324731 | 2005-01-20 20:41:17 +0000 | [diff] [blame] | 396 | |
Myles Watson | d61ada6 | 2008-10-02 19:20:22 +0000 | [diff] [blame] | 397 | next_unitid += count; |
Yinghai Lu | e324731 | 2005-01-20 20:41:17 +0000 | [diff] [blame] | 398 | |
Yinghai Lu | d4b278c | 2006-10-04 20:46:15 +0000 | [diff] [blame] | 399 | /* Find which side of the ht link we are on, |
| 400 | * by reading which direction our last write to PCI_CAP_FLAGS |
| 401 | * came from. |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 402 | */ |
| 403 | flags = pci_read_config16(dev, pos + PCI_CAP_FLAGS); |
Myles Watson | d61ada6 | 2008-10-02 19:20:22 +0000 | [diff] [blame] | 404 | offs = ((flags>>10) & 1) ? PCI_HT_SLAVE1_OFFS : PCI_HT_SLAVE0_OFFS; |
| 405 | |
Jonathan Kollasch | e5b7507 | 2010-10-07 23:02:06 +0000 | [diff] [blame] | 406 | #if CONFIG_RAMINIT_SYSINFO |
Myles Watson | d61ada6 | 2008-10-02 19:20:22 +0000 | [diff] [blame] | 407 | /* store the link pair here and we will Setup the Hypertransport link later, after we get final FID/VID */ |
Stefan Reinauer | 7ce8c54 | 2005-12-02 21:52:30 +0000 | [diff] [blame] | 408 | { |
| 409 | struct link_pair_st *link_pair = &sysinfo->link_pair[sysinfo->link_pair_num]; |
| 410 | link_pair->udev = udev; |
| 411 | link_pair->upos = upos; |
| 412 | link_pair->uoffs = uoffs; |
| 413 | link_pair->dev = dev; |
| 414 | link_pair->pos = pos; |
| 415 | link_pair->offs = offs; |
| 416 | sysinfo->link_pair_num++; |
| 417 | } |
| 418 | #else |
| 419 | reset_needed |= ht_optimize_link(udev, upos, uoffs, dev, pos, offs); |
| 420 | #endif |
Li-Ta Lo | 4cd79f3 | 2004-03-26 21:34:04 +0000 | [diff] [blame] | 421 | |
Yinghai Lu | d4b278c | 2006-10-04 20:46:15 +0000 | [diff] [blame] | 422 | /* Remeber the location of the last device */ |
arch import user (historical) | 98d0d30 | 2005-07-06 17:13:46 +0000 | [diff] [blame] | 423 | udev = dev; |
| 424 | upos = pos; |
| 425 | uoffs = ( offs != PCI_HT_SLAVE0_OFFS ) ? PCI_HT_SLAVE0_OFFS : PCI_HT_SLAVE1_OFFS; |
Li-Ta Lo | 4cd79f3 | 2004-03-26 21:34:04 +0000 | [diff] [blame] | 426 | |
Yinghai Lu | 18c70d7 | 2007-09-14 14:58:33 +0000 | [diff] [blame] | 427 | } while (last_unitid != next_unitid ); |
Jason Schildt | 043b409 | 2005-08-10 15:16:44 +0000 | [diff] [blame] | 428 | |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 429 | #if CONFIG_HT_CHAIN_END_UNITID_BASE != 0x20 |
Yinghai Lu | 18c70d7 | 2007-09-14 14:58:33 +0000 | [diff] [blame] | 430 | out: |
Myles Watson | fa12b67 | 2009-04-30 22:45:41 +0000 | [diff] [blame] | 431 | #endif |
Stefan Reinauer | 7ce8c54 | 2005-12-02 21:52:30 +0000 | [diff] [blame] | 432 | end_of_chain: ; |
Stefan Reinauer | 7ce8c54 | 2005-12-02 21:52:30 +0000 | [diff] [blame] | 433 | |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 434 | #if CONFIG_HT_CHAIN_END_UNITID_BASE != 0x20 |
| 435 | if(offset_unitid && (ht_dev_num>1) && (real_last_unitid != CONFIG_HT_CHAIN_END_UNITID_BASE) && !end_used ) { |
Myles Watson | d61ada6 | 2008-10-02 19:20:22 +0000 | [diff] [blame] | 436 | uint16_t flags; |
Myles Watson | d61ada6 | 2008-10-02 19:20:22 +0000 | [diff] [blame] | 437 | flags = pci_read_config16(PCI_DEV(bus,real_last_unitid,0), real_last_pos + PCI_CAP_FLAGS); |
| 438 | flags &= ~0x1f; |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 439 | flags |= CONFIG_HT_CHAIN_END_UNITID_BASE & 0x1f; |
Myles Watson | d61ada6 | 2008-10-02 19:20:22 +0000 | [diff] [blame] | 440 | pci_write_config16(PCI_DEV(bus, real_last_unitid, 0), real_last_pos + PCI_CAP_FLAGS, flags); |
| 441 | |
Jonathan Kollasch | e5b7507 | 2010-10-07 23:02:06 +0000 | [diff] [blame] | 442 | #if CONFIG_RAMINIT_SYSINFO |
Stefan Reinauer | 7ce8c54 | 2005-12-02 21:52:30 +0000 | [diff] [blame] | 443 | // Here need to change the dev in the array |
Stefan Reinauer | c51dc44 | 2010-04-07 01:44:04 +0000 | [diff] [blame] | 444 | int i; |
Stefan Reinauer | 7ce8c54 | 2005-12-02 21:52:30 +0000 | [diff] [blame] | 445 | for(i=0;i<sysinfo->link_pair_num;i++) |
Myles Watson | d61ada6 | 2008-10-02 19:20:22 +0000 | [diff] [blame] | 446 | { |
| 447 | struct link_pair_st *link_pair = &sysinfo->link_pair[i]; |
| 448 | if(link_pair->udev == PCI_DEV(bus, real_last_unitid, 0)) { |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 449 | link_pair->udev = PCI_DEV(bus, CONFIG_HT_CHAIN_END_UNITID_BASE, 0); |
Stefan Reinauer | 7ce8c54 | 2005-12-02 21:52:30 +0000 | [diff] [blame] | 450 | continue; |
| 451 | } |
Myles Watson | d61ada6 | 2008-10-02 19:20:22 +0000 | [diff] [blame] | 452 | if(link_pair->dev == PCI_DEV(bus, real_last_unitid, 0)) { |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 453 | link_pair->dev = PCI_DEV(bus, CONFIG_HT_CHAIN_END_UNITID_BASE, 0); |
Myles Watson | d61ada6 | 2008-10-02 19:20:22 +0000 | [diff] [blame] | 454 | } |
| 455 | } |
Stefan Reinauer | 7ce8c54 | 2005-12-02 21:52:30 +0000 | [diff] [blame] | 456 | #endif |
| 457 | |
Myles Watson | d61ada6 | 2008-10-02 19:20:22 +0000 | [diff] [blame] | 458 | } |
Stefan Reinauer | 7ce8c54 | 2005-12-02 21:52:30 +0000 | [diff] [blame] | 459 | #endif |
| 460 | |
Jonathan Kollasch | e5b7507 | 2010-10-07 23:02:06 +0000 | [diff] [blame] | 461 | #if !CONFIG_RAMINIT_SYSINFO |
Yinghai Lu | 6a61d6a | 2004-10-20 05:07:16 +0000 | [diff] [blame] | 462 | return reset_needed; |
Stefan Reinauer | 7ce8c54 | 2005-12-02 21:52:30 +0000 | [diff] [blame] | 463 | #endif |
| 464 | |
Li-Ta Lo | 4cd79f3 | 2004-03-26 21:34:04 +0000 | [diff] [blame] | 465 | } |
Li-Ta Lo | edeff59 | 2004-03-25 17:50:06 +0000 | [diff] [blame] | 466 | |
Stefan Reinauer | d4f5373 | 2010-04-09 14:46:51 +0000 | [diff] [blame] | 467 | #if 0 |
Jonathan Kollasch | e5b7507 | 2010-10-07 23:02:06 +0000 | [diff] [blame] | 468 | #if CONFIG_RAMINIT_SYSINFO |
Stefan Reinauer | 7ce8c54 | 2005-12-02 21:52:30 +0000 | [diff] [blame] | 469 | static void ht_setup_chain(device_t udev, unsigned upos, struct sys_info *sysinfo) |
| 470 | #else |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 471 | static int ht_setup_chain(device_t udev, unsigned upos) |
Stefan Reinauer | 7ce8c54 | 2005-12-02 21:52:30 +0000 | [diff] [blame] | 472 | #endif |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 473 | { |
Stefan Reinauer | 7ce8c54 | 2005-12-02 21:52:30 +0000 | [diff] [blame] | 474 | unsigned offset_unitid = 0; |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 475 | #if ((CONFIG_HT_CHAIN_UNITID_BASE != 1) || (CONFIG_HT_CHAIN_END_UNITID_BASE != 0x20)) |
Myles Watson | d61ada6 | 2008-10-02 19:20:22 +0000 | [diff] [blame] | 476 | offset_unitid = 1; |
Stefan Reinauer | 7ce8c54 | 2005-12-02 21:52:30 +0000 | [diff] [blame] | 477 | #endif |
| 478 | |
Myles Watson | d61ada6 | 2008-10-02 19:20:22 +0000 | [diff] [blame] | 479 | /* Assumption the HT chain that is bus 0 has the HT I/O Hub on it. |
| 480 | * On most boards this just happens. If a cpu has multiple |
| 481 | * non Coherent links the appropriate bus registers for the |
| 482 | * links needs to be programed to point at bus 0. |
| 483 | */ |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 484 | |
Myles Watson | d61ada6 | 2008-10-02 19:20:22 +0000 | [diff] [blame] | 485 | /* Make certain the HT bus is not enumerated */ |
| 486 | ht_collapse_previous_enumeration(0, 0); |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 487 | |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 488 | #if ((CONFIG_HT_CHAIN_UNITID_BASE != 1) || (CONFIG_HT_CHAIN_END_UNITID_BASE != 0x20)) |
Myles Watson | d61ada6 | 2008-10-02 19:20:22 +0000 | [diff] [blame] | 489 | offset_unitid = 1; |
Stefan Reinauer | 7ce8c54 | 2005-12-02 21:52:30 +0000 | [diff] [blame] | 490 | #endif |
| 491 | |
Jonathan Kollasch | e5b7507 | 2010-10-07 23:02:06 +0000 | [diff] [blame] | 492 | #if CONFIG_RAMINIT_SYSINFO |
Stefan Reinauer | 7ce8c54 | 2005-12-02 21:52:30 +0000 | [diff] [blame] | 493 | ht_setup_chainx(udev, upos, 0, offset_unitid, sysinfo); |
| 494 | #else |
Myles Watson | d61ada6 | 2008-10-02 19:20:22 +0000 | [diff] [blame] | 495 | return ht_setup_chainx(udev, upos, 0, offset_unitid); |
Stefan Reinauer | 7ce8c54 | 2005-12-02 21:52:30 +0000 | [diff] [blame] | 496 | #endif |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 497 | } |
Stefan Reinauer | d4f5373 | 2010-04-09 14:46:51 +0000 | [diff] [blame] | 498 | #endif |
| 499 | |
Yinghai Lu | d4b278c | 2006-10-04 20:46:15 +0000 | [diff] [blame] | 500 | static int optimize_link_read_pointer(uint8_t node, uint8_t linkn, uint8_t linkt, uint8_t val) |
Yinghai Lu | 1bc5654 | 2005-01-06 02:23:31 +0000 | [diff] [blame] | 501 | { |
Jason Schildt | 043b409 | 2005-08-10 15:16:44 +0000 | [diff] [blame] | 502 | uint32_t dword, dword_old; |
| 503 | uint8_t link_type; |
Myles Watson | d61ada6 | 2008-10-02 19:20:22 +0000 | [diff] [blame] | 504 | |
Yinghai Lu | 1bc5654 | 2005-01-06 02:23:31 +0000 | [diff] [blame] | 505 | /* This works on an Athlon64 because unimplemented links return 0 */ |
| 506 | dword = pci_read_config32(PCI_DEV(0,0x18+node,0), 0x98 + (linkn * 0x20)); |
| 507 | link_type = dword & 0xff; |
Myles Watson | d61ada6 | 2008-10-02 19:20:22 +0000 | [diff] [blame] | 508 | |
| 509 | |
Yinghai Lu | d4b278c | 2006-10-04 20:46:15 +0000 | [diff] [blame] | 510 | if ( (link_type & 7) == linkt ) { /* Coherent Link only linkt = 3, ncoherent = 7*/ |
| 511 | dword_old = dword = pci_read_config32(PCI_DEV(0,0x18+node,3), 0xdc); |
Yinghai Lu | 1bc5654 | 2005-01-06 02:23:31 +0000 | [diff] [blame] | 512 | dword &= ~( 0xff<<(linkn *8) ); |
| 513 | dword |= val << (linkn *8); |
Myles Watson | d61ada6 | 2008-10-02 19:20:22 +0000 | [diff] [blame] | 514 | |
Yinghai Lu | d4b278c | 2006-10-04 20:46:15 +0000 | [diff] [blame] | 515 | if (dword != dword_old) { |
| 516 | pci_write_config32(PCI_DEV(0,0x18+node,3), 0xdc, dword); |
| 517 | return 1; |
| 518 | } |
Yinghai Lu | 1bc5654 | 2005-01-06 02:23:31 +0000 | [diff] [blame] | 519 | } |
Myles Watson | d61ada6 | 2008-10-02 19:20:22 +0000 | [diff] [blame] | 520 | |
Yinghai Lu | 1bc5654 | 2005-01-06 02:23:31 +0000 | [diff] [blame] | 521 | return 0; |
| 522 | } |
| 523 | |
Stefan Reinauer | 7ce8c54 | 2005-12-02 21:52:30 +0000 | [diff] [blame] | 524 | static int optimize_link_read_pointers_chain(uint8_t ht_c_num) |
Yinghai Lu | 1bc5654 | 2005-01-06 02:23:31 +0000 | [diff] [blame] | 525 | { |
Myles Watson | d61ada6 | 2008-10-02 19:20:22 +0000 | [diff] [blame] | 526 | int reset_needed; |
Jason Schildt | 043b409 | 2005-08-10 15:16:44 +0000 | [diff] [blame] | 527 | uint8_t i; |
Yinghai Lu | 1bc5654 | 2005-01-06 02:23:31 +0000 | [diff] [blame] | 528 | |
| 529 | reset_needed = 0; |
| 530 | |
| 531 | for (i = 0; i < ht_c_num; i++) { |
Jason Schildt | 043b409 | 2005-08-10 15:16:44 +0000 | [diff] [blame] | 532 | uint32_t reg; |
| 533 | uint8_t nodeid, linkn; |
| 534 | uint8_t busn; |
| 535 | uint8_t val; |
Yinghai Lu | d4b278c | 2006-10-04 20:46:15 +0000 | [diff] [blame] | 536 | unsigned devn = 1; |
| 537 | |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 538 | #if ((CONFIG_HT_CHAIN_UNITID_BASE != 1) || (CONFIG_HT_CHAIN_END_UNITID_BASE != 0x20)) |
| 539 | #if CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY == 1 |
Myles Watson | d61ada6 | 2008-10-02 19:20:22 +0000 | [diff] [blame] | 540 | if(i==0) // to check if it is sb ht chain |
| 541 | #endif |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 542 | devn = CONFIG_HT_CHAIN_UNITID_BASE; |
Myles Watson | d61ada6 | 2008-10-02 19:20:22 +0000 | [diff] [blame] | 543 | #endif |
Yinghai Lu | 1bc5654 | 2005-01-06 02:23:31 +0000 | [diff] [blame] | 544 | |
| 545 | reg = pci_read_config32(PCI_DEV(0,0x18,1), 0xe0 + i * 4); |
Myles Watson | d61ada6 | 2008-10-02 19:20:22 +0000 | [diff] [blame] | 546 | |
Yinghai Lu | 1bc5654 | 2005-01-06 02:23:31 +0000 | [diff] [blame] | 547 | nodeid = ((reg & 0xf0)>>4); // nodeid |
| 548 | linkn = ((reg & 0xf00)>>8); // link n |
| 549 | busn = (reg & 0xff0000)>>16; //busn |
Yinghai Lu | d4b278c | 2006-10-04 20:46:15 +0000 | [diff] [blame] | 550 | |
| 551 | reg = pci_read_config32( PCI_DEV(busn, devn, 0), PCI_VENDOR_ID); // ? the chain dev maybe offseted |
Yinghai Lu | 1bc5654 | 2005-01-06 02:23:31 +0000 | [diff] [blame] | 552 | if ( (reg & 0xffff) == PCI_VENDOR_ID_AMD) { |
| 553 | val = 0x25; |
Jason Schildt | 043b409 | 2005-08-10 15:16:44 +0000 | [diff] [blame] | 554 | } else if ( (reg & 0xffff) == PCI_VENDOR_ID_NVIDIA ) { |
Yinghai Lu | 1bc5654 | 2005-01-06 02:23:31 +0000 | [diff] [blame] | 555 | val = 0x25;//??? |
Jason Schildt | 043b409 | 2005-08-10 15:16:44 +0000 | [diff] [blame] | 556 | } else { |
Yinghai Lu | 1bc5654 | 2005-01-06 02:23:31 +0000 | [diff] [blame] | 557 | continue; |
| 558 | } |
| 559 | |
| 560 | reset_needed |= optimize_link_read_pointer(nodeid, linkn, 0x07, val); |
| 561 | |
| 562 | } |
| 563 | |
| 564 | return reset_needed; |
| 565 | } |
| 566 | |
Stefan Reinauer | 432461e | 2011-04-19 00:36:39 +0000 | [diff] [blame^] | 567 | #if CONFIG_SOUTHBRIDGE_NVIDIA_CK804 // || CONFIG_SOUTHBRIDGE_NVIDIA_MCP55 |
Yinghai Lu | d4b278c | 2006-10-04 20:46:15 +0000 | [diff] [blame] | 568 | static int set_ht_link_buffer_count(uint8_t node, uint8_t linkn, uint8_t linkt, unsigned val) |
| 569 | { |
Myles Watson | d61ada6 | 2008-10-02 19:20:22 +0000 | [diff] [blame] | 570 | uint32_t dword; |
| 571 | uint8_t link_type; |
Yinghai Lu | d4b278c | 2006-10-04 20:46:15 +0000 | [diff] [blame] | 572 | unsigned regpos; |
| 573 | device_t dev; |
| 574 | |
Myles Watson | d61ada6 | 2008-10-02 19:20:22 +0000 | [diff] [blame] | 575 | /* This works on an Athlon64 because unimplemented links return 0 */ |
Yinghai Lu | d4b278c | 2006-10-04 20:46:15 +0000 | [diff] [blame] | 576 | regpos = 0x98 + (linkn * 0x20); |
| 577 | dev = PCI_DEV(0,0x18+node,0); |
Myles Watson | d61ada6 | 2008-10-02 19:20:22 +0000 | [diff] [blame] | 578 | dword = pci_read_config32(dev, regpos); |
| 579 | link_type = dword & 0xff; |
Yinghai Lu | d4b278c | 2006-10-04 20:46:15 +0000 | [diff] [blame] | 580 | |
Myles Watson | d61ada6 | 2008-10-02 19:20:22 +0000 | [diff] [blame] | 581 | if ( (link_type & 0x7) == linkt ) { /* Coherent Link only linkt = 3, ncoherent = 7*/ |
Yinghai Lu | d4b278c | 2006-10-04 20:46:15 +0000 | [diff] [blame] | 582 | regpos = 0x90 + (linkn * 0x20); |
Myles Watson | d61ada6 | 2008-10-02 19:20:22 +0000 | [diff] [blame] | 583 | dword = pci_read_config32(dev, regpos ); |
Yinghai Lu | d4b278c | 2006-10-04 20:46:15 +0000 | [diff] [blame] | 584 | |
Myles Watson | d61ada6 | 2008-10-02 19:20:22 +0000 | [diff] [blame] | 585 | if (dword != val) { |
| 586 | pci_write_config32(dev, regpos, val); |
| 587 | return 1; |
| 588 | } |
Yinghai Lu | d4b278c | 2006-10-04 20:46:15 +0000 | [diff] [blame] | 589 | } |
| 590 | |
Myles Watson | d61ada6 | 2008-10-02 19:20:22 +0000 | [diff] [blame] | 591 | return 0; |
Yinghai Lu | d4b278c | 2006-10-04 20:46:15 +0000 | [diff] [blame] | 592 | } |
Stefan Reinauer | 116ec61 | 2010-04-23 19:16:30 +0000 | [diff] [blame] | 593 | |
Yinghai Lu | d4b278c | 2006-10-04 20:46:15 +0000 | [diff] [blame] | 594 | static int set_ht_link_buffer_counts_chain(uint8_t ht_c_num, unsigned vendorid, unsigned val) |
| 595 | { |
Myles Watson | d61ada6 | 2008-10-02 19:20:22 +0000 | [diff] [blame] | 596 | int reset_needed; |
| 597 | uint8_t i; |
Yinghai Lu | d4b278c | 2006-10-04 20:46:15 +0000 | [diff] [blame] | 598 | |
Myles Watson | d61ada6 | 2008-10-02 19:20:22 +0000 | [diff] [blame] | 599 | reset_needed = 0; |
Yinghai Lu | d4b278c | 2006-10-04 20:46:15 +0000 | [diff] [blame] | 600 | |
Myles Watson | d61ada6 | 2008-10-02 19:20:22 +0000 | [diff] [blame] | 601 | for (i = 0; i < ht_c_num; i++) { |
| 602 | uint32_t reg; |
| 603 | uint8_t nodeid, linkn; |
| 604 | uint8_t busn; |
| 605 | unsigned devn; |
Yinghai Lu | d4b278c | 2006-10-04 20:46:15 +0000 | [diff] [blame] | 606 | |
Myles Watson | d61ada6 | 2008-10-02 19:20:22 +0000 | [diff] [blame] | 607 | reg = pci_read_config32(PCI_DEV(0,0x18,1), 0xe0 + i * 4); |
| 608 | if((reg & 3) != 3) continue; // not enabled |
Yinghai Lu | d4b278c | 2006-10-04 20:46:15 +0000 | [diff] [blame] | 609 | |
Myles Watson | d61ada6 | 2008-10-02 19:20:22 +0000 | [diff] [blame] | 610 | nodeid = ((reg & 0xf0)>>4); // nodeid |
| 611 | linkn = ((reg & 0xf00)>>8); // link n |
| 612 | busn = (reg & 0xff0000)>>16; //busn |
Yinghai Lu | d4b278c | 2006-10-04 20:46:15 +0000 | [diff] [blame] | 613 | |
Yinghai Lu | 00a018f | 2007-04-06 21:06:44 +0000 | [diff] [blame] | 614 | for(devn = 0; devn < 0x20; devn++) { |
Myles Watson | d61ada6 | 2008-10-02 19:20:22 +0000 | [diff] [blame] | 615 | reg = pci_read_config32( PCI_DEV(busn, devn, 0), PCI_VENDOR_ID); //1? |
| 616 | if ( (reg & 0xffff) == vendorid ) { |
| 617 | reset_needed |= set_ht_link_buffer_count(nodeid, linkn, 0x07,val); |
Yinghai Lu | 00a018f | 2007-04-06 21:06:44 +0000 | [diff] [blame] | 618 | break; |
Myles Watson | d61ada6 | 2008-10-02 19:20:22 +0000 | [diff] [blame] | 619 | } |
Yinghai Lu | 00a018f | 2007-04-06 21:06:44 +0000 | [diff] [blame] | 620 | } |
Myles Watson | d61ada6 | 2008-10-02 19:20:22 +0000 | [diff] [blame] | 621 | } |
Yinghai Lu | d4b278c | 2006-10-04 20:46:15 +0000 | [diff] [blame] | 622 | |
Myles Watson | d61ada6 | 2008-10-02 19:20:22 +0000 | [diff] [blame] | 623 | return reset_needed; |
Yinghai Lu | d4b278c | 2006-10-04 20:46:15 +0000 | [diff] [blame] | 624 | } |
Stefan Reinauer | 116ec61 | 2010-04-23 19:16:30 +0000 | [diff] [blame] | 625 | #endif |
Yinghai Lu | d4b278c | 2006-10-04 20:46:15 +0000 | [diff] [blame] | 626 | |
Jonathan Kollasch | e5b7507 | 2010-10-07 23:02:06 +0000 | [diff] [blame] | 627 | #if CONFIG_RAMINIT_SYSINFO |
Stefan Reinauer | 7ce8c54 | 2005-12-02 21:52:30 +0000 | [diff] [blame] | 628 | static void ht_setup_chains(uint8_t ht_c_num, struct sys_info *sysinfo) |
| 629 | #else |
Jason Schildt | 043b409 | 2005-08-10 15:16:44 +0000 | [diff] [blame] | 630 | static int ht_setup_chains(uint8_t ht_c_num) |
Stefan Reinauer | 7ce8c54 | 2005-12-02 21:52:30 +0000 | [diff] [blame] | 631 | #endif |
Li-Ta Lo | 4cd79f3 | 2004-03-26 21:34:04 +0000 | [diff] [blame] | 632 | { |
Myles Watson | d61ada6 | 2008-10-02 19:20:22 +0000 | [diff] [blame] | 633 | /* Assumption the HT chain that is bus 0 has the HT I/O Hub on it. |
Yinghai Lu | d4b278c | 2006-10-04 20:46:15 +0000 | [diff] [blame] | 634 | * On most boards this just happens. If a cpu has multiple |
| 635 | * non Coherent links the appropriate bus registers for the |
Li-Ta Lo | 4cd79f3 | 2004-03-26 21:34:04 +0000 | [diff] [blame] | 636 | * links needs to be programed to point at bus 0. |
| 637 | */ |
Myles Watson | d61ada6 | 2008-10-02 19:20:22 +0000 | [diff] [blame] | 638 | uint8_t upos; |
| 639 | device_t udev; |
Jason Schildt | 043b409 | 2005-08-10 15:16:44 +0000 | [diff] [blame] | 640 | uint8_t i; |
Li-Ta Lo | edeff59 | 2004-03-25 17:50:06 +0000 | [diff] [blame] | 641 | |
Jonathan Kollasch | e5b7507 | 2010-10-07 23:02:06 +0000 | [diff] [blame] | 642 | #if !CONFIG_RAMINIT_SYSINFO |
Stefan Reinauer | 7ce8c54 | 2005-12-02 21:52:30 +0000 | [diff] [blame] | 643 | int reset_needed = 0; |
| 644 | #else |
| 645 | sysinfo->link_pair_num = 0; |
| 646 | #endif |
Li-Ta Lo | edeff59 | 2004-03-25 17:50:06 +0000 | [diff] [blame] | 647 | |
Stefan Reinauer | 7ce8c54 | 2005-12-02 21:52:30 +0000 | [diff] [blame] | 648 | // first one is SB Chain |
Li-Ta Lo | 8e79fc3 | 2004-04-15 17:33:21 +0000 | [diff] [blame] | 649 | for (i = 0; i < ht_c_num; i++) { |
Jason Schildt | 043b409 | 2005-08-10 15:16:44 +0000 | [diff] [blame] | 650 | uint32_t reg; |
| 651 | uint8_t devpos; |
Yinghai Lu | 6a61d6a | 2004-10-20 05:07:16 +0000 | [diff] [blame] | 652 | unsigned regpos; |
Jason Schildt | 043b409 | 2005-08-10 15:16:44 +0000 | [diff] [blame] | 653 | uint32_t dword; |
| 654 | uint8_t busn; |
Stefan Reinauer | 7ce8c54 | 2005-12-02 21:52:30 +0000 | [diff] [blame] | 655 | unsigned offset_unitid = 0; |
Myles Watson | d61ada6 | 2008-10-02 19:20:22 +0000 | [diff] [blame] | 656 | |
Yinghai Lu | 2c956bb | 2004-12-17 21:08:16 +0000 | [diff] [blame] | 657 | reg = pci_read_config32(PCI_DEV(0,0x18,1), 0xe0 + i * 4); |
Li-Ta Lo | edeff59 | 2004-03-25 17:50:06 +0000 | [diff] [blame] | 658 | |
Yinghai Lu | d4b278c | 2006-10-04 20:46:15 +0000 | [diff] [blame] | 659 | //We need setup 0x94, 0xb4, and 0xd4 according to the reg |
| 660 | devpos = ((reg & 0xf0)>>4)+0x18; // nodeid; it will decide 0x18 or 0x19 |
| 661 | regpos = ((reg & 0xf00)>>8) * 0x20 + 0x94; // link n; it will decide 0x94 or 0xb4, 0x0xd4; |
Yinghai Lu | 6a61d6a | 2004-10-20 05:07:16 +0000 | [diff] [blame] | 662 | busn = (reg & 0xff0000)>>16; |
Myles Watson | d61ada6 | 2008-10-02 19:20:22 +0000 | [diff] [blame] | 663 | |
Yinghai Lu | 6a61d6a | 2004-10-20 05:07:16 +0000 | [diff] [blame] | 664 | dword = pci_read_config32( PCI_DEV(0, devpos, 0), regpos) ; |
| 665 | dword &= ~(0xffff<<8); |
| 666 | dword |= (reg & 0xffff0000)>>8; |
| 667 | pci_write_config32( PCI_DEV(0, devpos,0), regpos , dword); |
Myles Watson | d61ada6 | 2008-10-02 19:20:22 +0000 | [diff] [blame] | 668 | |
Stefan Reinauer | 7ce8c54 | 2005-12-02 21:52:30 +0000 | [diff] [blame] | 669 | |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 670 | #if ((CONFIG_HT_CHAIN_UNITID_BASE != 1) || (CONFIG_HT_CHAIN_END_UNITID_BASE != 0x20)) |
| 671 | #if CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY == 1 |
Myles Watson | d61ada6 | 2008-10-02 19:20:22 +0000 | [diff] [blame] | 672 | if(i==0) // to check if it is sb ht chain |
| 673 | #endif |
| 674 | offset_unitid = 1; |
| 675 | #endif |
| 676 | |
| 677 | /* Make certain the HT bus is not enumerated */ |
| 678 | ht_collapse_previous_enumeration(busn, offset_unitid); |
Li-Ta Lo | edeff59 | 2004-03-25 17:50:06 +0000 | [diff] [blame] | 679 | |
Yinghai Lu | 4403f60 | 2004-11-03 00:47:40 +0000 | [diff] [blame] | 680 | upos = ((reg & 0xf00)>>8) * 0x20 + 0x80; |
Jason Schildt | 043b409 | 2005-08-10 15:16:44 +0000 | [diff] [blame] | 681 | udev = PCI_DEV(0, devpos, 0); |
Stefan Reinauer | 7ce8c54 | 2005-12-02 21:52:30 +0000 | [diff] [blame] | 682 | |
Jonathan Kollasch | e5b7507 | 2010-10-07 23:02:06 +0000 | [diff] [blame] | 683 | #if CONFIG_RAMINIT_SYSINFO |
Stefan Reinauer | 7ce8c54 | 2005-12-02 21:52:30 +0000 | [diff] [blame] | 684 | ht_setup_chainx(udev,upos,busn, offset_unitid, sysinfo); // all not |
| 685 | #else |
| 686 | reset_needed |= ht_setup_chainx(udev,upos,busn, offset_unitid); //all not |
| 687 | #endif |
Jason Schildt | 043b409 | 2005-08-10 15:16:44 +0000 | [diff] [blame] | 688 | |
Li-Ta Lo | 4cd79f3 | 2004-03-26 21:34:04 +0000 | [diff] [blame] | 689 | } |
Li-Ta Lo | edeff59 | 2004-03-25 17:50:06 +0000 | [diff] [blame] | 690 | |
Jonathan Kollasch | e5b7507 | 2010-10-07 23:02:06 +0000 | [diff] [blame] | 691 | #if !CONFIG_RAMINIT_SYSINFO |
Stefan Reinauer | 7ce8c54 | 2005-12-02 21:52:30 +0000 | [diff] [blame] | 692 | reset_needed |= optimize_link_read_pointers_chain(ht_c_num); |
Yinghai Lu | 2c956bb | 2004-12-17 21:08:16 +0000 | [diff] [blame] | 693 | |
Stefan Reinauer | 7ce8c54 | 2005-12-02 21:52:30 +0000 | [diff] [blame] | 694 | return reset_needed; |
Jason Schildt | 043b409 | 2005-08-10 15:16:44 +0000 | [diff] [blame] | 695 | #endif |
Yinghai Lu | 1bc5654 | 2005-01-06 02:23:31 +0000 | [diff] [blame] | 696 | |
Stefan Reinauer | 7ce8c54 | 2005-12-02 21:52:30 +0000 | [diff] [blame] | 697 | } |
| 698 | |
Yinghai Lu | d4b278c | 2006-10-04 20:46:15 +0000 | [diff] [blame] | 699 | #if defined (__GNUC__) |
| 700 | static inline unsigned get_nodes(void); |
| 701 | #endif |
Stefan Reinauer | 7ce8c54 | 2005-12-02 21:52:30 +0000 | [diff] [blame] | 702 | |
Jonathan Kollasch | e5b7507 | 2010-10-07 23:02:06 +0000 | [diff] [blame] | 703 | #if CONFIG_RAMINIT_SYSINFO |
Stefan Reinauer | 7ce8c54 | 2005-12-02 21:52:30 +0000 | [diff] [blame] | 704 | static void ht_setup_chains_x(struct sys_info *sysinfo) |
| 705 | #else |
Jason Schildt | 043b409 | 2005-08-10 15:16:44 +0000 | [diff] [blame] | 706 | static int ht_setup_chains_x(void) |
Stefan Reinauer | 7ce8c54 | 2005-12-02 21:52:30 +0000 | [diff] [blame] | 707 | #endif |
Myles Watson | d61ada6 | 2008-10-02 19:20:22 +0000 | [diff] [blame] | 708 | { |
| 709 | uint8_t nodeid; |
| 710 | uint32_t reg; |
Jason Schildt | 043b409 | 2005-08-10 15:16:44 +0000 | [diff] [blame] | 711 | uint32_t tempreg; |
Myles Watson | d61ada6 | 2008-10-02 19:20:22 +0000 | [diff] [blame] | 712 | uint8_t next_busn; |
| 713 | uint8_t ht_c_num; |
Jason Schildt | 043b409 | 2005-08-10 15:16:44 +0000 | [diff] [blame] | 714 | uint8_t nodes; |
Patrick Georgi | 7bbd7f2 | 2010-11-07 18:20:51 +0000 | [diff] [blame] | 715 | #if CONFIG_K8_ALLOCATE_IO_RANGE |
Jason Schildt | 043b409 | 2005-08-10 15:16:44 +0000 | [diff] [blame] | 716 | unsigned next_io_base; |
| 717 | #endif |
Stefan Reinauer | 7ce8c54 | 2005-12-02 21:52:30 +0000 | [diff] [blame] | 718 | |
Myles Watson | d61ada6 | 2008-10-02 19:20:22 +0000 | [diff] [blame] | 719 | nodes = get_nodes(); |
| 720 | |
| 721 | /* read PCI_DEV(0,0x18,0) 0x64 bit [8:9] to find out SbLink m */ |
| 722 | reg = pci_read_config32(PCI_DEV(0, 0x18, 0), 0x64); |
| 723 | /* update PCI_DEV(0, 0x18, 1) 0xe0 to 0x05000m03, and next_busn=0x3f+1 */ |
Jason Schildt | 043b409 | 2005-08-10 15:16:44 +0000 | [diff] [blame] | 724 | print_linkn_in("SBLink=", ((reg>>8) & 3) ); |
Jonathan Kollasch | e5b7507 | 2010-10-07 23:02:06 +0000 | [diff] [blame] | 725 | #if CONFIG_RAMINIT_SYSINFO |
Yinghai Lu | d4b278c | 2006-10-04 20:46:15 +0000 | [diff] [blame] | 726 | sysinfo->sblk = (reg>>8) & 3; |
Stefan Reinauer | 7ce8c54 | 2005-12-02 21:52:30 +0000 | [diff] [blame] | 727 | sysinfo->sbbusn = 0; |
| 728 | sysinfo->nodes = nodes; |
| 729 | #endif |
Myles Watson | d61ada6 | 2008-10-02 19:20:22 +0000 | [diff] [blame] | 730 | tempreg = 3 | ( 0<<4) | (((reg>>8) & 3)<<8) | (0<<16)| (0x3f<<24); |
| 731 | pci_write_config32(PCI_DEV(0, 0x18, 1), 0xe0, tempreg); |
Jason Schildt | 043b409 | 2005-08-10 15:16:44 +0000 | [diff] [blame] | 732 | |
Yinghai Lu | d4b278c | 2006-10-04 20:46:15 +0000 | [diff] [blame] | 733 | next_busn=0x3f+1; /* 0 will be used ht chain with SB we need to keep SB in bus0 in auto stage*/ |
Jason Schildt | 043b409 | 2005-08-10 15:16:44 +0000 | [diff] [blame] | 734 | |
Patrick Georgi | 7bbd7f2 | 2010-11-07 18:20:51 +0000 | [diff] [blame] | 735 | #if CONFIG_K8_ALLOCATE_IO_RANGE |
Jason Schildt | 043b409 | 2005-08-10 15:16:44 +0000 | [diff] [blame] | 736 | /* io range allocation */ |
| 737 | tempreg = 0 | (((reg>>8) & 0x3) << 4 )| (0x3<<12); //limit |
| 738 | pci_write_config32(PCI_DEV(0, 0x18, 1), 0xC4, tempreg); |
| 739 | tempreg = 3 | ( 3<<4) | (0<<12); //base |
| 740 | pci_write_config32(PCI_DEV(0, 0x18, 1), 0xC0, tempreg); |
| 741 | next_io_base = 0x3+0x1; |
| 742 | #endif |
| 743 | |
Yinghai Lu | 1bc5654 | 2005-01-06 02:23:31 +0000 | [diff] [blame] | 744 | /* clean others */ |
Myles Watson | d61ada6 | 2008-10-02 19:20:22 +0000 | [diff] [blame] | 745 | for(ht_c_num=1;ht_c_num<4; ht_c_num++) { |
| 746 | pci_write_config32(PCI_DEV(0, 0x18, 1), 0xe0 + ht_c_num * 4, 0); |
Yinghai Lu | d4b278c | 2006-10-04 20:46:15 +0000 | [diff] [blame] | 747 | |
Patrick Georgi | 7bbd7f2 | 2010-11-07 18:20:51 +0000 | [diff] [blame] | 748 | #if CONFIG_K8_ALLOCATE_IO_RANGE |
Jason Schildt | 043b409 | 2005-08-10 15:16:44 +0000 | [diff] [blame] | 749 | /* io range allocation */ |
| 750 | pci_write_config32(PCI_DEV(0, 0x18, 1), 0xc4 + ht_c_num * 8, 0); |
| 751 | pci_write_config32(PCI_DEV(0, 0x18, 1), 0xc0 + ht_c_num * 8, 0); |
Yinghai Lu | d4b278c | 2006-10-04 20:46:15 +0000 | [diff] [blame] | 752 | #endif |
Myles Watson | d61ada6 | 2008-10-02 19:20:22 +0000 | [diff] [blame] | 753 | } |
| 754 | |
| 755 | for(nodeid=0; nodeid<nodes; nodeid++) { |
| 756 | device_t dev; |
| 757 | uint8_t linkn; |
| 758 | dev = PCI_DEV(0, 0x18+nodeid,0); |
| 759 | for(linkn = 0; linkn<3; linkn++) { |
| 760 | unsigned regpos; |
| 761 | regpos = 0x98 + 0x20 * linkn; |
| 762 | reg = pci_read_config32(dev, regpos); |
| 763 | if ((reg & 0x17) != 7) continue; /* it is not non conherent or not connected*/ |
Yinghai Lu | d4b278c | 2006-10-04 20:46:15 +0000 | [diff] [blame] | 764 | print_linkn_in("NC node|link=", ((nodeid & 0xf)<<4)|(linkn & 0xf)); |
Myles Watson | d61ada6 | 2008-10-02 19:20:22 +0000 | [diff] [blame] | 765 | tempreg = 3 | (nodeid <<4) | (linkn<<8); |
| 766 | /*compare (temp & 0xffff), with (PCI(0, 0x18, 1) 0xe0 to 0xec & 0xfffff) */ |
| 767 | for(ht_c_num=0;ht_c_num<4; ht_c_num++) { |
| 768 | reg = pci_read_config32(PCI_DEV(0, 0x18, 1), 0xe0 + ht_c_num * 4); |
| 769 | if(((reg & 0xffff) == (tempreg & 0xffff)) || ((reg & 0xffff) == 0x0000)) { /*we got it*/ |
| 770 | break; |
| 771 | } |
| 772 | } |
| 773 | if(ht_c_num == 4) break; /*used up only 4 non conherent allowed*/ |
| 774 | /*update to 0xe0...*/ |
Yinghai Lu | d4b278c | 2006-10-04 20:46:15 +0000 | [diff] [blame] | 775 | if((reg & 0xf) == 3) continue; /*SbLink so don't touch it */ |
Yinghai Lu | 1bc5654 | 2005-01-06 02:23:31 +0000 | [diff] [blame] | 776 | print_linkn_in("\tbusn=", next_busn); |
Myles Watson | d61ada6 | 2008-10-02 19:20:22 +0000 | [diff] [blame] | 777 | tempreg |= (next_busn<<16)|((next_busn+0x3f)<<24); |
| 778 | pci_write_config32(PCI_DEV(0, 0x18, 1), 0xe0 + ht_c_num * 4, tempreg); |
Jason Schildt | 043b409 | 2005-08-10 15:16:44 +0000 | [diff] [blame] | 779 | next_busn+=0x3f+1; |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 780 | |
Patrick Georgi | 7bbd7f2 | 2010-11-07 18:20:51 +0000 | [diff] [blame] | 781 | #if CONFIG_K8_ALLOCATE_IO_RANGE |
Jason Schildt | 043b409 | 2005-08-10 15:16:44 +0000 | [diff] [blame] | 782 | /* io range allocation */ |
Myles Watson | d61ada6 | 2008-10-02 19:20:22 +0000 | [diff] [blame] | 783 | tempreg = nodeid | (linkn<<4) | ((next_io_base+0x3)<<12); //limit |
| 784 | pci_write_config32(PCI_DEV(0, 0x18, 1), 0xC4 + ht_c_num * 8, tempreg); |
| 785 | tempreg = 3 /*| ( 3<<4)*/ | (next_io_base<<12); //base :ISA and VGA ? |
| 786 | pci_write_config32(PCI_DEV(0, 0x18, 1), 0xC0 + ht_c_num * 8, tempreg); |
| 787 | next_io_base += 0x3+0x1; |
Jason Schildt | 043b409 | 2005-08-10 15:16:44 +0000 | [diff] [blame] | 788 | #endif |
Yinghai Lu | d4b278c | 2006-10-04 20:46:15 +0000 | [diff] [blame] | 789 | |
Myles Watson | d61ada6 | 2008-10-02 19:20:22 +0000 | [diff] [blame] | 790 | } |
| 791 | } |
| 792 | /*update 0xe0, 0xe4, 0xe8, 0xec from PCI_DEV(0, 0x18,1) to PCI_DEV(0, 0x19,1) to PCI_DEV(0, 0x1f,1);*/ |
Jason Schildt | 043b409 | 2005-08-10 15:16:44 +0000 | [diff] [blame] | 793 | |
Myles Watson | d61ada6 | 2008-10-02 19:20:22 +0000 | [diff] [blame] | 794 | for(nodeid = 1; nodeid<nodes; nodeid++) { |
| 795 | int i; |
| 796 | device_t dev; |
| 797 | dev = PCI_DEV(0, 0x18+nodeid,1); |
| 798 | for(i = 0; i< 4; i++) { |
| 799 | unsigned regpos; |
| 800 | regpos = 0xe0 + i * 4; |
| 801 | reg = pci_read_config32(PCI_DEV(0, 0x18, 1), regpos); |
| 802 | pci_write_config32(dev, regpos, reg); |
| 803 | } |
Jason Schildt | 043b409 | 2005-08-10 15:16:44 +0000 | [diff] [blame] | 804 | |
Patrick Georgi | 7bbd7f2 | 2010-11-07 18:20:51 +0000 | [diff] [blame] | 805 | #if CONFIG_K8_ALLOCATE_IO_RANGE |
Jason Schildt | 043b409 | 2005-08-10 15:16:44 +0000 | [diff] [blame] | 806 | /* io range allocation */ |
Myles Watson | d61ada6 | 2008-10-02 19:20:22 +0000 | [diff] [blame] | 807 | for(i = 0; i< 4; i++) { |
| 808 | unsigned regpos; |
| 809 | regpos = 0xc4 + i * 8; |
| 810 | reg = pci_read_config32(PCI_DEV(0, 0x18, 1), regpos); |
| 811 | pci_write_config32(dev, regpos, reg); |
| 812 | } |
| 813 | for(i = 0; i< 4; i++) { |
| 814 | unsigned regpos; |
| 815 | regpos = 0xc0 + i * 8; |
| 816 | reg = pci_read_config32(PCI_DEV(0, 0x18, 1), regpos); |
| 817 | pci_write_config32(dev, regpos, reg); |
| 818 | } |
Jason Schildt | 043b409 | 2005-08-10 15:16:44 +0000 | [diff] [blame] | 819 | #endif |
Myles Watson | d61ada6 | 2008-10-02 19:20:22 +0000 | [diff] [blame] | 820 | } |
| 821 | |
Yinghai Lu | 1bc5654 | 2005-01-06 02:23:31 +0000 | [diff] [blame] | 822 | /* recount ht_c_num*/ |
Jason Schildt | 043b409 | 2005-08-10 15:16:44 +0000 | [diff] [blame] | 823 | uint8_t i=0; |
Myles Watson | d61ada6 | 2008-10-02 19:20:22 +0000 | [diff] [blame] | 824 | for(ht_c_num=0;ht_c_num<4; ht_c_num++) { |
Yinghai Lu | 2c956bb | 2004-12-17 21:08:16 +0000 | [diff] [blame] | 825 | reg = pci_read_config32(PCI_DEV(0, 0x18, 1), 0xe0 + ht_c_num * 4); |
Myles Watson | d61ada6 | 2008-10-02 19:20:22 +0000 | [diff] [blame] | 826 | if(((reg & 0xf) != 0x0)) { |
Yinghai Lu | 2c956bb | 2004-12-17 21:08:16 +0000 | [diff] [blame] | 827 | i++; |
| 828 | } |
Myles Watson | d61ada6 | 2008-10-02 19:20:22 +0000 | [diff] [blame] | 829 | } |
Yinghai Lu | 2c956bb | 2004-12-17 21:08:16 +0000 | [diff] [blame] | 830 | |
Jonathan Kollasch | e5b7507 | 2010-10-07 23:02:06 +0000 | [diff] [blame] | 831 | #if CONFIG_RAMINIT_SYSINFO |
Stefan Reinauer | 7ce8c54 | 2005-12-02 21:52:30 +0000 | [diff] [blame] | 832 | sysinfo->ht_c_num = i; |
Myles Watson | d61ada6 | 2008-10-02 19:20:22 +0000 | [diff] [blame] | 833 | ht_setup_chains(i, sysinfo); |
Yinghai Lu | d4b278c | 2006-10-04 20:46:15 +0000 | [diff] [blame] | 834 | sysinfo->sbdn = get_sbdn(sysinfo->sbbusn); |
Stefan Reinauer | 7ce8c54 | 2005-12-02 21:52:30 +0000 | [diff] [blame] | 835 | #else |
| 836 | return ht_setup_chains(i); |
| 837 | #endif |
Yinghai Lu | 2c956bb | 2004-12-17 21:08:16 +0000 | [diff] [blame] | 838 | |
| 839 | } |
Stefan Reinauer | 7ce8c54 | 2005-12-02 21:52:30 +0000 | [diff] [blame] | 840 | |
Jonathan Kollasch | e5b7507 | 2010-10-07 23:02:06 +0000 | [diff] [blame] | 841 | #if CONFIG_RAMINIT_SYSINFO |
Stefan Reinauer | 7ce8c54 | 2005-12-02 21:52:30 +0000 | [diff] [blame] | 842 | static int optimize_link_incoherent_ht(struct sys_info *sysinfo) |
| 843 | { |
Yinghai Lu | d4b278c | 2006-10-04 20:46:15 +0000 | [diff] [blame] | 844 | // We need to use recorded link pair info to optimize the link |
Stefan Reinauer | 7ce8c54 | 2005-12-02 21:52:30 +0000 | [diff] [blame] | 845 | int i; |
| 846 | int reset_needed = 0; |
Myles Watson | d61ada6 | 2008-10-02 19:20:22 +0000 | [diff] [blame] | 847 | |
Stefan Reinauer | 7ce8c54 | 2005-12-02 21:52:30 +0000 | [diff] [blame] | 848 | unsigned link_pair_num = sysinfo->link_pair_num; |
| 849 | |
Stefan Reinauer | 64ed2b7 | 2010-03-31 14:47:43 +0000 | [diff] [blame] | 850 | printk(BIOS_SPEW, "entering optimize_link_incoherent_ht\n"); |
| 851 | printk(BIOS_SPEW, "sysinfo->link_pair_num=0x%x\n", link_pair_num); |
Myles Watson | d61ada6 | 2008-10-02 19:20:22 +0000 | [diff] [blame] | 852 | for(i=0; i< link_pair_num; i++) { |
Stefan Reinauer | 7ce8c54 | 2005-12-02 21:52:30 +0000 | [diff] [blame] | 853 | struct link_pair_st *link_pair= &sysinfo->link_pair[i]; |
Yinghai Lu | d4b278c | 2006-10-04 20:46:15 +0000 | [diff] [blame] | 854 | reset_needed |= ht_optimize_link(link_pair->udev, link_pair->upos, link_pair->uoffs, link_pair->dev, link_pair->pos, link_pair->offs); |
Stefan Reinauer | 64ed2b7 | 2010-03-31 14:47:43 +0000 | [diff] [blame] | 855 | printk(BIOS_SPEW, "after ht_optimize_link for link pair %d, reset_needed=0x%x\n", i, reset_needed); |
Stefan Reinauer | 7ce8c54 | 2005-12-02 21:52:30 +0000 | [diff] [blame] | 856 | } |
| 857 | |
Yinghai Lu | d4b278c | 2006-10-04 20:46:15 +0000 | [diff] [blame] | 858 | reset_needed |= optimize_link_read_pointers_chain(sysinfo->ht_c_num); |
Stefan Reinauer | 64ed2b7 | 2010-03-31 14:47:43 +0000 | [diff] [blame] | 859 | printk(BIOS_SPEW, "after optimize_link_read_pointers_chain, reset_needed=0x%x\n", reset_needed); |
Stefan Reinauer | 7ce8c54 | 2005-12-02 21:52:30 +0000 | [diff] [blame] | 860 | |
| 861 | return reset_needed; |
| 862 | |
| 863 | } |
| 864 | #endif |
| 865 | |
| 866 | |
Stefan Reinauer | 7ce8c54 | 2005-12-02 21:52:30 +0000 | [diff] [blame] | 867 | |