Angel Pons | 80d9238 | 2020-04-05 15:47:00 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
Mariusz Szafranski | a404133 | 2017-08-02 17:28:17 +0200 | [diff] [blame] | 2 | |
Furquan Shaikh | 76cedd2 | 2020-05-02 10:24:23 -0700 | [diff] [blame] | 3 | #include <acpi/acpi.h> |
Kyösti Mälkki | f1b58b7 | 2019-03-01 13:43:02 +0200 | [diff] [blame] | 4 | #include <device/pci_ops.h> |
Mariusz Szafranski | a404133 | 2017-08-02 17:28:17 +0200 | [diff] [blame] | 5 | #include <console/console.h> |
| 6 | #include <device/device.h> |
| 7 | #include <device/pci.h> |
| 8 | #include <device/pci_ids.h> |
| 9 | |
| 10 | #include <soc/iomap.h> |
| 11 | #include <soc/pmc.h> |
| 12 | #include <soc/pci_devs.h> |
| 13 | #include <soc/ramstage.h> |
| 14 | #include <cpu/x86/smm.h> |
| 15 | |
| 16 | /* While we read BAR dynamically in case it changed, let's |
| 17 | * initialize it with a same value |
| 18 | */ |
Angel Pons | 83bdb45 | 2021-01-10 18:02:27 +0100 | [diff] [blame] | 19 | static u16 acpi_base = ACPI_BASE_ADDRESS; |
Mariusz Szafranski | a404133 | 2017-08-02 17:28:17 +0200 | [diff] [blame] | 20 | static u32 pwrm_base = DEFAULT_PWRM_BASE; |
| 21 | |
Elyes HAOUAS | 2ec4183 | 2018-05-27 17:40:58 +0200 | [diff] [blame] | 22 | static void pch_power_options(struct device *dev) { /* TODO */ } |
Mariusz Szafranski | a404133 | 2017-08-02 17:28:17 +0200 | [diff] [blame] | 23 | |
| 24 | static void pch_set_acpi_mode(void) |
| 25 | { |
Kyösti Mälkki | ad882c3 | 2020-06-02 05:05:30 +0300 | [diff] [blame] | 26 | if (!acpi_is_wakeup_s3()) { |
Kyösti Mälkki | b658548 | 2020-06-01 15:11:14 +0300 | [diff] [blame] | 27 | apm_control(APM_CNT_ACPI_DISABLE); |
Mariusz Szafranski | a404133 | 2017-08-02 17:28:17 +0200 | [diff] [blame] | 28 | } |
| 29 | } |
| 30 | |
Elyes HAOUAS | 2ec4183 | 2018-05-27 17:40:58 +0200 | [diff] [blame] | 31 | static void pmc_init(struct device *dev) |
Mariusz Szafranski | a404133 | 2017-08-02 17:28:17 +0200 | [diff] [blame] | 32 | { |
Elyes HAOUAS | 7dbc4a4 | 2021-01-16 17:33:27 +0100 | [diff] [blame] | 33 | printk(BIOS_DEBUG, "pch: %s\n", __func__); |
Mariusz Szafranski | a404133 | 2017-08-02 17:28:17 +0200 | [diff] [blame] | 34 | |
| 35 | /* Get the base address */ |
| 36 | acpi_base = pci_read_config16(dev, PMC_ACPI_BASE) & MASK_PMC_ACPI_BASE; |
| 37 | pwrm_base = pci_read_config32(dev, PMC_PWRM_BASE) & MASK_PMC_PWRM_BASE; |
| 38 | |
| 39 | /* Set the value for PCI command register. */ |
| 40 | pci_write_config16(dev, PCI_COMMAND, PCI_COMMAND_MASTER | |
| 41 | PCI_COMMAND_MEMORY | |
| 42 | PCI_COMMAND_IO); |
| 43 | |
| 44 | /* Setup power options. */ |
| 45 | pch_power_options(dev); |
| 46 | |
| 47 | /* Configure ACPI mode. */ |
| 48 | pch_set_acpi_mode(); |
| 49 | } |
| 50 | |
Elyes HAOUAS | 2ec4183 | 2018-05-27 17:40:58 +0200 | [diff] [blame] | 51 | static void pci_pmc_read_resources(struct device *dev) |
Mariusz Szafranski | a404133 | 2017-08-02 17:28:17 +0200 | [diff] [blame] | 52 | { |
| 53 | struct resource *res; |
| 54 | |
| 55 | /* Get the normal PCI resources of this device. */ |
| 56 | pci_dev_read_resources(dev); |
| 57 | |
| 58 | /* Add MMIO resource |
| 59 | * Use 0xaa as an unused index for PWRM BAR. |
| 60 | */ |
| 61 | u32 reg32 = pci_read_config32(dev, PMC_PWRM_BASE) & MASK_PMC_PWRM_BASE; |
| 62 | if ((reg32 != 0x0) && (reg32 != 0xffffffff)) { |
| 63 | res = new_resource(dev, 0xaa); |
| 64 | res->base = reg32; |
| 65 | res->size = 64 * 1024; /* 64K bytes memory config space */ |
| 66 | res->flags = |
| 67 | IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED; |
| 68 | printk(BIOS_DEBUG, |
| 69 | "Adding PMC PWRM config space BAR 0x%08lx-0x%08lx.\n", |
| 70 | (unsigned long)(res->base), |
| 71 | (unsigned long)(res->base + res->size)); |
| 72 | } |
| 73 | |
| 74 | /* Add MMIO resource |
| 75 | * Use 0xab as an unused index for ACPI BAR. |
| 76 | */ |
| 77 | u16 reg16 = pci_read_config16(dev, PMC_ACPI_BASE) & MASK_PMC_ACPI_BASE; |
| 78 | if ((reg16 != 0x0) && (reg16 != 0xffff)) { |
| 79 | res = new_resource(dev, 0xab); |
| 80 | res->base = reg16; |
| 81 | res->size = 0x100; /* 256 bytes I/O config space */ |
| 82 | res->flags = IORESOURCE_IO | IORESOURCE_SUBTRACTIVE | |
| 83 | IORESOURCE_ASSIGNED | IORESOURCE_FIXED; |
| 84 | } |
| 85 | } |
| 86 | |
| 87 | static struct device_operations pmc_ops = { |
| 88 | .read_resources = pci_pmc_read_resources, |
| 89 | .set_resources = pci_dev_set_resources, |
| 90 | .enable_resources = pci_dev_enable_resources, |
Mariusz Szafranski | a404133 | 2017-08-02 17:28:17 +0200 | [diff] [blame] | 91 | .init = pmc_init, |
| 92 | .ops_pci = &soc_pci_ops, |
| 93 | }; |
| 94 | |
| 95 | static const struct pci_driver pch_pmc __pci_driver = { |
| 96 | .ops = &pmc_ops, |
| 97 | .vendor = PCI_VENDOR_ID_INTEL, |
Felix Singer | dbc90df | 2019-11-22 00:10:20 +0100 | [diff] [blame] | 98 | .device = PCI_DEVICE_ID_INTEL_DENVERTON_PMC, |
Mariusz Szafranski | a404133 | 2017-08-02 17:28:17 +0200 | [diff] [blame] | 99 | }; |