Martin Roth | 97bd2a7 | 2020-02-17 13:17:19 -0700 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
Martin Roth | 97bd2a7 | 2020-02-17 13:17:19 -0700 | [diff] [blame] | 2 | |
| 3 | #include <arch/cpu.h> |
Felix Held | bf21308 | 2020-05-18 20:27:04 +0200 | [diff] [blame] | 4 | #include <console/console.h> |
Felix Held | 828ca06 | 2020-05-20 02:34:59 +0200 | [diff] [blame] | 5 | #include <FspGuids.h> |
| 6 | #include <fsp/util.h> |
| 7 | #include <misc_data.h> |
Martin Roth | 97bd2a7 | 2020-02-17 13:17:19 -0700 | [diff] [blame] | 8 | #include <soc/cpu.h> |
| 9 | #include <soc/soc_util.h> |
Felix Held | bf21308 | 2020-05-18 20:27:04 +0200 | [diff] [blame] | 10 | #include <types.h> |
| 11 | |
Felix Held | af05c86 | 2020-06-26 19:15:43 +0200 | [diff] [blame] | 12 | /* |
| 13 | * The Zen/Zen+ based APUs can be RV (sometimes called RV1), PCO or RV2 silicon. RV2 has less |
| 14 | * PCIe, USB3 and DisplayPort connectivity than RV(1) or PCO. A Picasso SoC is always PCO |
| 15 | * silicon, a Dali SoC can either be RV2 or fused-down PCO silicon that has the same |
| 16 | * connectivity as the RV2 one and Pollock is always RV2 silicon. Picasso and Dali are in a FP5 |
| 17 | * package while Pollock is in the smaller FT5 package. |
| 18 | */ |
| 19 | |
Felix Held | bf21308 | 2020-05-18 20:27:04 +0200 | [diff] [blame] | 20 | #define SOCKET_TYPE_SHIFT 28 |
Angel Pons | 6ca3375 | 2021-03-18 00:58:26 +0100 | [diff] [blame] | 21 | #define SOCKET_TYPE_MASK (0xf << SOCKET_TYPE_SHIFT) |
Felix Held | bf21308 | 2020-05-18 20:27:04 +0200 | [diff] [blame] | 22 | |
Felix Held | 3c93b7e | 2020-05-27 23:25:38 +0200 | [diff] [blame] | 23 | /* some Pollock engineering samples return the wrong socket type */ |
Felix Held | 828ca06 | 2020-05-20 02:34:59 +0200 | [diff] [blame] | 24 | enum socket_type get_socket_type(void) |
Felix Held | bf21308 | 2020-05-18 20:27:04 +0200 | [diff] [blame] | 25 | { |
| 26 | uint32_t ebx = cpuid_ebx(0x80000001); |
Angel Pons | 6ca3375 | 2021-03-18 00:58:26 +0100 | [diff] [blame] | 27 | ebx = (ebx & SOCKET_TYPE_MASK) >> SOCKET_TYPE_SHIFT; |
Felix Held | bf21308 | 2020-05-18 20:27:04 +0200 | [diff] [blame] | 28 | return (enum socket_type)ebx; |
| 29 | } |
| 30 | |
| 31 | void print_socket_type(void) |
| 32 | { |
| 33 | enum socket_type socket = get_socket_type(); |
| 34 | |
| 35 | printk(BIOS_INFO, "Socket type: "); |
| 36 | |
| 37 | switch (socket) { |
| 38 | case SOCKET_FP5: |
| 39 | printk(BIOS_INFO, "FP5\n"); |
| 40 | break; |
| 41 | case SOCKET_AM4: |
| 42 | printk(BIOS_INFO, "AM4\n"); |
| 43 | break; |
| 44 | case SOCKET_FT5: |
| 45 | printk(BIOS_INFO, "FT5\n"); |
| 46 | break; |
| 47 | default: |
| 48 | printk(BIOS_INFO, "unknown\n"); |
| 49 | } |
| 50 | } |
Martin Roth | 97bd2a7 | 2020-02-17 13:17:19 -0700 | [diff] [blame] | 51 | |
Felix Held | 828ca06 | 2020-05-20 02:34:59 +0200 | [diff] [blame] | 52 | /* returns 0 in case or errors */ |
| 53 | static uint32_t get_internal_silicon_type(void) |
Martin Roth | 97bd2a7 | 2020-02-17 13:17:19 -0700 | [diff] [blame] | 54 | { |
Felix Held | 828ca06 | 2020-05-20 02:34:59 +0200 | [diff] [blame] | 55 | static uint32_t silicon_type; |
| 56 | size_t hob_size = 0; |
| 57 | const struct picasso_misc_data *hob; |
| 58 | |
| 59 | if (silicon_type) |
| 60 | return silicon_type; |
| 61 | |
| 62 | hob = fsp_find_extension_hob_by_guid(PICASSO_MISC_DATA_HOB_GUID.b, &hob_size); |
| 63 | |
| 64 | if (hob == NULL || hob_size == 0) { |
| 65 | printk(BIOS_ERR, "Couldn't find Picasso misc data HOB.\n"); |
| 66 | return 0; |
| 67 | } |
| 68 | |
| 69 | if (hob->version != PICASSO_MISC_DATA_VERSION) { |
| 70 | printk(BIOS_ERR, "Unexpected Picasso misc data HOB version.\n"); |
| 71 | return 0; |
| 72 | } |
| 73 | |
| 74 | silicon_type = hob->silicon_id; |
| 75 | |
| 76 | printk(BIOS_DEBUG, "Silicon ID = 0x%x\n", silicon_type); |
| 77 | |
| 78 | return silicon_type; |
Martin Roth | 97bd2a7 | 2020-02-17 13:17:19 -0700 | [diff] [blame] | 79 | } |
| 80 | |
Felix Held | 828ca06 | 2020-05-20 02:34:59 +0200 | [diff] [blame] | 81 | #define SILICON_IS_MYSTERY_MEAT (1 << 31) |
| 82 | #define SILICON_IS_RV2 (1 << 30) |
| 83 | |
| 84 | static bool is_rv2_silicon(void) |
Martin Roth | 97bd2a7 | 2020-02-17 13:17:19 -0700 | [diff] [blame] | 85 | { |
Felix Held | 828ca06 | 2020-05-20 02:34:59 +0200 | [diff] [blame] | 86 | return get_internal_silicon_type() & SILICON_IS_RV2; |
Martin Roth | 97bd2a7 | 2020-02-17 13:17:19 -0700 | [diff] [blame] | 87 | } |
| 88 | |
Felix Held | 828ca06 | 2020-05-20 02:34:59 +0200 | [diff] [blame] | 89 | static bool is_mystery_silicon(void) |
Martin Roth | 97bd2a7 | 2020-02-17 13:17:19 -0700 | [diff] [blame] | 90 | { |
Felix Held | 828ca06 | 2020-05-20 02:34:59 +0200 | [diff] [blame] | 91 | return get_internal_silicon_type() & SILICON_IS_MYSTERY_MEAT; |
Martin Roth | 97bd2a7 | 2020-02-17 13:17:19 -0700 | [diff] [blame] | 92 | } |
| 93 | |
Felix Held | 828ca06 | 2020-05-20 02:34:59 +0200 | [diff] [blame] | 94 | static bool is_fam17_1x(void) |
| 95 | { |
| 96 | /* mask lower model number nibble and stepping */ |
Felix Held | ab114c9 | 2020-05-22 02:40:40 +0200 | [diff] [blame] | 97 | return cpuid_eax(1) >> 8 == PICASSO_B1_CPUID >> 8; |
Felix Held | 828ca06 | 2020-05-20 02:34:59 +0200 | [diff] [blame] | 98 | } |
| 99 | |
| 100 | static bool is_fam17_11(void) |
| 101 | { |
| 102 | /* only mask stepping */ |
Felix Held | ab114c9 | 2020-05-22 02:40:40 +0200 | [diff] [blame] | 103 | return cpuid_eax(1) >> 4 == RAVEN1_B0_CPUID >> 4; |
Felix Held | 828ca06 | 2020-05-20 02:34:59 +0200 | [diff] [blame] | 104 | } |
| 105 | |
| 106 | static bool is_fam17_18(void) |
| 107 | { |
| 108 | /* only mask stepping */ |
Felix Held | ab114c9 | 2020-05-22 02:40:40 +0200 | [diff] [blame] | 109 | return cpuid_eax(1) >> 4 == PICASSO_B1_CPUID >> 4; |
Felix Held | 828ca06 | 2020-05-20 02:34:59 +0200 | [diff] [blame] | 110 | } |
| 111 | |
| 112 | static bool is_fam17_2x(void) |
Martin Roth | 97bd2a7 | 2020-02-17 13:17:19 -0700 | [diff] [blame] | 113 | { |
| 114 | /* mask lower model number nibble and stepping */ |
Felix Held | ab114c9 | 2020-05-22 02:40:40 +0200 | [diff] [blame] | 115 | return cpuid_eax(1) >> 8 == RAVEN2_A1_CPUID >> 8; |
Martin Roth | 97bd2a7 | 2020-02-17 13:17:19 -0700 | [diff] [blame] | 116 | } |
| 117 | |
Felix Held | 828ca06 | 2020-05-20 02:34:59 +0200 | [diff] [blame] | 118 | static bool is_fam17_20(void) |
Martin Roth | 97bd2a7 | 2020-02-17 13:17:19 -0700 | [diff] [blame] | 119 | { |
Felix Held | 828ca06 | 2020-05-20 02:34:59 +0200 | [diff] [blame] | 120 | /* only mask stepping */ |
| 121 | return cpuid_eax(1) >> 4 == RAVEN2_A1_CPUID >> 4; |
| 122 | } |
| 123 | |
| 124 | enum silicon_type get_silicon_type(void) |
| 125 | { |
| 126 | /* |
| 127 | * RV2 is fam17_20, but might return a fam17_1x CPUID in the is_mystery_silicon() case. |
| 128 | * is_rv2_silicon() has the correct information, but requires the HOB to be present. |
| 129 | */ |
| 130 | if (is_fam17_20() || is_rv2_silicon()) |
| 131 | return SILICON_RV2; |
| 132 | |
| 133 | if (is_fam17_18() && !is_rv2_silicon()) |
| 134 | return SILICON_PCO; |
| 135 | |
| 136 | if (is_fam17_11() && !is_rv2_silicon()) |
| 137 | return SILICON_RV1; |
| 138 | |
| 139 | /* some cases might still be missing */ |
| 140 | |
| 141 | return SILICON_UNKNOWN; |
| 142 | } |
| 143 | |
Felix Held | 3c93b7e | 2020-05-27 23:25:38 +0200 | [diff] [blame] | 144 | /* some Pollock engineering samples return the wrong socket type and get detected as Dali */ |
Felix Held | 828ca06 | 2020-05-20 02:34:59 +0200 | [diff] [blame] | 145 | enum soc_type get_soc_type(void) |
| 146 | { |
| 147 | switch (get_socket_type()) { |
| 148 | case SOCKET_FP5: |
| 149 | if (is_fam17_1x() && !is_mystery_silicon()) |
| 150 | return SOC_PICASSO; |
| 151 | |
| 152 | if (is_fam17_2x() || (is_fam17_1x() && is_mystery_silicon())) |
| 153 | return SOC_DALI; |
| 154 | |
| 155 | break; |
| 156 | case SOCKET_FT5: |
| 157 | /* add is_fam17_20() CPUID sanity check here? */ |
| 158 | return SOC_POLLOCK; |
| 159 | break; |
| 160 | case SOCKET_AM4: |
| 161 | /* AM4 SoC type detection logic not implemented */ |
| 162 | break; |
| 163 | } |
| 164 | |
| 165 | return SOC_UNKNOWN; |
| 166 | } |
| 167 | |
| 168 | void print_silicon_type(void) |
| 169 | { |
| 170 | const enum silicon_type silicon = get_silicon_type(); |
| 171 | |
| 172 | printk(BIOS_INFO, "Silicon type: "); |
| 173 | |
| 174 | switch (silicon) { |
| 175 | case SILICON_RV1: |
| 176 | printk(BIOS_INFO, "RV1\n"); |
| 177 | break; |
| 178 | case SILICON_PCO: |
| 179 | printk(BIOS_INFO, "PCO\n"); |
| 180 | break; |
| 181 | case SILICON_RV2: |
| 182 | printk(BIOS_INFO, "RV2\n"); |
| 183 | break; |
| 184 | default: |
| 185 | printk(BIOS_INFO, "unknown\n"); |
| 186 | } |
| 187 | } |
| 188 | |
| 189 | void print_soc_type(void) |
| 190 | { |
| 191 | const enum soc_type soc = get_soc_type(); |
| 192 | |
| 193 | printk(BIOS_INFO, "SoC type: "); |
| 194 | |
| 195 | switch (soc) { |
| 196 | case SOC_PICASSO: |
| 197 | printk(BIOS_INFO, "Picasso\n"); |
| 198 | break; |
| 199 | case SOC_DALI: |
| 200 | printk(BIOS_INFO, "Dali\n"); |
| 201 | break; |
| 202 | case SOC_POLLOCK: |
| 203 | printk(BIOS_INFO, "Pollock\n"); |
| 204 | break; |
| 205 | default: |
| 206 | printk(BIOS_INFO, "unknown\n"); |
| 207 | } |
| 208 | } |
| 209 | |
Felix Held | 42b0e8f | 2020-06-26 18:03:53 +0200 | [diff] [blame] | 210 | bool soc_is_reduced_io_sku(void) |
Felix Held | 828ca06 | 2020-05-20 02:34:59 +0200 | [diff] [blame] | 211 | { |
Felix Held | 42b0e8f | 2020-06-26 18:03:53 +0200 | [diff] [blame] | 212 | return get_silicon_type() == SILICON_RV2 || get_soc_type() == SOC_DALI; |
Felix Held | 828ca06 | 2020-05-20 02:34:59 +0200 | [diff] [blame] | 213 | } |
| 214 | |
Felix Held | 828ca06 | 2020-05-20 02:34:59 +0200 | [diff] [blame] | 215 | bool soc_is_raven2(void) |
| 216 | { |
| 217 | return get_silicon_type() == SILICON_RV2; |
Martin Roth | 97bd2a7 | 2020-02-17 13:17:19 -0700 | [diff] [blame] | 218 | } |