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review.coreboot.org / coreboot / 40cb3fe94dacfba0b146aae2be9c03c0a0ddb691 / . / util / msrtool / cs5536.c
blob: 5a5b0cc2a98b49c866cc4914af64444cb9ff15ea [file] [log] [blame]
Patrick Georgiac959032020-05-05 22:49:26 +0200[diff] [blame]1/* SPDX-License-Identifier: GPL-2.0-only */
Peter Stugedad1e302008-11-22 17:13:36 +0000[diff] [blame]2
3#include "msrtool.h"
4
Anton Kochkov59b36f12012-07-21 07:29:48 +0400[diff] [blame]5int cs5536_probe(const struct targetdef *target, const struct cpuid_t *id) {
Peter Stugefbda0d32009-01-26 04:12:58 +0000[diff] [blame]6 return (NULL != pci_dev_find(0x1022, 0x2090));
Peter Stugedad1e302008-11-22 17:13:36 +0000[diff] [blame]7}
8
Peter Stuge9f26b8f2009-07-10 03:10:26 +0000[diff] [blame]9/**
10 * Documentation referenced:
11 *
12 * 33238G: AMD Geode(tm) CS5536 Companion Device Data Book
13 * http://www.amd.com/files/connectivitysolutions/geode/geode_lx/33238G_cs5536_db.pdf
14 *
15 */
16
Peter Stugedad1e302008-11-22 17:13:36 +0000[diff] [blame]17const struct msrdef cs5536_msrs[] = {
Peter Stuge9f26b8f2009-07-10 03:10:26 +0000[diff] [blame]18 /* 0x51400008-0x5140000f per 33238G pages 356-361 */
19 /* 0x51400015 per 33238G pages 365-366 */
20 /* 0x51400020-0x51400027 per 33238G pages 379-385 */
21 { 0x51400008, MSRTYPE_RDWR, MSR2(0, 0), "DIVIL_LBAR_IRQ", "Local BAR - IRQ Mapper", {
22 { 63, 15, RESERVED },
23 { 48, 1, RESERVED },
24 { 47, 4, "IO_MASK", "I/O Address Mask Value", PRESENT_BIN, {
25 { BITVAL_EOT }
26 }},
27 { 43, 11, RESERVED },
28 { 32, 1, "LBAR_EN", "LBAR Enable", PRESENT_BIN, {
29 { MSR1(0), "Disable LBAR" },
30 { MSR1(1), "Enable LBAR" },
31 { BITVAL_EOT }
32 }},
33 { 31, 15, RESERVED },
34 { 16, 1, RESERVED },
35 { 15, 11, "BASE_ADDR", "Base Address in I/O Space", PRESENT_HEX, {
36 { BITVAL_EOT }
37 }},
38 { 4, 5, RESERVED },
39 { BITS_EOT }
40 }},
41 { 0x51400009, MSRTYPE_RDWR, MSR2(0, 0), "DIVIL_LBAR_KEL", "Local BAR - Keyboard Emulation Logic from USB", {
42 { 63, 20, "MEM_MASK", "Memory Address Mask Value", PRESENT_HEX, {
43 { BITVAL_EOT }
44 }},
45 { 43, 11, RESERVED },
46 { 32, 1, "LBAR_EN", "LBAR Enable", PRESENT_BIN, {
47 { MSR1(0), "Disable LBAR" },
48 { MSR1(1), "Enable LBAR" },
49 { BITVAL_EOT }
50 }},
51 { 31, 20, "BASE_ADDR", "Base Address in Memory Space", PRESENT_HEX, {
52 { BITVAL_EOT }
53 }},
54 { 11, 12, RESERVED },
55 { BITS_EOT }
56 }},
57 /* 0x5140000a is not mentioned in the databook */
58 { 0x5140000b, MSRTYPE_RDWR, MSR2(0, 0), "DIVIL_LBAR_SMB", "Local BAR - System Management Bus", {
59 { 63, 15, RESERVED },
60 { 48, 1, RESERVED },
61 { 47, 4, "IO_MASK", "I/O Address Mask Value", PRESENT_BIN, {
62 { BITVAL_EOT }
63 }},
64 { 43, 11, RESERVED },
65 { 32, 1, "LBAR_EN", "LBAR Enable", PRESENT_BIN, {
66 { MSR1(0), "Disable LBAR" },
67 { MSR1(1), "Enable LBAR" },
68 { BITVAL_EOT }
69 }},
70 { 31, 15, RESERVED },
71 { 16, 1, RESERVED },
72 { 15, 8, "BASE_ADDR", "Base Address in I/O Space", PRESENT_HEX, {
73 { BITVAL_EOT }
74 }},
75 { 7, 8, RESERVED },
76 { BITS_EOT }
77 }},
78 { 0x5140000c, MSRTYPE_RDWR, MSR2(0, 0), "DIVIL_LBAR_GPIO", "Local BAR - GPIO and Input Conditioning Functions", {
79 { 63, 15, RESERVED },
80 { 48, 1, RESERVED },
81 { 47, 4, "IO_MASK", "I/O Address Mask Value", PRESENT_BIN, {
82 { BITVAL_EOT }
83 }},
84 { 43, 11, RESERVED },
85 { 32, 1, "LBAR_EN", "LBAR Enable", PRESENT_BIN, {
86 { MSR1(0), "Disable LBAR" },
87 { MSR1(1), "Enable LBAR" },
88 { BITVAL_EOT }
89 }},
90 { 31, 15, RESERVED },
91 { 16, 1, RESERVED },
92 { 15, 8, "BASE_ADDR", "Base Address in I/O Space", PRESENT_HEX, {
93 { BITVAL_EOT }
94 }},
95 { 7, 8, RESERVED },
96 { BITS_EOT }
97 }},
98 { 0x5140000d, MSRTYPE_RDWR, MSR2(0, 0), "DIVIL_LBAR_MFGPT", "Local BAR - MFGPTs", {
99 { 63, 15, RESERVED },
100 { 48, 1, RESERVED },
101 { 47, 4, "IO_MASK", "I/O Address Mask Value", PRESENT_BIN, {
102 { BITVAL_EOT }
103 }},
104 { 43, 11, RESERVED },
105 { 32, 1, "LBAR_EN", "LBAR Enable", PRESENT_BIN, {
106 { MSR1(0), "Disable LBAR" },
107 { MSR1(1), "Enable LBAR" },
108 { BITVAL_EOT }
109 }},
110 { 31, 15, RESERVED },
111 { 16, 1, RESERVED },
112 { 15, 8, "BASE_ADDR", "Base Address in I/O Space", PRESENT_HEX, {
113 { BITVAL_EOT }
114 }},
115 { 7, 8, RESERVED },
116 { BITS_EOT }
117 }},
118 { 0x5140000e, MSRTYPE_RDWR, MSR2(0, 0), "DIVIL_LBAR_ACPI", "Local BAR - ACPI", {
119 { 63, 15, RESERVED },
120 { 48, 1, RESERVED },
121 { 47, 4, "IO_MASK", "I/O Address Mask Value", PRESENT_BIN, {
122 { BITVAL_EOT }
123 }},
124 { 43, 11, RESERVED },
125 { 32, 1, "LBAR_EN", "LBAR Enable", PRESENT_BIN, {
126 { MSR1(0), "Disable LBAR" },
127 { MSR1(1), "Enable LBAR" },
128 { BITVAL_EOT }
129 }},
130 { 31, 15, RESERVED },
131 { 16, 1, RESERVED },
132 { 15, 8, "BASE_ADDR", "Base Address in I/O Space", PRESENT_HEX, {
133 { BITVAL_EOT }
134 }},
135 { 7, 8, RESERVED },
136 { BITS_EOT }
137 }},
138 { 0x5140000f, MSRTYPE_RDWR, MSR2(0, 0), "DIVIL_LBAR_PMS", "Local BAR - Power Management Support", {
139 { 63, 15, RESERVED },
140 { 48, 1, RESERVED },
141 { 47, 4, "IO_MASK", "I/O Address Mask Value", PRESENT_BIN, {
142 { BITVAL_EOT }
143 }},
144 { 43, 11, RESERVED },
145 { 32, 1, "LBAR_EN", "LBAR Enable", PRESENT_BIN, {
146 { MSR1(0), "Disable LBAR" },
147 { MSR1(1), "Enable LBAR" },
148 { BITVAL_EOT }
149 }},
150 { 31, 15, RESERVED },
151 { 16, 1, RESERVED },
152 { 15, 9, "BASE_ADDR", "Base Address in I/O Space", PRESENT_HEX, {
153 { BITVAL_EOT }
154 }},
155 { 6, 7, RESERVED },
156 { BITS_EOT }
157 }},
158 { 0x51400015, MSRTYPE_RDWR, MSR2(0, 0x70), "DIVIL_BALL_OPTS", "Ball Options Control", {
159 { 63, 32, RESERVED },
160 { 31, 20, RESERVED },
161 { 11, 2, "SEC_BOOT_LOC", "Secondary Boot Location", PRESENT_BIN, {
162 { MSR1(0), "LPC ROM" },
163 { MSR1(2), "NOR Flash on IDE" },
164 { MSR1(3), "Firmware Hub" },
165 { BITVAL_EOT }
166 }},
167 { 9, 2, "BOOT_OP_LATCHED", "Latched Value of Boot Option", PRESENT_BIN, {
168 { MSR1(0), "LPC ROM" },
169 { MSR1(2), "NOR Flash on IDE" },
170 { MSR1(3), "Firmware Hub" },
171 { BITVAL_EOT }
172 }},
173 { 7, 1, RESERVED },
174 { 6, 1, "PIN_OPT_LALL", "All LPC Pin Option Selection", PRESENT_BIN, {
175 { MSR1(0), "All LPC pins become GPIOs including LPC_DRQ# and LPC_SERIRQ" },
176 { MSR1(1), "All LPC pins are controlled by the LPC controller except LPC_DRQ# and LPC_SERIRQ (bits [5:4])" },
177 { BITVAL_EOT }
178 }},
179 { 5, 1, "PIN_OPT_LIRQ", "LPC_SERIRQ or GPIO21 Pin Option Selection", PRESENT_BIN, {
180 { MSR1(0), "Ball G2 is GPIO21" },
181 { MSR1(1), "Ball G2 functions as LPC_SERIRQ" },
182 { BITVAL_EOT }
183 }},
184 { 4, 1, "PIN_OPT_LDRQ", "LPC_DRQ# or GPIO20 Pin Option Selection", PRESENT_BIN, {
185 { MSR1(0), "Ball G1 is GPIO20" },
186 { MSR1(1), "Ball G1 functions as LPC_DRQ#" },
187 { BITVAL_EOT }
188 }},
189 { 3, 2, "PRI_BOOT_LOC", "Primary Boot Location", PRESENT_BIN, {
190 { MSR1(0), "LPC ROM" },
191 { MSR1(2), "NOR Flash on IDE" },
192 { MSR1(3), "Firmware Hub" },
193 { BITVAL_EOT }
194 }},
195 { 1, 1, RESERVED },
196 { 0, 1, "PIN_OPT_IDE", "IDE or Flash Controller Pin Function Selection", PRESENT_BIN, {
197 { MSR1(0), "All IDE pins associated with Flash Controller" },
198 { MSR1(1), "All IDE pins associated with IDE Controller" },
199 { BITVAL_EOT }
200 }},
201 }},
202 { 0x51400020, MSRTYPE_RDWR, MSR2(0, 0), "PIC_YSEL_LOW", "IRQ Mapper Unrestricted Y Select Low", {
203 { 63, 32, RESERVED },
204 { 31, 4, "MAP_Y7", "Map Unrestricted Y Input 7", PRESENT_BIN, {
205 { MSR1(0), "Disable" },
206 { MSR1(1), "Interrupt Group 1" },
207 { MSR1(2), "Interrupt Group 2" },
208 { MSR1(3), "Interrupt Group 3" },
209 { MSR1(4), "Interrupt Group 4" },
210 { MSR1(5), "Interrupt Group 5" },
211 { MSR1(6), "Interrupt Group 6" },
212 { MSR1(7), "Interrupt Group 7" },
213 { MSR1(8), "Interrupt Group 8" },
214 { MSR1(9), "Interrupt Group 9" },
215 { MSR1(10), "Interrupt Group 10" },
216 { MSR1(11), "Interrupt Group 11" },
217 { MSR1(12), "Interrupt Group 12" },
218 { MSR1(13), "Interrupt Group 13" },
219 { MSR1(14), "Interrupt Group 14" },
220 { MSR1(15), "Interrupt Group 15" },
221 { BITVAL_EOT }
222 }},
223 { 27, 4, "MAP_Y6", "Map Unrestricted Y Input 6", PRESENT_BIN, {
224 { MSR1(0), "Disable" },
225 { MSR1(1), "Interrupt Group 1" },
226 { MSR1(2), "Interrupt Group 2" },
227 { MSR1(3), "Interrupt Group 3" },
228 { MSR1(4), "Interrupt Group 4" },
229 { MSR1(5), "Interrupt Group 5" },
230 { MSR1(6), "Interrupt Group 6" },
231 { MSR1(7), "Interrupt Group 7" },
232 { MSR1(8), "Interrupt Group 8" },
233 { MSR1(9), "Interrupt Group 9" },
234 { MSR1(10), "Interrupt Group 10" },
235 { MSR1(11), "Interrupt Group 11" },
236 { MSR1(12), "Interrupt Group 12" },
237 { MSR1(13), "Interrupt Group 13" },
238 { MSR1(14), "Interrupt Group 14" },
239 { MSR1(15), "Interrupt Group 15" },
240 { BITVAL_EOT }
241 }},
242 { 23, 4, "MAP_Y5", "Map Unrestricted Y Input 5", PRESENT_BIN, {
243 { MSR1(0), "Disable" },
244 { MSR1(1), "Interrupt Group 1" },
245 { MSR1(2), "Interrupt Group 2" },
246 { MSR1(3), "Interrupt Group 3" },
247 { MSR1(4), "Interrupt Group 4" },
248 { MSR1(5), "Interrupt Group 5" },
249 { MSR1(6), "Interrupt Group 6" },
250 { MSR1(7), "Interrupt Group 7" },
251 { MSR1(8), "Interrupt Group 8" },
252 { MSR1(9), "Interrupt Group 9" },
253 { MSR1(10), "Interrupt Group 10" },
254 { MSR1(11), "Interrupt Group 11" },
255 { MSR1(12), "Interrupt Group 12" },
256 { MSR1(13), "Interrupt Group 13" },
257 { MSR1(14), "Interrupt Group 14" },
258 { MSR1(15), "Interrupt Group 15" },
259 { BITVAL_EOT }
260 }},
261 { 19, 4, "MAP_Y4", "Map Unrestricted Y Input 4", PRESENT_BIN, {
262 { MSR1(0), "Disable" },
263 { MSR1(1), "Interrupt Group 1" },
264 { MSR1(2), "Interrupt Group 2" },
265 { MSR1(3), "Interrupt Group 3" },
266 { MSR1(4), "Interrupt Group 4" },
267 { MSR1(5), "Interrupt Group 5" },
268 { MSR1(6), "Interrupt Group 6" },
269 { MSR1(7), "Interrupt Group 7" },
270 { MSR1(8), "Interrupt Group 8" },
271 { MSR1(9), "Interrupt Group 9" },
272 { MSR1(10), "Interrupt Group 10" },
273 { MSR1(11), "Interrupt Group 11" },
274 { MSR1(12), "Interrupt Group 12" },
275 { MSR1(13), "Interrupt Group 13" },
276 { MSR1(14), "Interrupt Group 14" },
277 { MSR1(15), "Interrupt Group 15" },
278 { BITVAL_EOT }
279 }},
280 { 15, 4, "MAP_Y3", "Map Unrestricted Y Input 3", PRESENT_BIN, {
281 { MSR1(0), "Disable" },
282 { MSR1(1), "Interrupt Group 1" },
283 { MSR1(2), "Interrupt Group 2" },
284 { MSR1(3), "Interrupt Group 3" },
285 { MSR1(4), "Interrupt Group 4" },
286 { MSR1(5), "Interrupt Group 5" },
287 { MSR1(6), "Interrupt Group 6" },
288 { MSR1(7), "Interrupt Group 7" },
289 { MSR1(8), "Interrupt Group 8" },
290 { MSR1(9), "Interrupt Group 9" },
291 { MSR1(10), "Interrupt Group 10" },
292 { MSR1(11), "Interrupt Group 11" },
293 { MSR1(12), "Interrupt Group 12" },
294 { MSR1(13), "Interrupt Group 13" },
295 { MSR1(14), "Interrupt Group 14" },
296 { MSR1(15), "Interrupt Group 15" },
297 { BITVAL_EOT }
298 }},
299 { 11, 4, "MAP_Y2", "Map Unrestricted Y Input 2", PRESENT_BIN, {
300 { MSR1(0), "Disable" },
301 { MSR1(1), "Interrupt Group 1" },
302 { MSR1(2), "Interrupt Group 2" },
303 { MSR1(3), "Interrupt Group 3" },
304 { MSR1(4), "Interrupt Group 4" },
305 { MSR1(5), "Interrupt Group 5" },
306 { MSR1(6), "Interrupt Group 6" },
307 { MSR1(7), "Interrupt Group 7" },
308 { MSR1(8), "Interrupt Group 8" },
309 { MSR1(9), "Interrupt Group 9" },
310 { MSR1(10), "Interrupt Group 10" },
311 { MSR1(11), "Interrupt Group 11" },
312 { MSR1(12), "Interrupt Group 12" },
313 { MSR1(13), "Interrupt Group 13" },
314 { MSR1(14), "Interrupt Group 14" },
315 { MSR1(15), "Interrupt Group 15" },
316 { BITVAL_EOT }
317 }},
318 { 7, 4, "MAP_Y1", "Map Unrestricted Y Input 1", PRESENT_BIN, {
319 { MSR1(0), "Disable" },
320 { MSR1(1), "Interrupt Group 1" },
321 { MSR1(2), "Interrupt Group 2" },
322 { MSR1(3), "Interrupt Group 3" },
323 { MSR1(4), "Interrupt Group 4" },
324 { MSR1(5), "Interrupt Group 5" },
325 { MSR1(6), "Interrupt Group 6" },
326 { MSR1(7), "Interrupt Group 7" },
327 { MSR1(8), "Interrupt Group 8" },
328 { MSR1(9), "Interrupt Group 9" },
329 { MSR1(10), "Interrupt Group 10" },
330 { MSR1(11), "Interrupt Group 11" },
331 { MSR1(12), "Interrupt Group 12" },
332 { MSR1(13), "Interrupt Group 13" },
333 { MSR1(14), "Interrupt Group 14" },
334 { MSR1(15), "Interrupt Group 15" },
335 { BITVAL_EOT }
336 }},
337 { 3, 4, "MAP_Y0", "Map Unrestricted Y Input 0", PRESENT_BIN, {
338 { MSR1(0), "Disable" },
339 { MSR1(1), "Interrupt Group 1" },
340 { MSR1(2), "Interrupt Group 2" },
341 { MSR1(3), "Interrupt Group 3" },
342 { MSR1(4), "Interrupt Group 4" },
343 { MSR1(5), "Interrupt Group 5" },
344 { MSR1(6), "Interrupt Group 6" },
345 { MSR1(7), "Interrupt Group 7" },
346 { MSR1(8), "Interrupt Group 8" },
347 { MSR1(9), "Interrupt Group 9" },
348 { MSR1(10), "Interrupt Group 10" },
349 { MSR1(11), "Interrupt Group 11" },
350 { MSR1(12), "Interrupt Group 12" },
351 { MSR1(13), "Interrupt Group 13" },
352 { MSR1(14), "Interrupt Group 14" },
353 { MSR1(15), "Interrupt Group 15" },
354 { BITVAL_EOT }
355 }},
356 { BITS_EOT }
357 }},
358 { 0x51400021, MSRTYPE_RDWR, MSR2(0, 0), "PIC_YSEL_HIGH", "IRQ Mapper Unrestricted Y Select High", {
359 { 63, 32, RESERVED },
360 { 31, 4, "MAP_Y15", "Map Unrestricted Y Input 15", PRESENT_BIN, {
361 { MSR1(0), "Disable" },
362 { MSR1(1), "Interrupt Group 1" },
363 { MSR1(2), "Interrupt Group 2" },
364 { MSR1(3), "Interrupt Group 3" },
365 { MSR1(4), "Interrupt Group 4" },
366 { MSR1(5), "Interrupt Group 5" },
367 { MSR1(6), "Interrupt Group 6" },
368 { MSR1(7), "Interrupt Group 7" },
369 { MSR1(8), "Interrupt Group 8" },
370 { MSR1(9), "Interrupt Group 9" },
371 { MSR1(10), "Interrupt Group 10" },
372 { MSR1(11), "Interrupt Group 11" },
373 { MSR1(12), "Interrupt Group 12" },
374 { MSR1(13), "Interrupt Group 13" },
375 { MSR1(14), "Interrupt Group 14" },
376 { MSR1(15), "Interrupt Group 15" },
377 { BITVAL_EOT }
378 }},
379 { 27, 4, "MAP_Y14", "Map Unrestricted Y Input 14", PRESENT_BIN, {
380 { MSR1(0), "Disable" },
381 { MSR1(1), "Interrupt Group 1" },
382 { MSR1(2), "Interrupt Group 2" },
383 { MSR1(3), "Interrupt Group 3" },
384 { MSR1(4), "Interrupt Group 4" },
385 { MSR1(5), "Interrupt Group 5" },
386 { MSR1(6), "Interrupt Group 6" },
387 { MSR1(7), "Interrupt Group 7" },
388 { MSR1(8), "Interrupt Group 8" },
389 { MSR1(9), "Interrupt Group 9" },
390 { MSR1(10), "Interrupt Group 10" },
391 { MSR1(11), "Interrupt Group 11" },
392 { MSR1(12), "Interrupt Group 12" },
393 { MSR1(13), "Interrupt Group 13" },
394 { MSR1(14), "Interrupt Group 14" },
395 { MSR1(15), "Interrupt Group 15" },
396 { BITVAL_EOT }
397 }},
398 { 23, 4, "MAP_Y13", "Map Unrestricted Y Input 13", PRESENT_BIN, {
399 { MSR1(0), "Disable" },
400 { MSR1(1), "Interrupt Group 1" },
401 { MSR1(2), "Interrupt Group 2" },
402 { MSR1(3), "Interrupt Group 3" },
403 { MSR1(4), "Interrupt Group 4" },
404 { MSR1(5), "Interrupt Group 5" },
405 { MSR1(6), "Interrupt Group 6" },
406 { MSR1(7), "Interrupt Group 7" },
407 { MSR1(8), "Interrupt Group 8" },
408 { MSR1(9), "Interrupt Group 9" },
409 { MSR1(10), "Interrupt Group 10" },
410 { MSR1(11), "Interrupt Group 11" },
411 { MSR1(12), "Interrupt Group 12" },
412 { MSR1(13), "Interrupt Group 13" },
413 { MSR1(14), "Interrupt Group 14" },
414 { MSR1(15), "Interrupt Group 15" },
415 { BITVAL_EOT }
416 }},
417 { 19, 4, "MAP_Y12", "Map Unrestricted Y Input 12", PRESENT_BIN, {
418 { MSR1(0), "Disable" },
419 { MSR1(1), "Interrupt Group 1" },
420 { MSR1(2), "Interrupt Group 2" },
421 { MSR1(3), "Interrupt Group 3" },
422 { MSR1(4), "Interrupt Group 4" },
423 { MSR1(5), "Interrupt Group 5" },
424 { MSR1(6), "Interrupt Group 6" },
425 { MSR1(7), "Interrupt Group 7" },
426 { MSR1(8), "Interrupt Group 8" },
427 { MSR1(9), "Interrupt Group 9" },
428 { MSR1(10), "Interrupt Group 10" },
429 { MSR1(11), "Interrupt Group 11" },
430 { MSR1(12), "Interrupt Group 12" },
431 { MSR1(13), "Interrupt Group 13" },
432 { MSR1(14), "Interrupt Group 14" },
433 { MSR1(15), "Interrupt Group 15" },
434 { BITVAL_EOT }
435 }},
436 { 15, 4, "MAP_Y11", "Map Unrestricted Y Input 11", PRESENT_BIN, {
437 { MSR1(0), "Disable" },
438 { MSR1(1), "Interrupt Group 1" },
439 { MSR1(2), "Interrupt Group 2" },
440 { MSR1(3), "Interrupt Group 3" },
441 { MSR1(4), "Interrupt Group 4" },
442 { MSR1(5), "Interrupt Group 5" },
443 { MSR1(6), "Interrupt Group 6" },
444 { MSR1(7), "Interrupt Group 7" },
445 { MSR1(8), "Interrupt Group 8" },
446 { MSR1(9), "Interrupt Group 9" },
447 { MSR1(10), "Interrupt Group 10" },
448 { MSR1(11), "Interrupt Group 11" },
449 { MSR1(12), "Interrupt Group 12" },
450 { MSR1(13), "Interrupt Group 13" },
451 { MSR1(14), "Interrupt Group 14" },
452 { MSR1(15), "Interrupt Group 15" },
453 { BITVAL_EOT }
454 }},
455 { 11, 4, "MAP_Y10", "Map Unrestricted Y Input 10", PRESENT_BIN, {
456 { MSR1(0), "Disable" },
457 { MSR1(1), "Interrupt Group 1" },
458 { MSR1(2), "Interrupt Group 2" },
459 { MSR1(3), "Interrupt Group 3" },
460 { MSR1(4), "Interrupt Group 4" },
461 { MSR1(5), "Interrupt Group 5" },
462 { MSR1(6), "Interrupt Group 6" },
463 { MSR1(7), "Interrupt Group 7" },
464 { MSR1(8), "Interrupt Group 8" },
465 { MSR1(9), "Interrupt Group 9" },
466 { MSR1(10), "Interrupt Group 10" },
467 { MSR1(11), "Interrupt Group 11" },
468 { MSR1(12), "Interrupt Group 12" },
469 { MSR1(13), "Interrupt Group 13" },
470 { MSR1(14), "Interrupt Group 14" },
471 { MSR1(15), "Interrupt Group 15" },
472 { BITVAL_EOT }
473 }},
474 { 7, 4, "MAP_Y9", "Map Unrestricted Y Input 9", PRESENT_BIN, {
475 { MSR1(0), "Disable" },
476 { MSR1(1), "Interrupt Group 1" },
477 { MSR1(2), "Interrupt Group 2" },
478 { MSR1(3), "Interrupt Group 3" },
479 { MSR1(4), "Interrupt Group 4" },
480 { MSR1(5), "Interrupt Group 5" },
481 { MSR1(6), "Interrupt Group 6" },
482 { MSR1(7), "Interrupt Group 7" },
483 { MSR1(8), "Interrupt Group 8" },
484 { MSR1(9), "Interrupt Group 9" },
485 { MSR1(10), "Interrupt Group 10" },
486 { MSR1(11), "Interrupt Group 11" },
487 { MSR1(12), "Interrupt Group 12" },
488 { MSR1(13), "Interrupt Group 13" },
489 { MSR1(14), "Interrupt Group 14" },
490 { MSR1(15), "Interrupt Group 15" },
491 { BITVAL_EOT }
492 }},
493 { 3, 4, "MAP_Y8", "Map Unrestricted Y Input 8", PRESENT_BIN, {
494 { MSR1(0), "Disable" },
495 { MSR1(1), "Interrupt Group 1" },
496 { MSR1(2), "Interrupt Group 2" },
497 { MSR1(3), "Interrupt Group 3" },
498 { MSR1(4), "Interrupt Group 4" },
499 { MSR1(5), "Interrupt Group 5" },
500 { MSR1(6), "Interrupt Group 6" },
501 { MSR1(7), "Interrupt Group 7" },
502 { MSR1(8), "Interrupt Group 8" },
503 { MSR1(9), "Interrupt Group 9" },
504 { MSR1(10), "Interrupt Group 10" },
505 { MSR1(11), "Interrupt Group 11" },
506 { MSR1(12), "Interrupt Group 12" },
507 { MSR1(13), "Interrupt Group 13" },
508 { MSR1(14), "Interrupt Group 14" },
509 { MSR1(15), "Interrupt Group 15" },
510 { BITVAL_EOT }
511 }},
512 { BITS_EOT }
513 }},
514 { 0x51400022, MSRTYPE_RDWR, MSR2(0, 0), "PIC_ZSEL_LOW", "IRQ Mapper Unrestricted Z Select Low", {
515 { 63, 32, RESERVED },
516 { 31, 4, "MAP_Z7", "Map Unrestricted Z Input 7", PRESENT_BIN, {
517 { MSR1(0), "Disable" },
518 { MSR1(1), "Interrupt Group 1" },
519 { MSR1(2), "Interrupt Group 2" },
520 { MSR1(3), "Interrupt Group 3" },
521 { MSR1(4), "Interrupt Group 4" },
522 { MSR1(5), "Interrupt Group 5" },
523 { MSR1(6), "Interrupt Group 6" },
524 { MSR1(7), "Interrupt Group 7" },
525 { MSR1(8), "Interrupt Group 8" },
526 { MSR1(9), "Interrupt Group 9" },
527 { MSR1(10), "Interrupt Group 10" },
528 { MSR1(11), "Interrupt Group 11" },
529 { MSR1(12), "Interrupt Group 12" },
530 { MSR1(13), "Interrupt Group 13" },
531 { MSR1(14), "Interrupt Group 14" },
532 { MSR1(15), "Interrupt Group 15" },
533 { BITVAL_EOT }
534 }},
535 { 27, 4, "MAP_Z6", "Map Unrestricted Z Input 6", PRESENT_BIN, {
536 { MSR1(0), "Disable" },
537 { MSR1(1), "Interrupt Group 1" },
538 { MSR1(2), "Interrupt Group 2" },
539 { MSR1(3), "Interrupt Group 3" },
540 { MSR1(4), "Interrupt Group 4" },
541 { MSR1(5), "Interrupt Group 5" },
542 { MSR1(6), "Interrupt Group 6" },
543 { MSR1(7), "Interrupt Group 7" },
544 { MSR1(8), "Interrupt Group 8" },
545 { MSR1(9), "Interrupt Group 9" },
546 { MSR1(10), "Interrupt Group 10" },
547 { MSR1(11), "Interrupt Group 11" },
548 { MSR1(12), "Interrupt Group 12" },
549 { MSR1(13), "Interrupt Group 13" },
550 { MSR1(14), "Interrupt Group 14" },
551 { MSR1(15), "Interrupt Group 15" },
552 { BITVAL_EOT }
553 }},
554 { 23, 4, "MAP_Z5", "Map Unrestricted Z Input 5", PRESENT_BIN, {
555 { MSR1(0), "Disable" },
556 { MSR1(1), "Interrupt Group 1" },
557 { MSR1(2), "Interrupt Group 2" },
558 { MSR1(3), "Interrupt Group 3" },
559 { MSR1(4), "Interrupt Group 4" },
560 { MSR1(5), "Interrupt Group 5" },
561 { MSR1(6), "Interrupt Group 6" },
562 { MSR1(7), "Interrupt Group 7" },
563 { MSR1(8), "Interrupt Group 8" },
564 { MSR1(9), "Interrupt Group 9" },
565 { MSR1(10), "Interrupt Group 10" },
566 { MSR1(11), "Interrupt Group 11" },
567 { MSR1(12), "Interrupt Group 12" },
568 { MSR1(13), "Interrupt Group 13" },
569 { MSR1(14), "Interrupt Group 14" },
570 { MSR1(15), "Interrupt Group 15" },
571 { BITVAL_EOT }
572 }},
573 { 19, 4, "MAP_Z4", "Map Unrestricted Z Input 4", PRESENT_BIN, {
574 { MSR1(0), "Disable" },
575 { MSR1(1), "Interrupt Group 1" },
576 { MSR1(2), "Interrupt Group 2" },
577 { MSR1(3), "Interrupt Group 3" },
578 { MSR1(4), "Interrupt Group 4" },
579 { MSR1(5), "Interrupt Group 5" },
580 { MSR1(6), "Interrupt Group 6" },
581 { MSR1(7), "Interrupt Group 7" },
582 { MSR1(8), "Interrupt Group 8" },
583 { MSR1(9), "Interrupt Group 9" },
584 { MSR1(10), "Interrupt Group 10" },
585 { MSR1(11), "Interrupt Group 11" },
586 { MSR1(12), "Interrupt Group 12" },
587 { MSR1(13), "Interrupt Group 13" },
588 { MSR1(14), "Interrupt Group 14" },
589 { MSR1(15), "Interrupt Group 15" },
590 { BITVAL_EOT }
591 }},
592 { 15, 4, "MAP_Z3", "Map Unrestricted Z Input 3", PRESENT_BIN, {
593 { MSR1(0), "Disable" },
594 { MSR1(1), "Interrupt Group 1" },
595 { MSR1(2), "Interrupt Group 2" },
596 { MSR1(3), "Interrupt Group 3" },
597 { MSR1(4), "Interrupt Group 4" },
598 { MSR1(5), "Interrupt Group 5" },
599 { MSR1(6), "Interrupt Group 6" },
600 { MSR1(7), "Interrupt Group 7" },
601 { MSR1(8), "Interrupt Group 8" },
602 { MSR1(9), "Interrupt Group 9" },
603 { MSR1(10), "Interrupt Group 10" },
604 { MSR1(11), "Interrupt Group 11" },
605 { MSR1(12), "Interrupt Group 12" },
606 { MSR1(13), "Interrupt Group 13" },
607 { MSR1(14), "Interrupt Group 14" },
608 { MSR1(15), "Interrupt Group 15" },
609 { BITVAL_EOT }
610 }},
611 { 11, 4, "MAP_Z2", "Map Unrestricted Z Input 2", PRESENT_BIN, {
612 { MSR1(0), "Disable" },
613 { MSR1(1), "Interrupt Group 1" },
614 { MSR1(2), "Interrupt Group 2" },
615 { MSR1(3), "Interrupt Group 3" },
616 { MSR1(4), "Interrupt Group 4" },
617 { MSR1(5), "Interrupt Group 5" },
618 { MSR1(6), "Interrupt Group 6" },
619 { MSR1(7), "Interrupt Group 7" },
620 { MSR1(8), "Interrupt Group 8" },
621 { MSR1(9), "Interrupt Group 9" },
622 { MSR1(10), "Interrupt Group 10" },
623 { MSR1(11), "Interrupt Group 11" },
624 { MSR1(12), "Interrupt Group 12" },
625 { MSR1(13), "Interrupt Group 13" },
626 { MSR1(14), "Interrupt Group 14" },
627 { MSR1(15), "Interrupt Group 15" },
628 { BITVAL_EOT }
629 }},
630 { 7, 4, "MAP_Z1", "Map Unrestricted Z Input 1", PRESENT_BIN, {
631 { MSR1(0), "Disable" },
632 { MSR1(1), "Interrupt Group 1" },
633 { MSR1(2), "Interrupt Group 2" },
634 { MSR1(3), "Interrupt Group 3" },
635 { MSR1(4), "Interrupt Group 4" },
636 { MSR1(5), "Interrupt Group 5" },
637 { MSR1(6), "Interrupt Group 6" },
638 { MSR1(7), "Interrupt Group 7" },
639 { MSR1(8), "Interrupt Group 8" },
640 { MSR1(9), "Interrupt Group 9" },
641 { MSR1(10), "Interrupt Group 10" },
642 { MSR1(11), "Interrupt Group 11" },
643 { MSR1(12), "Interrupt Group 12" },
644 { MSR1(13), "Interrupt Group 13" },
645 { MSR1(14), "Interrupt Group 14" },
646 { MSR1(15), "Interrupt Group 15" },
647 { BITVAL_EOT }
648 }},
649 { 3, 4, "MAP_Z0", "Map Unrestricted Z Input 0", PRESENT_BIN, {
650 { MSR1(0), "Disable" },
651 { MSR1(1), "Interrupt Group 1" },
652 { MSR1(2), "Interrupt Group 2" },
653 { MSR1(3), "Interrupt Group 3" },
654 { MSR1(4), "Interrupt Group 4" },
655 { MSR1(5), "Interrupt Group 5" },
656 { MSR1(6), "Interrupt Group 6" },
657 { MSR1(7), "Interrupt Group 7" },
658 { MSR1(8), "Interrupt Group 8" },
659 { MSR1(9), "Interrupt Group 9" },
660 { MSR1(10), "Interrupt Group 10" },
661 { MSR1(11), "Interrupt Group 11" },
662 { MSR1(12), "Interrupt Group 12" },
663 { MSR1(13), "Interrupt Group 13" },
664 { MSR1(14), "Interrupt Group 14" },
665 { MSR1(15), "Interrupt Group 15" },
666 { BITVAL_EOT }
667 }},
668 { BITS_EOT }
669 }},
670 { 0x51400023, MSRTYPE_RDWR, MSR2(0, 0), "PIC_ZSEL_HIGH", "IRQ Mapper Unrestricted Z Select High", {
671 { 63, 32, RESERVED },
672 { 31, 4, "MAP_Z15", "Map Unrestricted Z Input 15", PRESENT_BIN, {
673 { MSR1(0), "Disable" },
674 { MSR1(1), "Interrupt Group 1" },
675 { MSR1(2), "Interrupt Group 2" },
676 { MSR1(3), "Interrupt Group 3" },
677 { MSR1(4), "Interrupt Group 4" },
678 { MSR1(5), "Interrupt Group 5" },
679 { MSR1(6), "Interrupt Group 6" },
680 { MSR1(7), "Interrupt Group 7" },
681 { MSR1(8), "Interrupt Group 8" },
682 { MSR1(9), "Interrupt Group 9" },
683 { MSR1(10), "Interrupt Group 10" },
684 { MSR1(11), "Interrupt Group 11" },
685 { MSR1(12), "Interrupt Group 12" },
686 { MSR1(13), "Interrupt Group 13" },
687 { MSR1(14), "Interrupt Group 14" },
688 { MSR1(15), "Interrupt Group 15" },
689 { BITVAL_EOT }
690 }},
691 { 27, 4, "MAP_Z14", "Map Unrestricted Z Input 14", PRESENT_BIN, {
692 { MSR1(0), "Disable" },
693 { MSR1(1), "Interrupt Group 1" },
694 { MSR1(2), "Interrupt Group 2" },
695 { MSR1(3), "Interrupt Group 3" },
696 { MSR1(4), "Interrupt Group 4" },
697 { MSR1(5), "Interrupt Group 5" },
698 { MSR1(6), "Interrupt Group 6" },
699 { MSR1(7), "Interrupt Group 7" },
700 { MSR1(8), "Interrupt Group 8" },
701 { MSR1(9), "Interrupt Group 9" },
702 { MSR1(10), "Interrupt Group 10" },
703 { MSR1(11), "Interrupt Group 11" },
704 { MSR1(12), "Interrupt Group 12" },
705 { MSR1(13), "Interrupt Group 13" },
706 { MSR1(14), "Interrupt Group 14" },
707 { MSR1(15), "Interrupt Group 15" },
708 { BITVAL_EOT }
709 }},
710 { 23, 4, "MAP_Z13", "Map Unrestricted Z Input 13", PRESENT_BIN, {
711 { MSR1(0), "Disable" },
712 { MSR1(1), "Interrupt Group 1" },
713 { MSR1(2), "Interrupt Group 2" },
714 { MSR1(3), "Interrupt Group 3" },
715 { MSR1(4), "Interrupt Group 4" },
716 { MSR1(5), "Interrupt Group 5" },
717 { MSR1(6), "Interrupt Group 6" },
718 { MSR1(7), "Interrupt Group 7" },
719 { MSR1(8), "Interrupt Group 8" },
720 { MSR1(9), "Interrupt Group 9" },
721 { MSR1(10), "Interrupt Group 10" },
722 { MSR1(11), "Interrupt Group 11" },
723 { MSR1(12), "Interrupt Group 12" },
724 { MSR1(13), "Interrupt Group 13" },
725 { MSR1(14), "Interrupt Group 14" },
726 { MSR1(15), "Interrupt Group 15" },
727 { BITVAL_EOT }
728 }},
729 { 19, 4, "MAP_Z12", "Map Unrestricted Z Input 12", PRESENT_BIN, {
730 { MSR1(0), "Disable" },
731 { MSR1(1), "Interrupt Group 1" },
732 { MSR1(2), "Interrupt Group 2" },
733 { MSR1(3), "Interrupt Group 3" },
734 { MSR1(4), "Interrupt Group 4" },
735 { MSR1(5), "Interrupt Group 5" },
736 { MSR1(6), "Interrupt Group 6" },
737 { MSR1(7), "Interrupt Group 7" },
738 { MSR1(8), "Interrupt Group 8" },
739 { MSR1(9), "Interrupt Group 9" },
740 { MSR1(10), "Interrupt Group 10" },
741 { MSR1(11), "Interrupt Group 11" },
742 { MSR1(12), "Interrupt Group 12" },
743 { MSR1(13), "Interrupt Group 13" },
744 { MSR1(14), "Interrupt Group 14" },
745 { MSR1(15), "Interrupt Group 15" },
746 { BITVAL_EOT }
747 }},
748 { 15, 4, "MAP_Z11", "Map Unrestricted Z Input 11", PRESENT_BIN, {
749 { MSR1(0), "Disable" },
750 { MSR1(1), "Interrupt Group 1" },
751 { MSR1(2), "Interrupt Group 2" },
752 { MSR1(3), "Interrupt Group 3" },
753 { MSR1(4), "Interrupt Group 4" },
754 { MSR1(5), "Interrupt Group 5" },
755 { MSR1(6), "Interrupt Group 6" },
756 { MSR1(7), "Interrupt Group 7" },
757 { MSR1(8), "Interrupt Group 8" },
758 { MSR1(9), "Interrupt Group 9" },
759 { MSR1(10), "Interrupt Group 10" },
760 { MSR1(11), "Interrupt Group 11" },
761 { MSR1(12), "Interrupt Group 12" },
762 { MSR1(13), "Interrupt Group 13" },
763 { MSR1(14), "Interrupt Group 14" },
764 { MSR1(15), "Interrupt Group 15" },
765 { BITVAL_EOT }
766 }},
767 { 11, 4, "MAP_Z10", "Map Unrestricted Z Input 10", PRESENT_BIN, {
768 { MSR1(0), "Disable" },
769 { MSR1(1), "Interrupt Group 1" },
770 { MSR1(2), "Interrupt Group 2" },
771 { MSR1(3), "Interrupt Group 3" },
772 { MSR1(4), "Interrupt Group 4" },
773 { MSR1(5), "Interrupt Group 5" },
774 { MSR1(6), "Interrupt Group 6" },
775 { MSR1(7), "Interrupt Group 7" },
776 { MSR1(8), "Interrupt Group 8" },
777 { MSR1(9), "Interrupt Group 9" },
778 { MSR1(10), "Interrupt Group 10" },
779 { MSR1(11), "Interrupt Group 11" },
780 { MSR1(12), "Interrupt Group 12" },
781 { MSR1(13), "Interrupt Group 13" },
782 { MSR1(14), "Interrupt Group 14" },
783 { MSR1(15), "Interrupt Group 15" },
784 { BITVAL_EOT }
785 }},
786 { 7, 4, "MAP_Z9", "Map Unrestricted Z Input 9", PRESENT_BIN, {
787 { MSR1(0), "Disable" },
788 { MSR1(1), "Interrupt Group 1" },
789 { MSR1(2), "Interrupt Group 2" },
790 { MSR1(3), "Interrupt Group 3" },
791 { MSR1(4), "Interrupt Group 4" },
792 { MSR1(5), "Interrupt Group 5" },
793 { MSR1(6), "Interrupt Group 6" },
794 { MSR1(7), "Interrupt Group 7" },
795 { MSR1(8), "Interrupt Group 8" },
796 { MSR1(9), "Interrupt Group 9" },
797 { MSR1(10), "Interrupt Group 10" },
798 { MSR1(11), "Interrupt Group 11" },
799 { MSR1(12), "Interrupt Group 12" },
800 { MSR1(13), "Interrupt Group 13" },
801 { MSR1(14), "Interrupt Group 14" },
802 { MSR1(15), "Interrupt Group 15" },
803 { BITVAL_EOT }
804 }},
805 { 3, 4, "MAP_Z8", "Map Unrestricted Z Input 8", PRESENT_BIN, {
806 { MSR1(0), "Disable" },
807 { MSR1(1), "Interrupt Group 1" },
808 { MSR1(2), "Interrupt Group 2" },
809 { MSR1(3), "Interrupt Group 3" },
810 { MSR1(4), "Interrupt Group 4" },
811 { MSR1(5), "Interrupt Group 5" },
812 { MSR1(6), "Interrupt Group 6" },
813 { MSR1(7), "Interrupt Group 7" },
814 { MSR1(8), "Interrupt Group 8" },
815 { MSR1(9), "Interrupt Group 9" },
816 { MSR1(10), "Interrupt Group 10" },
817 { MSR1(11), "Interrupt Group 11" },
818 { MSR1(12), "Interrupt Group 12" },
819 { MSR1(13), "Interrupt Group 13" },
820 { MSR1(14), "Interrupt Group 14" },
821 { MSR1(15), "Interrupt Group 15" },
822 { BITVAL_EOT }
823 }},
824 { BITS_EOT }
825 }},
826 { 0x51400024, MSRTYPE_RDWR, MSR2(0, 0xffff), "PIC_IRQM_PRIM", "IRQ Mapper Primary Mask", {
827 { 63, 48, RESERVED },
828 { 15, 1, "PRIM15_MSK", "Primary Input 15 Mask", PRESENT_DEC, {
829 { MSR1(0), "Mask the interrupt source" },
830 { MSR1(1), "Do not mask the interrupt source" },
831 { BITVAL_EOT }
832 }},
833 { 14, 1, "PRIM14_MSK", "Primary Input 14 Mask", PRESENT_DEC, {
834 { MSR1(0), "Mask the interrupt source" },
835 { MSR1(1), "Do not mask the interrupt source" },
836 { BITVAL_EOT }
837 }},
838 { 13, 1, "PRIM13_MSK", "Primary Input 13 Mask", PRESENT_DEC, {
839 { MSR1(0), "Mask the interrupt source" },
840 { MSR1(1), "Do not mask the interrupt source" },
841 { BITVAL_EOT }
842 }},
843 { 12, 1, "PRIM12_MSK", "Primary Input 12 Mask", PRESENT_DEC, {
844 { MSR1(0), "Mask the interrupt source" },
845 { MSR1(1), "Do not mask the interrupt source" },
846 { BITVAL_EOT }
847 }},
848 { 11, 1, "PRIM11_MSK", "Primary Input 11 Mask", PRESENT_DEC, {
849 { MSR1(0), "Mask the interrupt source" },
850 { MSR1(1), "Do not mask the interrupt source" },
851 { BITVAL_EOT }
852 }},
853 { 10, 1, "PRIM10_MSK", "Primary Input 10 Mask", PRESENT_DEC, {
854 { MSR1(0), "Mask the interrupt source" },
855 { MSR1(1), "Do not mask the interrupt source" },
856 { BITVAL_EOT }
857 }},
858 { 9, 1, "PRIM9_MSK", "Primary Input 9 Mask", PRESENT_DEC, {
859 { MSR1(0), "Mask the interrupt source" },
860 { MSR1(1), "Do not mask the interrupt source" },
861 { BITVAL_EOT }
862 }},
863 { 8, 1, "PRIM8_MSK", "Primary Input 8 Mask", PRESENT_DEC, {
864 { MSR1(0), "Mask the interrupt source" },
865 { MSR1(1), "Do not mask the interrupt source" },
866 { BITVAL_EOT }
867 }},
868 { 7, 1, "PRIM7_MSK", "Primary Input 7 Mask", PRESENT_DEC, {
869 { MSR1(0), "Mask the interrupt source" },
870 { MSR1(1), "Do not mask the interrupt source" },
871 { BITVAL_EOT }
872 }},
873 { 6, 1, "PRIM6_MSK", "Primary Input 6 Mask", PRESENT_DEC, {
874 { MSR1(0), "Mask the interrupt source" },
875 { MSR1(1), "Do not mask the interrupt source" },
876 { BITVAL_EOT }
877 }},
878 { 5, 1, "PRIM5_MSK", "Primary Input 5 Mask", PRESENT_DEC, {
879 { MSR1(0), "Mask the interrupt source" },
880 { MSR1(1), "Do not mask the interrupt source" },
881 { BITVAL_EOT }
882 }},
883 { 4, 1, "PRIM4_MSK", "Primary Input 4 Mask", PRESENT_DEC, {
884 { MSR1(0), "Mask the interrupt source" },
885 { MSR1(1), "Do not mask the interrupt source" },
886 { BITVAL_EOT }
887 }},
888 { 3, 1, "PRIM3_MSK", "Primary Input 3 Mask", PRESENT_DEC, {
889 { MSR1(0), "Mask the interrupt source" },
890 { MSR1(1), "Do not mask the interrupt source" },
891 { BITVAL_EOT }
892 }},
893 { 2, 1, RESERVED },
894 { 1, 1, "PRIM1_MSK", "Primary Input 1 Mask", PRESENT_DEC, {
895 { MSR1(0), "Mask the interrupt source" },
896 { MSR1(1), "Do not mask the interrupt source" },
897 { BITVAL_EOT }
898 }},
899 { 0, 1, "PRIM0_MSK", "Primary Input 0 Mask", PRESENT_DEC, {
900 { MSR1(0), "Mask the interrupt source" },
901 { MSR1(1), "Do not mask the interrupt source" },
902 { BITVAL_EOT }
903 }},
904 { BITS_EOT }
905 }},
906 { 0x51400025, MSRTYPE_RDWR, MSR2(0, 0), "PIC_IRQM_LPC", "IRQ Mapper LPC Mask", {
907 { 63, 48, RESERVED },
908 { 15, 1, "LPC15_EN", "LPC Input 15 Enable", PRESENT_DEC, {
909 { MSR1(0), "Disable interrupt source" },
910 { MSR1(1), "Enable interrupt source" },
911 { BITVAL_EOT }
912 }},
913 { 14, 1, "LPC14_EN", "LPC Input 14 Enable", PRESENT_DEC, {
914 { MSR1(0), "Disable interrupt source" },
915 { MSR1(1), "Enable interrupt source" },
916 { BITVAL_EOT }
917 }},
918 { 13, 1, "LPC13_EN", "LPC Input 13 Enable", PRESENT_DEC, {
919 { MSR1(0), "Disable interrupt source" },
920 { MSR1(1), "Enable interrupt source" },
921 { BITVAL_EOT }
922 }},
923 { 12, 1, "LPC12_EN", "LPC Input 12 Enable", PRESENT_DEC, {
924 { MSR1(0), "Disable interrupt source" },
925 { MSR1(1), "Enable interrupt source" },
926 { BITVAL_EOT }
927 }},
928 { 11, 1, "LPC11_EN", "LPC Input 11 Enable", PRESENT_DEC, {
929 { MSR1(0), "Disable interrupt source" },
930 { MSR1(1), "Enable interrupt source" },
931 { BITVAL_EOT }
932 }},
933 { 10, 1, "LPC10_EN", "LPC Input 10 Enable", PRESENT_DEC, {
934 { MSR1(0), "Disable interrupt source" },
935 { MSR1(1), "Enable interrupt source" },
936 { BITVAL_EOT }
937 }},
938 { 9, 1, "LPC9_EN", "LPC Input 9 Enable", PRESENT_DEC, {
939 { MSR1(0), "Disable interrupt source" },
940 { MSR1(1), "Enable interrupt source" },
941 { BITVAL_EOT }
942 }},
943 { 8, 1, "LPC8_EN", "LPC Input 8 Enable", PRESENT_DEC, {
944 { MSR1(0), "Disable interrupt source" },
945 { MSR1(1), "Enable interrupt source" },
946 { BITVAL_EOT }
947 }},
948 { 7, 1, "LPC7_EN", "LPC Input 7 Enable", PRESENT_DEC, {
949 { MSR1(0), "Disable interrupt source" },
950 { MSR1(1), "Enable interrupt source" },
951 { BITVAL_EOT }
952 }},
953 { 6, 1, "LPC6_EN", "LPC Input 6 Enable", PRESENT_DEC, {
954 { MSR1(0), "Disable interrupt source" },
955 { MSR1(1), "Enable interrupt source" },
956 { BITVAL_EOT }
957 }},
958 { 5, 1, "LPC5_EN", "LPC Input 5 Enable", PRESENT_DEC, {
959 { MSR1(0), "Disable interrupt source" },
960 { MSR1(1), "Enable interrupt source" },
961 { BITVAL_EOT }
962 }},
963 { 4, 1, "LPC4_EN", "LPC Input 4 Enable", PRESENT_DEC, {
964 { MSR1(0), "Disable interrupt source" },
965 { MSR1(1), "Enable interrupt source" },
966 { BITVAL_EOT }
967 }},
968 { 3, 1, "LPC3_EN", "LPC Input 3 Enable", PRESENT_DEC, {
969 { MSR1(0), "Disable interrupt source" },
970 { MSR1(1), "Enable interrupt source" },
971 { BITVAL_EOT }
972 }},
973 { 2, 1, RESERVED },
974 { 1, 1, "LPC1_EN", "LPC Input 1 Enable", PRESENT_DEC, {
975 { MSR1(0), "Disable interrupt source" },
976 { MSR1(1), "Enable interrupt source" },
977 { BITVAL_EOT }
978 }},
979 { 0, 1, "LPC0_EN", "LPC Input 0 Enable", PRESENT_DEC, {
980 { MSR1(0), "Disable interrupt source" },
981 { MSR1(1), "Enable interrupt source" },
982 { BITVAL_EOT }
983 }},
984 { BITS_EOT }
985 }},
986 { 0x51400026, MSRTYPE_RDONLY, MSR2(0, 0), "PIC_XIRR_STS_LOW", "IRQ Mapper Extended Interrupt Request Status Low", {
987 { 63, 32, RESERVED },
988 { 31, 1, "IG7_STS_Z", "Unrestricted Source Z Input 7", PRESENT_BIN, {
989 { MSR1(0), "No interrupt" },
990 { MSR1(1), "INTERRUPT" },
991 { BITVAL_EOT }
992 }},
993 { 30, 1, "IG7_STS_Y", "Unrestricted Source Y Input 7", PRESENT_BIN, {
994 { MSR1(0), "No interrupt" },
995 { MSR1(1), "INTERRUPT" },
996 { BITVAL_EOT }
997 }},
998 { 29, 1, "IG7_STS_LPC", "LPC Input 7", PRESENT_BIN, {
999 { MSR1(0), "No interrupt" },
1000 { MSR1(1), "INTERRUPT" },
1001 { BITVAL_EOT }
1002 }},
1003 { 28, 1, "IG7_STS_PRIM", "Primary Input 7", PRESENT_BIN, {
1004 { MSR1(0), "No interrupt" },
1005 { MSR1(1), "INTERRUPT" },
1006 { BITVAL_EOT }
1007 }},
1008 { 27, 1, "IG6_STS_Z", "Unrestricted Source Z Input 6", PRESENT_BIN, {
1009 { MSR1(0), "No interrupt" },
1010 { MSR1(1), "INTERRUPT" },
1011 { BITVAL_EOT }
1012 }},
1013 { 26, 1, "IG6_STS_Y", "Unrestricted Source Y Input 6", PRESENT_BIN, {
1014 { MSR1(0), "No interrupt" },
1015 { MSR1(1), "INTERRUPT" },
1016 { BITVAL_EOT }
1017 }},
1018 { 25, 1, "IG6_STS_LPC", "LPC Input 6", PRESENT_BIN, {
1019 { MSR1(0), "No interrupt" },
1020 { MSR1(1), "INTERRUPT" },
1021 { BITVAL_EOT }
1022 }},
1023 { 24, 1, "IG6_STS_PRIM", "Primary Input 6", PRESENT_BIN, {
1024 { MSR1(0), "No interrupt" },
1025 { MSR1(1), "INTERRUPT" },
1026 { BITVAL_EOT }
1027 }},
1028 { 23, 1, "IG5_STS_Z", "Unrestricted Source Z Input 5", PRESENT_BIN, {
1029 { MSR1(0), "No interrupt" },
1030 { MSR1(1), "INTERRUPT" },
1031 { BITVAL_EOT }
1032 }},
1033 { 22, 1, "IG5_STS_Y", "Unrestricted Source Y Input 5", PRESENT_BIN, {
1034 { MSR1(0), "No interrupt" },
1035 { MSR1(1), "INTERRUPT" },
1036 { BITVAL_EOT }
1037 }},
1038 { 21, 1, "IG5_STS_LPC", "LPC Input 5", PRESENT_BIN, {
1039 { MSR1(0), "No interrupt" },
1040 { MSR1(1), "INTERRUPT" },
1041 { BITVAL_EOT }
1042 }},
1043 { 20, 1, "IG5_STS_PRIM", "Primary Input 5", PRESENT_BIN, {
1044 { MSR1(0), "No interrupt" },
1045 { MSR1(1), "INTERRUPT" },
1046 { BITVAL_EOT }
1047 }},
1048 { 19, 1, "IG4_STS_Z", "Unrestricted Source Z Input 4", PRESENT_BIN, {
1049 { MSR1(0), "No interrupt" },
1050 { MSR1(1), "INTERRUPT" },
1051 { BITVAL_EOT }
1052 }},
1053 { 18, 1, "IG4_STS_Y", "Unrestricted Source Y Input 4", PRESENT_BIN, {
1054 { MSR1(0), "No interrupt" },
1055 { MSR1(1), "INTERRUPT" },
1056 { BITVAL_EOT }
1057 }},
1058 { 17, 1, "IG4_STS_LPC", "LPC Input 4", PRESENT_BIN, {
1059 { MSR1(0), "No interrupt" },
1060 { MSR1(1), "INTERRUPT" },
1061 { BITVAL_EOT }
1062 }},
1063 { 16, 1, "IG4_STS_PRIM", "Primary Input 4", PRESENT_BIN, {
1064 { MSR1(0), "No interrupt" },
1065 { MSR1(1), "INTERRUPT" },
1066 { BITVAL_EOT }
1067 }},
1068 { 15, 1, "IG3_STS_Z", "Unrestricted Source Z Input 3", PRESENT_BIN, {
1069 { MSR1(0), "No interrupt" },
1070 { MSR1(1), "INTERRUPT" },
1071 { BITVAL_EOT }
1072 }},
1073 { 14, 1, "IG3_STS_Y", "Unrestricted Source Y Input 3", PRESENT_BIN, {
1074 { MSR1(0), "No interrupt" },
1075 { MSR1(1), "INTERRUPT" },
1076 { BITVAL_EOT }
1077 }},
1078 { 13, 1, "IG3_STS_LPC", "LPC Input 3", PRESENT_BIN, {
1079 { MSR1(0), "No interrupt" },
1080 { MSR1(1), "INTERRUPT" },
1081 { BITVAL_EOT }
1082 }},
1083 { 12, 1, "IG3_STS_PRIM", "Primary Input 3", PRESENT_BIN, {
1084 { MSR1(0), "No interrupt" },
1085 { MSR1(1), "INTERRUPT" },
1086 { BITVAL_EOT }
1087 }},
1088 { 11, 1, "IG2_STS_Z", "Unrestricted Source Z Input 2", PRESENT_BIN, {
1089 { MSR1(0), "No interrupt" },
1090 { MSR1(1), "INTERRUPT" },
1091 { BITVAL_EOT }
1092 }},
1093 { 10, 1, "IG2_STS_Y", "Unrestricted Source Y Input 2", PRESENT_BIN, {
1094 { MSR1(0), "No interrupt" },
1095 { MSR1(1), "INTERRUPT" },
1096 { BITVAL_EOT }
1097 }},
1098 { 9, 2, RESERVED },
1099 { 7, 1, "IG1_STS_Z", "Unrestricted Source Z Input 1", PRESENT_BIN, {
1100 { MSR1(0), "No interrupt" },
1101 { MSR1(1), "INTERRUPT" },
1102 { BITVAL_EOT }
1103 }},
1104 { 6, 1, "IG1_STS_Y", "Unrestricted Source Y Input 1", PRESENT_BIN, {
1105 { MSR1(0), "No interrupt" },
1106 { MSR1(1), "INTERRUPT" },
1107 { BITVAL_EOT }
1108 }},
1109 { 5, 1, "IG1_STS_LPC", "LPC Input 1", PRESENT_BIN, {
1110 { MSR1(0), "No interrupt" },
1111 { MSR1(1), "INTERRUPT" },
1112 { BITVAL_EOT }
1113 }},
1114 { 4, 1, "IG1_STS_PRIM", "Primary Input 1", PRESENT_BIN, {
1115 { MSR1(0), "No interrupt" },
1116 { MSR1(1), "INTERRUPT" },
1117 { BITVAL_EOT }
1118 }},
1119 { 3, 2, RESERVED },
1120 { 1, 1, "IG0_STS_LPC", "LPC Input 0", PRESENT_BIN, {
1121 { MSR1(0), "No interrupt" },
1122 { MSR1(1), "INTERRUPT" },
1123 { BITVAL_EOT }
1124 }},
1125 { 0, 1, "IG0_STS_PRIM", "Primary Input 0", PRESENT_BIN, {
1126 { MSR1(0), "No interrupt" },
1127 { MSR1(1), "INTERRUPT" },
1128 { BITVAL_EOT }
1129 }},
1130 { BITS_EOT }
1131 }},
1132 { 0x51400027, MSRTYPE_RDONLY, MSR2(0, 0), "PIC_XIRR_STS_HIGH", "IRQ Mapper Extended Interrupt Request Status High", {
1133 { 63, 32, RESERVED },
1134 { 31, 1, "IG15_STS_Z", "Unrestricted Source Z Input 15", PRESENT_BIN, {
1135 { MSR1(0), "No interrupt" },
1136 { MSR1(1), "INTERRUPT" },
1137 { BITVAL_EOT }
1138 }},
1139 { 30, 1, "IG15_STS_Y", "Unrestricted Source Y Input 15", PRESENT_BIN, {
1140 { MSR1(0), "No interrupt" },
1141 { MSR1(1), "INTERRUPT" },
1142 { BITVAL_EOT }
1143 }},
1144 { 29, 1, "IG15_STS_LPC", "LPC Input 15", PRESENT_BIN, {
1145 { MSR1(0), "No interrupt" },
1146 { MSR1(1), "INTERRUPT" },
1147 { BITVAL_EOT }
1148 }},
1149 { 28, 1, "IG15_STS_PRIM", "Primary Input 15", PRESENT_BIN, {
1150 { MSR1(0), "No interrupt" },
1151 { MSR1(1), "INTERRUPT" },
1152 { BITVAL_EOT }
1153 }},
1154 { 27, 1, "IG14_STS_Z", "Unrestricted Source Z Input 14", PRESENT_BIN, {
1155 { MSR1(0), "No interrupt" },
1156 { MSR1(1), "INTERRUPT" },
1157 { BITVAL_EOT }
1158 }},
1159 { 26, 1, "IG14_STS_Y", "Unrestricted Source Y Input 14", PRESENT_BIN, {
1160 { MSR1(0), "No interrupt" },
1161 { MSR1(1), "INTERRUPT" },
1162 { BITVAL_EOT }
1163 }},
1164 { 25, 1, "IG14_STS_LPC", "LPC Input 14", PRESENT_BIN, {
1165 { MSR1(0), "No interrupt" },
1166 { MSR1(1), "INTERRUPT" },
1167 { BITVAL_EOT }
1168 }},
1169 { 24, 1, "IG14_STS_PRIM", "Primary Input 14", PRESENT_BIN, {
1170 { MSR1(0), "No interrupt" },
1171 { MSR1(1), "INTERRUPT" },
1172 { BITVAL_EOT }
1173 }},
1174 { 23, 1, "IG13_STS_Z", "Unrestricted Source Z Input 13", PRESENT_BIN, {
1175 { MSR1(0), "No interrupt" },
1176 { MSR1(1), "INTERRUPT" },
1177 { BITVAL_EOT }
1178 }},
1179 { 22, 1, "IG13_STS_Y", "Unrestricted Source Y Input 13", PRESENT_BIN, {
1180 { MSR1(0), "No interrupt" },
1181 { MSR1(1), "INTERRUPT" },
1182 { BITVAL_EOT }
1183 }},
1184 { 21, 1, "IG13_STS_LPC", "LPC Input 13", PRESENT_BIN, {
1185 { MSR1(0), "No interrupt" },
1186 { MSR1(1), "INTERRUPT" },
1187 { BITVAL_EOT }
1188 }},
1189 { 20, 1, "IG13_STS_PRIM", "Primary Input 13", PRESENT_BIN, {
1190 { MSR1(0), "No interrupt" },
1191 { MSR1(1), "INTERRUPT" },
1192 { BITVAL_EOT }
1193 }},
1194 { 19, 1, "IG12_STS_Z", "Unrestricted Source Z Input 12", PRESENT_BIN, {
1195 { MSR1(0), "No interrupt" },
1196 { MSR1(1), "INTERRUPT" },
1197 { BITVAL_EOT }
1198 }},
1199 { 18, 1, "IG12_STS_Y", "Unrestricted Source Y Input 12", PRESENT_BIN, {
1200 { MSR1(0), "No interrupt" },
1201 { MSR1(1), "INTERRUPT" },
1202 { BITVAL_EOT }
1203 }},
1204 { 17, 1, "IG12_STS_LPC", "LPC Input 12", PRESENT_BIN, {
1205 { MSR1(0), "No interrupt" },
1206 { MSR1(1), "INTERRUPT" },
1207 { BITVAL_EOT }
1208 }},
1209 { 16, 1, "IG12_STS_PRIM", "Primary Input 12", PRESENT_BIN, {
1210 { MSR1(0), "No interrupt" },
1211 { MSR1(1), "INTERRUPT" },
1212 { BITVAL_EOT }
1213 }},
1214 { 15, 1, "IG11_STS_Z", "Unrestricted Source Z Input 11", PRESENT_BIN, {
1215 { MSR1(0), "No interrupt" },
1216 { MSR1(1), "INTERRUPT" },
1217 { BITVAL_EOT }
1218 }},
1219 { 14, 1, "IG11_STS_Y", "Unrestricted Source Y Input 11", PRESENT_BIN, {
1220 { MSR1(0), "No interrupt" },
1221 { MSR1(1), "INTERRUPT" },
1222 { BITVAL_EOT }
1223 }},
1224 { 13, 1, "IG11_STS_LPC", "LPC Input 11", PRESENT_BIN, {
1225 { MSR1(0), "No interrupt" },
1226 { MSR1(1), "INTERRUPT" },
1227 { BITVAL_EOT }
1228 }},
1229 { 12, 1, "IG11_STS_PRIM", "Primary Input 11", PRESENT_BIN, {
1230 { MSR1(0), "No interrupt" },
1231 { MSR1(1), "INTERRUPT" },
1232 { BITVAL_EOT }
1233 }},
1234 { 11, 1, "IG10_STS_Z", "Unrestricted Source Z Input 10", PRESENT_BIN, {
1235 { MSR1(0), "No interrupt" },
1236 { MSR1(1), "INTERRUPT" },
1237 { BITVAL_EOT }
1238 }},
1239 { 10, 1, "IG10_STS_Y", "Unrestricted Source Y Input 10", PRESENT_BIN, {
1240 { MSR1(0), "No interrupt" },
1241 { MSR1(1), "INTERRUPT" },
1242 { BITVAL_EOT }
1243 }},
1244 { 9, 1, "IG10_STS_LPC", "LPC Input 10", PRESENT_BIN, {
1245 { MSR1(0), "No interrupt" },
1246 { MSR1(1), "INTERRUPT" },
1247 { BITVAL_EOT }
1248 }},
1249 { 8, 1, "IG10_STS_PRIM", "Primary Input 10", PRESENT_BIN, {
1250 { MSR1(0), "No interrupt" },
1251 { MSR1(1), "INTERRUPT" },
1252 { BITVAL_EOT }
1253 }},
1254 { 7, 1, "IG9_STS_Z", "Unrestricted Source Z Input 9", PRESENT_BIN, {
1255 { MSR1(0), "No interrupt" },
1256 { MSR1(1), "INTERRUPT" },
1257 { BITVAL_EOT }
1258 }},
1259 { 6, 1, "IG9_STS_Y", "Unrestricted Source Y Input 9", PRESENT_BIN, {
1260 { MSR1(0), "No interrupt" },
1261 { MSR1(1), "INTERRUPT" },
1262 { BITVAL_EOT }
1263 }},
1264 { 5, 1, "IG9_STS_LPC", "LPC Input 9", PRESENT_BIN, {
1265 { MSR1(0), "No interrupt" },
1266 { MSR1(1), "INTERRUPT" },
1267 { BITVAL_EOT }
1268 }},
1269 { 4, 1, "IG9_STS_PRIM", "Primary Input 9", PRESENT_BIN, {
1270 { MSR1(0), "No interrupt" },
1271 { MSR1(1), "INTERRUPT" },
1272 { BITVAL_EOT }
1273 }},
1274 { 3, 1, "IG8_STS_Z", "Unrestricted Source Z Input 8", PRESENT_BIN, {
1275 { MSR1(0), "No interrupt" },
1276 { MSR1(1), "INTERRUPT" },
1277 { BITVAL_EOT }
1278 }},
1279 { 2, 1, "IG8_STS_Y", "Unrestricted Source Y Input 8", PRESENT_BIN, {
1280 { MSR1(0), "No interrupt" },
1281 { MSR1(1), "INTERRUPT" },
1282 { BITVAL_EOT }
1283 }},
1284 { 1, 1, "IG8_STS_LPC", "LPC Input 8", PRESENT_BIN, {
1285 { MSR1(0), "No interrupt" },
1286 { MSR1(1), "INTERRUPT" },
1287 { BITVAL_EOT }
1288 }},
1289 { 0, 1, "IG8_STS_PRIM", "Primary Input 8", PRESENT_BIN, {
1290 { MSR1(0), "No interrupt" },
1291 { MSR1(1), "INTERRUPT" },
1292 { BITVAL_EOT }
1293 }},
1294 { BITS_EOT }
1295 }},
Christian Gmeiner42b808e2012-07-11 09:31:12 +0200[diff] [blame]1296 { 0x5140004e, MSRTYPE_RDWR, MSR2(0, 0), "LPC_SERIRQ", "LPC Serial IRQ Control", {
1297 { 31, 16, "INVERT", "IRQ[x] input is active low", PRESENT_HEX },
1298 { 15, 8, RESERVED },
1299 { 7, 1, "SIRQ_EN", "Serial IRQ Enable", PRESENT_BIN, {
1300 { MSR1(0), "Disable" },
1301 { MSR1(1), "Enable" },
1302 { BITVAL_EOT }
1303 }},
1304 { 6, 1, "SIRQ_MODE", "Serial IRQ Interface Mode", PRESENT_BIN, {
1305 { MSR1(0), "Continuous (Idle)" },
1306 { MSR1(1), "Quiet (Active)" },
1307 { BITVAL_EOT }
1308 }},
1309 { 5, 4, "IRQ_FRAME", "IRQ Data Frames", PRESENT_BIN, {
1310 { MSR1(0), "17" },
1311 { MSR1(1), "18" },
1312 { MSR1(2), "19" },
1313 { MSR1(3), "20" },
1314 { MSR1(4), "21" },
1315 { MSR1(5), "22" },
1316 { MSR1(6), "23" },
1317 { MSR1(7), "24" },
1318 { MSR1(8), "25" },
1319 { MSR1(9), "26" },
1320 { MSR1(10), "27" },
1321 { MSR1(11), "28" },
1322 { MSR1(12), "29" },
1323 { MSR1(13), "30" },
1324 { MSR1(14), "31" },
1325 { MSR1(15), "32" },
1326 { BITVAL_EOT }
1327 }},
1328 { 1, 2, "START_FPW", "Start Frame Pulse Width", PRESENT_BIN, {
1329 { MSR1(0), "4 clocks" },
1330 { MSR1(1), "6 clocks" },
1331 { MSR1(2), "8 clocks" },
1332 { MSR1(3), "Reserved" },
1333 { BITVAL_EOT }
1334 }},
1335 { BITS_EOT }
1336 }},
Peter Stugedad1e302008-11-22 17:13:36 +0000[diff] [blame]1337 { MSR_EOT }
1338};