blob: ce450e8d1fe6ab1c625bda3f2cd66ba0fc57e04b [file] [log] [blame]
Felix Held3c44c622022-01-10 20:57:29 +01001/* SPDX-License-Identifier: GPL-2.0-only */
2
3/* TODO: Check if this is still correct */
4
5#include <acpi/acpi.h>
6#include <amdblocks/apob_cache.h>
Matt DeVillierbcb67ed2022-12-16 17:25:01 -06007#include <amdblocks/vbios_cache.h>
Matt DeVillier65a44452023-02-16 09:57:40 -06008#include <bootmode.h>
Matt DeVillierbcb67ed2022-12-16 17:25:01 -06009#include <console/console.h>
Felix Held3c44c622022-01-10 20:57:29 +010010#include <device/pci.h>
11#include <fsp/api.h>
12#include <program_loading.h>
13
14static void fsp_assign_vbios_upds(FSP_S_CONFIG *scfg)
15{
Matt DeVillier65a44452023-02-16 09:57:40 -060016 if (CONFIG(USE_SELECTIVE_GOP_INIT) && vbios_cache_is_valid() &&
17 !display_init_required()) {
18 scfg->vbios_buffer = 0;
19 printk(BIOS_SPEW, "%s: using VBIOS cache; skipping GOP driver.\n", __func__);
20 return;
21
Matt DeVillierbcb67ed2022-12-16 17:25:01 -060022 }
23 printk(BIOS_SPEW, "%s: not using VBIOS cache; running GOP driver.\n", __func__);
Felix Held3c44c622022-01-10 20:57:29 +010024 scfg->vbios_buffer = CONFIG(RUN_FSP_GOP) ? PCI_VGA_RAM_IMAGE_START : 0;
25}
26
27void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd)
28{
29 FSP_S_CONFIG *scfg = &supd->FspsConfig;
30
31 fsp_assign_vbios_upds(scfg);
32
33 /*
34 * At this point FSP-S has been loaded into RAM. If we were to start loading the APOB
35 * before FSP-S was loaded, we would introduce contention onto the SPI bus and
36 * slow down the FSP-S read from SPI. Since FSP-S takes a while to execute and performs
37 * no SPI operations, we can read the APOB while FSP-S executes.
38 */
39 start_apob_cache_read();
40 /*
41 * We enqueue the payload to be loaded after the APOB. This might cause a bit of
42 * bus contention when loading uCode and OPROMs, but since those calls happen at
43 * different points in the boot state machine it's a little harder to sequence all the
44 * async loading correctly. So in order to keep the complexity down, we enqueue the
45 * payload preload here. The end goal will be to add uCode and OPROM preloading
46 * before the payload so that the sequencing is correct.
47 *
48 * While FSP-S is executing, it's not currently possible to enqueue other transactions
49 * because FSP-S doesn't call `thread_yield()`. So the payload will start loading
50 * right after FSP-S completes.
51 */
52 if (!acpi_is_wakeup_s3())
53 payload_preload();
54}