blob: 96b1204b0798e769d87cff9dd1014af3c6ef5325 [file] [log] [blame]
Patrick Georgi40a3e322015-06-22 19:41:29 +02001/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright 2014 Google Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc.
18 */
19
20#include <arch/io.h>
21#include <soc/addressmap.h>
22#include <soc/clock.h>
23#include <soc/funitcfg.h>
24#include <soc/nvidia/tegra/usb.h>
25#include <soc/padconfig.h>
26#include <string.h>
27
28struct clk_dev_control {
29 uint32_t *clk_enb_set;
30 uint32_t *rst_dev_clr;
31};
32
33struct funit_cfg_data {
34 const char *name;
35 void *ctlr_base;
36 uint32_t *clk_src_reg;
37 const struct clk_dev_control * const dev_control;
38 uint32_t clk_enb_val;
39};
40
41enum {
42 CLK_L_SET = 0,
43 CLK_H_SET = 1,
44 CLK_U_SET = 2,
45 CLK_V_SET = 3,
46 CLK_W_SET = 4,
47 CLK_X_SET = 5,
48 CLK_Y_SET = 6,
49};
50
51#define CLK_SET_REGS(x) \
52 { \
53 CLK_RST_REG(clk_enb_##x##_set), \
54 CLK_RST_REG(rst_dev_##x##_clr), \
55 }
56
57static const struct clk_dev_control clk_data_arr[] = {
58 [CLK_L_SET] = CLK_SET_REGS(l),
59 [CLK_H_SET] = CLK_SET_REGS(h),
60 [CLK_U_SET] = CLK_SET_REGS(u),
61 [CLK_V_SET] = CLK_SET_REGS(v),
62 [CLK_W_SET] = CLK_SET_REGS(w),
63 [CLK_X_SET] = CLK_SET_REGS(x),
64 [CLK_Y_SET] = CLK_SET_REGS(y),
65};
66
67#define FUNIT_DATA(funit_, loname_, clk_set_) \
68 [FUNIT_INDEX(funit_)] = { \
69 .name = STRINGIFY(loname_), \
70 .ctlr_base = (void *)(uintptr_t)TEGRA_##funit_##_BASE, \
71 .clk_src_reg = CLK_RST_REG(clk_src_##loname_), \
72 .dev_control = &clk_data_arr[CLK_##clk_set_##_SET], \
73 .clk_enb_val = CLK_##clk_set_##_##funit_, \
74 }
75
76#define FUNIT_DATA_USB(funit_, clk_set_) \
77 [FUNIT_INDEX(funit_)] = { \
78 .name = STRINGIFY(funit_), \
79 .ctlr_base = (void *)(uintptr_t)TEGRA_##funit_##_BASE, \
80 .dev_control = &clk_data_arr[CLK_##clk_set_##_SET], \
81 .clk_enb_val = CLK_##clk_set_##_##funit_, \
82 }
83
84static const struct funit_cfg_data funit_data[] = {
85 FUNIT_DATA(I2C1, i2c1, L),
86 FUNIT_DATA(I2C2, i2c2, H),
87 FUNIT_DATA(I2C3, i2c3, U),
88 FUNIT_DATA(I2C5, i2c5, H),
89 FUNIT_DATA(I2C6, i2c6, X),
90 FUNIT_DATA(SDMMC1, sdmmc1, L),
91 FUNIT_DATA(SDMMC4, sdmmc4, L),
92 FUNIT_DATA_USB(USBD, L),
93 FUNIT_DATA_USB(USB2, H),
94 FUNIT_DATA(QSPI, qspi, Y),
95 FUNIT_DATA(I2S1, i2s1, L),
96};
97_Static_assert(ARRAY_SIZE(funit_data) == FUNIT_INDEX_MAX,
98 "funit_cfg_data array not filled out!");
99
100static inline uint32_t get_clk_src_freq(uint32_t clk_src_freq_id)
101{
102 uint32_t freq = 0;
103
104 switch (clk_src_freq_id) {
105 case CLK_M:
106 freq = TEGRA_CLK_M_KHZ;
107 break;
108 case PLLP:
109 freq = TEGRA_PLLP_KHZ;
110 break;
111 default:
112 printk(BIOS_SPEW, "%s ERROR: Unknown clk_src %d\n",
113 __func__, clk_src_freq_id);
114 }
115
116 return freq;
117}
118
119static void configure_clock(const struct funit_cfg * const entry,
120 const struct funit_cfg_data * const funit)
121{
122 const char *funit_i2c = "i2c";
123 uint32_t clk_div;
124 uint32_t clk_div_mask;
125 uint32_t clk_src_freq;
126
127 clk_src_freq = get_clk_src_freq(entry->clk_src_freq_id);
128
129 if (strncmp(funit->name, funit_i2c, strlen(funit_i2c)) == 0) {
130 /* I2C funit */
131 clk_div = get_i2c_clk_div(clk_src_freq,
132 entry->clk_dev_freq_khz);
133 clk_div_mask = CLK_DIV_MASK_I2C;
134 } else {
135 /* Non I2C */
136 clk_div = get_clk_div(clk_src_freq, entry->clk_dev_freq_khz);
137 clk_div_mask = CLK_DIV_MASK;
138 }
139
140 _clock_set_div(funit->clk_src_reg, funit->name, clk_div,
141 clk_div_mask, entry->clk_src_id);
142}
143
144static inline int is_usb(uint32_t idx)
145{
146 return (idx == FUNIT_USBD || idx == FUNIT_USB2);
147}
148
149void soc_configure_funits(const struct funit_cfg * const entries, size_t num)
150{
151 size_t i;
152
153 for (i = 0; i < num; i++) {
154 const struct funit_cfg * const entry = &entries[i];
155 const struct funit_cfg_data *funit;
156 const struct clk_dev_control *dev_control;
157 int funit_usb = is_usb(entry->funit_index);
158
159 if (entry->funit_index >= FUNIT_INDEX_MAX) {
160 printk(BIOS_ERR, "Error: Index out of bounds\n");
161 continue;
162 }
163
164 funit = &funit_data[entry->funit_index];
165 dev_control = funit->dev_control;
166
167 /* USB controllers have a fixed clock source. */
168 if (!funit_usb)
169 configure_clock(entry, funit);
170
171 clock_grp_enable_clear_reset(funit->clk_enb_val,
172 dev_control->clk_enb_set,
173 dev_control->rst_dev_clr);
174
175 if (funit_usb)
176 usb_setup_utmip(funit->ctlr_base);
177
178 soc_configure_pads(entry->pad_cfg,entry->pad_cfg_size);
179 }
180}
181
182void __attribute__((weak)) usb_setup_utmip(void *usb_base)
183{
184 /* default empty implementation required if usb.c is not included */
185 printk(BIOS_ERR, "USB setup is not supported in current stage\n");
186}