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review.coreboot.org / coreboot / 3f882fafa069ce3c7cb39bdc80c73ade3f0daa46 / . / util / inteltool / rootcmplx.c
blob: 70d7cbe3ed3035b0f1128d107d0fdbd7d135558c [file] [log] [blame]
Stefan Reinauer23190272008-08-20 13:41:24 +0000[diff] [blame]1/*
2 * inteltool - dump all registers on an Intel CPU + chipset based system.
3 *
Stefan Reinauer14e22772010-04-27 06:56:47 +0000[diff] [blame]4 * Copyright (C) 2008 by coresystems GmbH
5 * written by Stefan Reinauer <stepan@coresystems.de>
6 *
Stefan Reinauer23190272008-08-20 13:41:24 +0000[diff] [blame]7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; version 2 of the License.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
Stefan Reinauer23190272008-08-20 13:41:24 +0000[diff] [blame]15 */
16
Stefan Reinauer23190272008-08-20 13:41:24 +0000[diff] [blame]17#include <stdio.h>
Stefan Reinauer23190272008-08-20 13:41:24 +0000[diff] [blame]18#include <stdlib.h>
Stefan Reinauer23190272008-08-20 13:41:24 +0000[diff] [blame]19#include "inteltool.h"
20
21int print_rcba(struct pci_dev *sb)
22{
23 int i, size = 0x4000;
24 volatile uint8_t *rcba;
25 uint32_t rcba_phys;
26
27 printf("\n============= RCBA ==============\n\n");
28
29 switch (sb->device_id) {
Pat Erleyca3548e2010-04-21 06:23:19 +0000[diff] [blame]30 case PCI_DEVICE_ID_INTEL_ICH6:
Stefan Reinauer23190272008-08-20 13:41:24 +0000[diff] [blame]31 case PCI_DEVICE_ID_INTEL_ICH7:
32 case PCI_DEVICE_ID_INTEL_ICH7M:
33 case PCI_DEVICE_ID_INTEL_ICH7DH:
34 case PCI_DEVICE_ID_INTEL_ICH7MDH:
Warren Turkalf3d3ced2010-09-03 09:33:50 +0000[diff] [blame]35 case PCI_DEVICE_ID_INTEL_ICH8:
36 case PCI_DEVICE_ID_INTEL_ICH8M:
Lubomir Rintel2a13bad2015-03-01 10:14:15 +0100[diff] [blame]37 case PCI_DEVICE_ID_INTEL_ICH8ME:
Anton Kochkovda0b4562010-05-30 12:33:12 +0000[diff] [blame]38 case PCI_DEVICE_ID_INTEL_ICH9DH:
39 case PCI_DEVICE_ID_INTEL_ICH9DO:
40 case PCI_DEVICE_ID_INTEL_ICH9R:
41 case PCI_DEVICE_ID_INTEL_ICH9:
42 case PCI_DEVICE_ID_INTEL_ICH9M:
43 case PCI_DEVICE_ID_INTEL_ICH9ME:
Arthur Heymans026f7df2017-04-10 22:26:13 +0200[diff] [blame]44 case PCI_DEVICE_ID_INTEL_ICH10:
Warren Turkalf3d3ced2010-09-03 09:33:50 +0000[diff] [blame]45 case PCI_DEVICE_ID_INTEL_ICH10R:
Corey Osgoodf366ce02010-08-17 08:33:44 +0000[diff] [blame]46 case PCI_DEVICE_ID_INTEL_NM10:
Sven Schnelle54a5aed2011-10-30 13:30:36 +0100[diff] [blame]47 case PCI_DEVICE_ID_INTEL_I63XX:
Stefan Tauner088f5692013-05-28 11:30:25 +0200[diff] [blame]48 case PCI_DEVICE_ID_INTEL_3400:
49 case PCI_DEVICE_ID_INTEL_3420:
50 case PCI_DEVICE_ID_INTEL_3450:
Stefan Taunerb75a39a2014-11-01 17:12:37 +0100[diff] [blame]51 case PCI_DEVICE_ID_INTEL_3400_DESKTOP:
52 case PCI_DEVICE_ID_INTEL_3400_MOBILE:
53 case PCI_DEVICE_ID_INTEL_3400_MOBILE_SFF:
54 case PCI_DEVICE_ID_INTEL_B55_A:
Stefan Tauner088f5692013-05-28 11:30:25 +0200[diff] [blame]55 case PCI_DEVICE_ID_INTEL_B55_B:
Stefan Taunerb75a39a2014-11-01 17:12:37 +0100[diff] [blame]56 case PCI_DEVICE_ID_INTEL_H55:
57 case PCI_DEVICE_ID_INTEL_H57:
58 case PCI_DEVICE_ID_INTEL_HM55:
59 case PCI_DEVICE_ID_INTEL_HM57:
60 case PCI_DEVICE_ID_INTEL_P55:
61 case PCI_DEVICE_ID_INTEL_PM55:
62 case PCI_DEVICE_ID_INTEL_Q57:
63 case PCI_DEVICE_ID_INTEL_QM57:
64 case PCI_DEVICE_ID_INTEL_QS57:
Nico Huber14290b32013-03-29 19:08:39 +0100[diff] [blame]65 case PCI_DEVICE_ID_INTEL_Z68:
66 case PCI_DEVICE_ID_INTEL_P67:
67 case PCI_DEVICE_ID_INTEL_UM67:
68 case PCI_DEVICE_ID_INTEL_HM65:
69 case PCI_DEVICE_ID_INTEL_H67:
70 case PCI_DEVICE_ID_INTEL_HM67:
71 case PCI_DEVICE_ID_INTEL_Q65:
72 case PCI_DEVICE_ID_INTEL_QS67:
73 case PCI_DEVICE_ID_INTEL_Q67:
74 case PCI_DEVICE_ID_INTEL_QM67:
75 case PCI_DEVICE_ID_INTEL_B65:
76 case PCI_DEVICE_ID_INTEL_C202:
77 case PCI_DEVICE_ID_INTEL_C204:
78 case PCI_DEVICE_ID_INTEL_C206:
79 case PCI_DEVICE_ID_INTEL_H61:
80 case PCI_DEVICE_ID_INTEL_Z77:
81 case PCI_DEVICE_ID_INTEL_Z75:
82 case PCI_DEVICE_ID_INTEL_Q77:
83 case PCI_DEVICE_ID_INTEL_Q75:
84 case PCI_DEVICE_ID_INTEL_B75:
85 case PCI_DEVICE_ID_INTEL_H77:
86 case PCI_DEVICE_ID_INTEL_C216:
87 case PCI_DEVICE_ID_INTEL_QM77:
88 case PCI_DEVICE_ID_INTEL_QS77:
89 case PCI_DEVICE_ID_INTEL_HM77:
90 case PCI_DEVICE_ID_INTEL_UM77:
91 case PCI_DEVICE_ID_INTEL_HM76:
92 case PCI_DEVICE_ID_INTEL_HM75:
93 case PCI_DEVICE_ID_INTEL_HM70:
Alexandru Gagniucf14bd792015-02-17 17:14:31 -0600[diff] [blame]94 case PCI_DEVICE_ID_INTEL_NM70:
Dennis Wassenbergae6685f2014-10-30 10:30:40 +0100[diff] [blame]95 case PCI_DEVICE_ID_INTEL_LYNXPOINT_LP_FULL:
96 case PCI_DEVICE_ID_INTEL_LYNXPOINT_LP_PREM:
97 case PCI_DEVICE_ID_INTEL_LYNXPOINT_LP_BASE:
Youness Alaoui1244a512017-04-13 13:22:33 -0400[diff] [blame]98 case PCI_DEVICE_ID_INTEL_WILDCATPOINT_LP_PREM:
Matt DeVillier5b667df2015-05-14 21:58:33 -0500[diff] [blame]99 case PCI_DEVICE_ID_INTEL_WILDCATPOINT_LP:
qeedb775a622018-06-19 19:52:19 -0400[diff] [blame]100 case PCI_DEVICE_ID_INTEL_C8_MOBILE:
101 case PCI_DEVICE_ID_INTEL_C8_DESKTOP:
102 case PCI_DEVICE_ID_INTEL_Z87:
103 case PCI_DEVICE_ID_INTEL_Z85:
104 case PCI_DEVICE_ID_INTEL_HM86:
105 case PCI_DEVICE_ID_INTEL_H87:
106 case PCI_DEVICE_ID_INTEL_HM87:
107 case PCI_DEVICE_ID_INTEL_Q85:
108 case PCI_DEVICE_ID_INTEL_Q87:
109 case PCI_DEVICE_ID_INTEL_QM87:
110 case PCI_DEVICE_ID_INTEL_B85:
111 case PCI_DEVICE_ID_INTEL_C222:
112 case PCI_DEVICE_ID_INTEL_C224:
113 case PCI_DEVICE_ID_INTEL_C226:
114 case PCI_DEVICE_ID_INTEL_H81:
Felix Singer0a7543d2019-02-19 23:49:11 +0100[diff] [blame]115 case PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_PRE:
116 case PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_U_BASE_SKL:
117 case PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_Y_PREM_SKL:
118 case PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_U_PREM_SKL:
119 case PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_U_BASE_KBL:
120 case PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_U_PREM_KBL:
121 case PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_Y_PREM_KBL:
Matthew Garrett2bf28e52018-07-23 21:09:47 -0700[diff] [blame]122 case PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_U_IHDCP_BASE:
123 case PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_U_IHDCP_PREM:
124 case PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_Y_IHDCP_PREM:
Stefan Reinauer23190272008-08-20 13:41:24 +0000[diff] [blame]125 rcba_phys = pci_read_long(sb, 0xf0) & 0xfffffffe;
126 break;
127 case PCI_DEVICE_ID_INTEL_ICH:
128 case PCI_DEVICE_ID_INTEL_ICH0:
Joseph Smithe10757e2010-06-16 22:21:19 +0000[diff] [blame]129 case PCI_DEVICE_ID_INTEL_ICH2:
Stefan Reinauer23190272008-08-20 13:41:24 +0000[diff] [blame]130 case PCI_DEVICE_ID_INTEL_ICH4:
131 case PCI_DEVICE_ID_INTEL_ICH4M:
Idwer Vollering312fc962010-12-17 22:34:58 +0000[diff] [blame]132 case PCI_DEVICE_ID_INTEL_ICH5:
Stefan Reinauer23190272008-08-20 13:41:24 +0000[diff] [blame]133 printf("This southbridge does not have RCBA.\n");
134 return 1;
135 default:
136 printf("Error: Dumping RCBA on this southbridge is not (yet) supported.\n");
137 return 1;
138 }
139
Stefan Reinauer1162f252008-12-04 15:18:20 +0000[diff] [blame]140 rcba = map_physical(rcba_phys, size);
Stefan Reinauer14e22772010-04-27 06:56:47 +0000[diff] [blame]141
Stefan Reinauer1162f252008-12-04 15:18:20 +0000[diff] [blame]142 if (rcba == NULL) {
Stefan Reinauer23190272008-08-20 13:41:24 +0000[diff] [blame]143 perror("Error mapping RCBA");
144 exit(1);
145 }
146
147 printf("RCBA = 0x%08x (MEM)\n\n", rcba_phys);
148
149 for (i = 0; i < size; i += 4) {
150 if (*(uint32_t *)(rcba + i))
151 printf("0x%04x: 0x%08x\n", i, *(uint32_t *)(rcba + i));
152 }
153
Stefan Reinauer1162f252008-12-04 15:18:20 +0000[diff] [blame]154 unmap_physical((void *)rcba, size);
Stefan Reinauer23190272008-08-20 13:41:24 +0000[diff] [blame]155 return 0;
156}