Tristan Corrick | 3f7de06 | 2018-03-02 03:02:07 +1300 | [diff] [blame^] | 1 | ## |
| 2 | ## This file is part of the coreboot project. |
| 3 | ## |
| 4 | ## Copyright (C) 2017–2018 Tristan Corrick <tristan@corrick.kiwi> |
| 5 | ## |
| 6 | ## This program is free software: you can redistribute it and/or modify |
| 7 | ## it under the terms of the GNU General Public License as published by |
| 8 | ## the Free Software Foundation, either version 2 of the License, or |
| 9 | ## (at your option) any later version. |
| 10 | ## |
| 11 | ## This program is distributed in the hope that it will be useful, |
| 12 | ## but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | ## GNU General Public License for more details. |
| 15 | ## |
| 16 | |
| 17 | chip northbridge/intel/sandybridge |
| 18 | device cpu_cluster 0 on |
| 19 | chip cpu/intel/socket_LGA1155 |
| 20 | device lapic 0 on end |
| 21 | end |
| 22 | chip cpu/intel/model_206ax |
| 23 | register "c1_acpower" = "1" |
| 24 | register "c1_battery" = "1" |
| 25 | register "c2_acpower" = "3" |
| 26 | register "c2_battery" = "3" |
| 27 | register "c3_acpower" = "5" |
| 28 | register "c3_battery" = "5" |
| 29 | device lapic 0xacac off end |
| 30 | end |
| 31 | end |
| 32 | |
| 33 | register "pci_mmio_size" = "2048" |
| 34 | |
| 35 | device domain 0 on |
| 36 | subsystemid 0x1043 0x844d inherit |
| 37 | |
| 38 | device pci 00.0 on end # Host bridge |
| 39 | device pci 01.0 on end # PCIe bridge for discrete graphics |
| 40 | device pci 02.0 on end # VGA controller |
| 41 | |
| 42 | chip southbridge/intel/bd82x6x |
| 43 | register "c2_latency" = "101" |
| 44 | register "gen1_dec" = "0x00000295" # Super I/O HWM |
| 45 | register "p_cnt_throttling_supported" = "1" |
| 46 | register "sata_port_map" = "0x3f" |
| 47 | register "spi_lvscc" = "0x2005" |
| 48 | register "spi_uvscc" = "0x2005" |
| 49 | |
| 50 | device pci 16.0 on end # Management Engine Interface 1 |
| 51 | device pci 16.1 off end # Management Engine Interface 2 |
| 52 | device pci 16.2 off end # Management Engine IDE-R |
| 53 | device pci 16.3 off end # Management Engine KT |
| 54 | device pci 19.0 on # Intel Gigabit Ethernet |
| 55 | subsystemid 0x1043 0x849c |
| 56 | end |
| 57 | device pci 1a.0 on end # USB2 EHCI #2 |
| 58 | device pci 1b.0 on # HD audio controller |
| 59 | subsystemid 0x1043 0x84dc |
| 60 | end |
| 61 | device pci 1c.0 on end # PCIe port #1 |
| 62 | device pci 1c.1 off end # PCIe port #2 |
| 63 | device pci 1c.2 off end # PCIe port #3 |
| 64 | device pci 1c.3 off end # PCIe port #4 |
| 65 | device pci 1c.4 on end # PCIe port #5 |
| 66 | device pci 1c.5 on end # PCIe port #6 |
| 67 | device pci 1c.6 on end # PCIe port #7 |
| 68 | device pci 1c.7 off end # PCIe port #8 |
| 69 | device pci 1d.0 on end # USB2 EHCI #1 |
| 70 | device pci 1e.0 off end # PCI bridge |
| 71 | device pci 1f.0 on # LPC bridge |
| 72 | chip superio/nuvoton/nct6776 |
| 73 | device pnp 2e.0 off end # Floppy |
| 74 | device pnp 2e.1 off end # Parallel |
| 75 | device pnp 2e.2 off end # UART A |
| 76 | device pnp 2e.3 off end # UART B, IR |
| 77 | device pnp 2e.5 on # PS/2 KBC |
| 78 | io 0x60 = 0x0060 |
| 79 | io 0x62 = 0x0064 |
| 80 | irq 0x70 = 1 # Keyboard |
| 81 | irq 0x72 = 12 # Mouse |
| 82 | end |
| 83 | device pnp 2e.6 off end # CIR |
| 84 | device pnp 2e.7 off end # GPIO8 |
| 85 | device pnp 2e.107 off end # GPIO9 |
| 86 | device pnp 2e.8 off end # WDT |
| 87 | device pnp 2e.108 off end # GPIO0 |
| 88 | device pnp 2e.208 off end # GPIOA |
| 89 | device pnp 2e.308 off end # GPIO base |
| 90 | device pnp 2e.109 off end # GPIO1 |
| 91 | device pnp 2e.209 off end # GPIO2 |
| 92 | device pnp 2e.309 off end # GPIO3 |
| 93 | device pnp 2e.409 off end # GPIO4 |
| 94 | device pnp 2e.509 off end # GPIO5 |
| 95 | device pnp 2e.609 off end # GPIO6 |
| 96 | device pnp 2e.709 off end # GPIO7 |
| 97 | device pnp 2e.a off end # ACPI |
| 98 | device pnp 2e.b on # HWM, LED |
| 99 | io 0x60 = 0x0290 |
| 100 | io 0x62 = 0x0200 |
| 101 | end |
| 102 | device pnp 2e.d off end # VID |
| 103 | device pnp 2e.e off end # CIR wake-up |
| 104 | device pnp 2e.f off end # GPIO PP/OD |
| 105 | device pnp 2e.14 off end # SVID |
| 106 | device pnp 2e.16 off end # Deep sleep |
| 107 | device pnp 2e.17 off end # GPIOA |
| 108 | end |
| 109 | end |
| 110 | device pci 1f.2 on end # SATA controller 1 |
| 111 | device pci 1f.3 on end # SMBus |
| 112 | device pci 1f.5 off end # SATA controller 2 |
| 113 | device pci 1f.6 off end # Thermal |
| 114 | end |
| 115 | end |
| 116 | end |