blob: c5b659aa788829b4a1d68645b50264f232637937 [file] [log] [blame]
Felix Held3f3eca92020-01-23 17:12:32 +01001/* SPDX-License-Identifier: GPL-2.0-or-later */
2/* This file is part of the coreboot project. */
Nicola Corna2fca86f2017-03-02 08:08:45 +01003
Nicola Corna2fca86f2017-03-02 08:08:45 +01004#include <device/device.h>
5#include <device/pnp.h>
6#include <superio/conf_mode.h>
Nicola Corna2fca86f2017-03-02 08:08:45 +01007#include <pc80/keyboard.h>
8
9#include "f71808a.h"
10#include "fintek_internal.h"
11
12static void f71808a_init(struct device *dev)
13{
14 if (!dev->enabled)
15 return;
16
17 switch (dev->path.pnp.device) {
18 /* TODO: Might potentially need code for UART, GPIO... */
19 case F71808A_KBC:
20 pc_keyboard_init(NO_AUX_DEVICE);
21 break;
22 case F71808A_HWM:
23 f71808a_multifunc_init(dev);
24 f71808a_hwm_init(dev);
25 break;
26 }
27}
28
29static struct device_operations ops = {
30 .read_resources = pnp_read_resources,
31 .set_resources = pnp_set_resources,
32 .enable_resources = pnp_enable_resources,
33 .enable = pnp_alt_enable,
34 .init = f71808a_init,
35 .ops_pnp_mode = &pnp_conf_mode_8787_aa,
36};
37
38static struct pnp_info pnp_dev_info[] = {
39 /* TODO: Some of the 0x07f8 etc. values may not be correct. */
Felix Held8ac8ac62018-07-06 21:43:34 +020040 { NULL, F71808A_SP1, PNP_IO0 | PNP_IRQ0, 0x07f8, },
41 { NULL, F71808A_HWM, PNP_IO0 | PNP_IRQ0, 0x07f8, },
42 { NULL, F71808A_KBC, PNP_IO0 | PNP_IRQ0 | PNP_IRQ1, 0x07ff, },
43 { NULL, F71808A_GPIO, PNP_IRQ0, },
44 { NULL, F71808A_WDT, PNP_IO0, 0x07f8,},
45 { NULL, F71808A_CIR, PNP_IO0 | PNP_IRQ0, 0x07f8, },
46 { NULL, F71808A_PME, },
Nicola Corna2fca86f2017-03-02 08:08:45 +010047};
48
49static void enable_dev(struct device *dev)
50{
51 pnp_enable_devices(dev, &ops, ARRAY_SIZE(pnp_dev_info), pnp_dev_info);
52}
53
54struct chip_operations superio_fintek_f71808a_ops = {
55 CHIP_NAME("Fintek F71808A Super I/O")
56 .enable_dev = enable_dev
57};