Dan Lykowski | fdbb8d8 | 2009-01-06 00:33:30 +0000 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright (C) 2009 Dynon Avionics |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; either version 2 of the License, or |
| 9 | * (at your option) any later version. |
| 10 | * |
| 11 | * This program is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | * GNU General Public License for more details. |
Dan Lykowski | fdbb8d8 | 2009-01-06 00:33:30 +0000 | [diff] [blame] | 15 | */ |
| 16 | |
Dan Lykowski | fdbb8d8 | 2009-01-06 00:33:30 +0000 | [diff] [blame] | 17 | #include <device/device.h> |
| 18 | #include <device/pnp.h> |
Nico Huber | 1c81128 | 2013-06-15 20:33:44 +0200 | [diff] [blame] | 19 | #include <superio/conf_mode.h> |
Dan Lykowski | fdbb8d8 | 2009-01-06 00:33:30 +0000 | [diff] [blame] | 20 | #include <stdint.h> |
Dan Lykowski | fdbb8d8 | 2009-01-06 00:33:30 +0000 | [diff] [blame] | 21 | #include <pc80/keyboard.h> |
Elyes HAOUAS | 2329a25 | 2019-05-15 22:11:18 +0200 | [diff] [blame] | 22 | |
Dan Lykowski | fdbb8d8 | 2009-01-06 00:33:30 +0000 | [diff] [blame] | 23 | #include "w83627uhg.h" |
| 24 | |
Dan Lykowski | fdbb8d8 | 2009-01-06 00:33:30 +0000 | [diff] [blame] | 25 | /* |
| 26 | * Set the UART clock source. |
| 27 | * |
| 28 | * Possible UART clock source speeds are: |
| 29 | * |
| 30 | * 0 = 1.8462 MHz (default) |
| 31 | * 1 = 2 MHz |
| 32 | * 2 = 24 MHz |
| 33 | * 3 = 14.769 MHz |
| 34 | * |
| 35 | * The faster clocks allow for BAUD rates up to 2mbits. |
| 36 | * |
| 37 | * Warning: The kernel will need to be adjusted since it assumes |
| 38 | * a 1.8462 MHz clock. |
| 39 | */ |
Edward O'Callaghan | f21bdc3 | 2014-10-21 07:43:41 +1100 | [diff] [blame] | 40 | static void set_uart_clock_source(struct device *dev, u8 uart_clock) |
Dan Lykowski | fdbb8d8 | 2009-01-06 00:33:30 +0000 | [diff] [blame] | 41 | { |
| 42 | u8 value; |
| 43 | |
Nico Huber | 13dc976 | 2013-06-15 19:33:15 +0200 | [diff] [blame] | 44 | pnp_enter_conf_mode(dev); |
Dan Lykowski | fdbb8d8 | 2009-01-06 00:33:30 +0000 | [diff] [blame] | 45 | pnp_set_logical_device(dev); |
| 46 | value = pnp_read_config(dev, 0xf0); |
| 47 | value &= ~0x03; |
| 48 | value |= (uart_clock & 0x03); |
| 49 | pnp_write_config(dev, 0xf0, value); |
Nico Huber | 13dc976 | 2013-06-15 19:33:15 +0200 | [diff] [blame] | 50 | pnp_exit_conf_mode(dev); |
Dan Lykowski | fdbb8d8 | 2009-01-06 00:33:30 +0000 | [diff] [blame] | 51 | } |
| 52 | |
Edward O'Callaghan | f21bdc3 | 2014-10-21 07:43:41 +1100 | [diff] [blame] | 53 | static void w83627uhg_init(struct device *dev) |
Dan Lykowski | fdbb8d8 | 2009-01-06 00:33:30 +0000 | [diff] [blame] | 54 | { |
Dan Lykowski | fdbb8d8 | 2009-01-06 00:33:30 +0000 | [diff] [blame] | 55 | |
| 56 | if (!dev->enabled) |
| 57 | return; |
| 58 | |
Elyes HAOUAS | 0ce41f1 | 2018-11-13 10:03:31 +0100 | [diff] [blame] | 59 | switch (dev->path.pnp.device) { |
Zheng Bao | 9db833b | 2009-12-28 09:59:44 +0000 | [diff] [blame] | 60 | case W83627UHG_SP1: |
Dave Frodin | 6c6acd7 | 2013-12-26 08:17:16 -0700 | [diff] [blame] | 61 | set_uart_clock_source(dev, 0); |
Dan Lykowski | fdbb8d8 | 2009-01-06 00:33:30 +0000 | [diff] [blame] | 62 | break; |
| 63 | case W83627UHG_SP2: |
Dave Frodin | 6c6acd7 | 2013-12-26 08:17:16 -0700 | [diff] [blame] | 64 | set_uart_clock_source(dev, 0); |
Dan Lykowski | fdbb8d8 | 2009-01-06 00:33:30 +0000 | [diff] [blame] | 65 | break; |
| 66 | case W83627UHG_SP3: |
Dave Frodin | 6c6acd7 | 2013-12-26 08:17:16 -0700 | [diff] [blame] | 67 | set_uart_clock_source(dev, 0); |
Dan Lykowski | fdbb8d8 | 2009-01-06 00:33:30 +0000 | [diff] [blame] | 68 | break; |
| 69 | case W83627UHG_SP4: |
Dave Frodin | 6c6acd7 | 2013-12-26 08:17:16 -0700 | [diff] [blame] | 70 | set_uart_clock_source(dev, 0); |
Dan Lykowski | fdbb8d8 | 2009-01-06 00:33:30 +0000 | [diff] [blame] | 71 | break; |
| 72 | case W83627UHG_SP5: |
Dave Frodin | 6c6acd7 | 2013-12-26 08:17:16 -0700 | [diff] [blame] | 73 | set_uart_clock_source(dev, 0); |
Dan Lykowski | fdbb8d8 | 2009-01-06 00:33:30 +0000 | [diff] [blame] | 74 | break; |
| 75 | case W83627UHG_SP6: |
Dave Frodin | 6c6acd7 | 2013-12-26 08:17:16 -0700 | [diff] [blame] | 76 | set_uart_clock_source(dev, 0); |
Dan Lykowski | fdbb8d8 | 2009-01-06 00:33:30 +0000 | [diff] [blame] | 77 | break; |
| 78 | case W83627UHG_KBC: |
Timothy Pearson | 448e386 | 2015-11-24 14:12:01 -0600 | [diff] [blame] | 79 | pc_keyboard_init(NO_AUX_DEVICE); |
Dan Lykowski | fdbb8d8 | 2009-01-06 00:33:30 +0000 | [diff] [blame] | 80 | break; |
| 81 | } |
| 82 | } |
| 83 | |
Dan Lykowski | fdbb8d8 | 2009-01-06 00:33:30 +0000 | [diff] [blame] | 84 | static struct device_operations ops = { |
| 85 | .read_resources = pnp_read_resources, |
Nico Huber | 0b2ee93 | 2013-06-15 19:58:35 +0200 | [diff] [blame] | 86 | .set_resources = pnp_set_resources, |
| 87 | .enable_resources = pnp_enable_resources, |
| 88 | .enable = pnp_enable, |
Dan Lykowski | fdbb8d8 | 2009-01-06 00:33:30 +0000 | [diff] [blame] | 89 | .init = w83627uhg_init, |
Nico Huber | 1c81128 | 2013-06-15 20:33:44 +0200 | [diff] [blame] | 90 | .ops_pnp_mode = &pnp_conf_mode_8787_aa, |
Dan Lykowski | fdbb8d8 | 2009-01-06 00:33:30 +0000 | [diff] [blame] | 91 | }; |
| 92 | |
| 93 | static struct pnp_info pnp_dev_info[] = { |
Felix Held | 8c85880 | 2018-07-06 20:22:08 +0200 | [diff] [blame] | 94 | { NULL, W83627UHG_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, 0x07f8, }, |
| 95 | { NULL, W83627UHG_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, 0x07f8, }, |
| 96 | { NULL, W83627UHG_SP1, PNP_IO0 | PNP_IRQ0, 0x07f8, }, |
| 97 | { NULL, W83627UHG_SP2, PNP_IO0 | PNP_IRQ0, 0x07f8, }, |
| 98 | { NULL, W83627UHG_KBC, PNP_IO0 | PNP_IO1 | PNP_IRQ0 | PNP_IRQ1, |
| 99 | 0x07ff, 0x07ff, }, |
| 100 | { NULL, W83627UHG_SP3, PNP_IO0 | PNP_IRQ0, 0x07f8, }, |
| 101 | { NULL, W83627UHG_GPIO3_4, }, |
| 102 | { NULL, W83627UHG_WDTO_PLED_GPIO5_6, }, |
| 103 | { NULL, W83627UHG_GPIO1_2, }, |
| 104 | { NULL, W83627UHG_ACPI, PNP_IRQ0, }, |
| 105 | { NULL, W83627UHG_HWM, PNP_IO0 | PNP_IRQ0, 0x0ff8, }, |
| 106 | { NULL, W83627UHG_PECI_SST, }, |
| 107 | { NULL, W83627UHG_SP4, PNP_IO0 | PNP_IRQ0, 0x07f8, }, |
| 108 | { NULL, W83627UHG_SP5, PNP_IO0 | PNP_IRQ0, 0x07f8, }, |
| 109 | { NULL, W83627UHG_SP6, PNP_IO0 | PNP_IRQ0, 0x07f8, }, |
Dan Lykowski | fdbb8d8 | 2009-01-06 00:33:30 +0000 | [diff] [blame] | 110 | }; |
| 111 | |
Edward O'Callaghan | f21bdc3 | 2014-10-21 07:43:41 +1100 | [diff] [blame] | 112 | static void enable_dev(struct device *dev) |
Dan Lykowski | fdbb8d8 | 2009-01-06 00:33:30 +0000 | [diff] [blame] | 113 | { |
| 114 | pnp_enable_devices(dev, &ops, ARRAY_SIZE(pnp_dev_info), pnp_dev_info); |
| 115 | } |
| 116 | |
| 117 | struct chip_operations superio_winbond_w83627uhg_ops = { |
| 118 | CHIP_NAME("Winbond W83627UHG Super I/O") |
| 119 | .enable_dev = enable_dev, |
| 120 | }; |