blob: 60936a8a42c9ad3874be915cda91dc7d7448be7f [file] [log] [blame]
Arthur Heymans550f55e2022-08-24 14:44:26 +02001/* SPDX-License-Identifier: GPL-2.0-only */
2
3#include <stdbool.h>
4
5#include <console/console.h>
6#include <device/device.h>
7#include <device/resource.h>
8
9#include <defs_iio.h>
10#include <hob_iiouds.h>
11#include <IioPcieConfigUpd.h>
12
13#include <soc/chip_common.h>
14
15/*
16 * Used for IIO stacks for accelerators and other functionality (IOAT).
17 * Those have only integrated PCI endpoints (no bridges) behind the host bridge.
18 */
19
20static struct device_operations ioat_domain_ops = {
21 .read_resources = noop_read_resources,
22 .set_resources = pci_domain_set_resources,
23 .scan_bus = pci_host_bridge_scan_bus,
24};
25
Patrick Rudolph8c99ebc2024-01-19 17:28:47 +010026static void create_ioat_domain(const union xeon_domain_path dp, struct bus *const upstream,
Arthur Heymans550f55e2022-08-24 14:44:26 +020027 const unsigned int bus_base, const unsigned int bus_limit,
28 const resource_t mem32_base, const resource_t mem32_limit,
29 const resource_t mem64_base, const resource_t mem64_limit)
30{
Patrick Rudolph8c99ebc2024-01-19 17:28:47 +010031 union xeon_domain_path new_path = {
32 .domain_path = dp.domain_path
33 };
34 new_path.bus = bus_base;
35
Arthur Heymans550f55e2022-08-24 14:44:26 +020036 struct device_path path = {
37 .type = DEVICE_PATH_DOMAIN,
38 .domain = {
Patrick Rudolph8c99ebc2024-01-19 17:28:47 +010039 .domain = new_path.domain_path,
Arthur Heymans550f55e2022-08-24 14:44:26 +020040 },
41 };
42 struct device *const domain = alloc_dev(upstream, &path);
43 if (!domain)
44 die("%s: out of memory.\n", __func__);
45
46 domain->ops = &ioat_domain_ops;
47
Arthur Heymans3e99ba02024-01-25 22:26:07 +010048 struct bus *const bus = alloc_bus(domain);
Arthur Heymans550f55e2022-08-24 14:44:26 +020049 bus->secondary = bus_base;
50 bus->subordinate = bus->secondary;
51 bus->max_subordinate = bus_limit;
52
53 unsigned int index = 0;
54
55 if (mem32_base <= mem32_limit) {
56 struct resource *const res = new_resource(domain, index++);
57 res->base = mem32_base;
58 res->limit = mem32_limit;
59 res->size = res->limit - res->base + 1;
60 res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED;
61 }
62
63 if (mem64_base <= mem64_limit) {
64 struct resource *const res = new_resource(domain, index++);
65 res->base = mem64_base;
66 res->limit = mem64_limit;
67 res->size = res->limit - res->base + 1;
68 res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED;
69 }
70}
71
Patrick Rudolph8c99ebc2024-01-19 17:28:47 +010072void soc_create_ioat_domains(const union xeon_domain_path path, struct bus *const bus, const STACK_RES *const sr)
Arthur Heymans550f55e2022-08-24 14:44:26 +020073{
Arthur Heymans550f55e2022-08-24 14:44:26 +020074 if (sr->BusLimit < sr->BusBase + HQM_BUS_OFFSET + HQM_RESERVED_BUS) {
75 printk(BIOS_WARNING,
76 "Ignoring IOAT domain with limited bus range.\n");
77 return;
78 }
79
80 if (sr->PciResourceMem64Limit - sr->PciResourceMem64Base + 1
81 < 2 * CPM_MMIO_SIZE + 2 * HQM_MMIO_SIZE) {
82 printk(BIOS_WARNING,
83 "Ignoring IOAT domain with limited 64-bit MMIO window.\n");
84 return;
85 }
86
87 /* The FSP HOB doesn't provide accurate information about the
88 resource allocation. Hence use pre-defined offsets. Based
89 on ACPI code in create_dsdt_dino_resource(), soc_acpi.c: */
90 resource_t mem64_base, mem64_limit, bus_base, bus_limit;
91
92 /* CPM0 */
93 mem64_base = sr->PciResourceMem64Base;
94 mem64_limit = mem64_base + CPM_MMIO_SIZE - 1;
95 bus_base = sr->BusBase + CPM_BUS_OFFSET;
96 bus_limit = bus_base + CPM_RESERVED_BUS;
Patrick Rudolph8c99ebc2024-01-19 17:28:47 +010097 create_ioat_domain(path, bus, bus_base, bus_limit, 0, -1, mem64_base, mem64_limit);
Arthur Heymans550f55e2022-08-24 14:44:26 +020098
99 /* HQM0 */
100 mem64_base = mem64_limit + 1;
101 mem64_limit = mem64_base + HQM_MMIO_SIZE - 1;
102 bus_base = sr->BusBase + HQM_BUS_OFFSET;
103 bus_limit = bus_base + HQM_RESERVED_BUS;
Patrick Rudolph8c99ebc2024-01-19 17:28:47 +0100104 create_ioat_domain(path, bus, bus_base, bus_limit, 0, -1, mem64_base, mem64_limit);
Arthur Heymans550f55e2022-08-24 14:44:26 +0200105
106 /* CPM1 (optional) */
107 mem64_base = mem64_limit + 1;
108 mem64_limit = mem64_base + CPM_MMIO_SIZE - 1;
109 bus_base = sr->BusBase + CPM1_BUS_OFFSET;
110 bus_limit = bus_base + CPM_RESERVED_BUS;
111 if (bus_limit <= sr->BusLimit)
Patrick Rudolph8c99ebc2024-01-19 17:28:47 +0100112 create_ioat_domain(path, bus, bus_base, bus_limit, 0, -1, mem64_base, mem64_limit);
Arthur Heymans550f55e2022-08-24 14:44:26 +0200113
114 /* HQM1 (optional) */
115 mem64_base = mem64_limit + 1;
116 mem64_limit = mem64_base + HQM_MMIO_SIZE - 1;
117 bus_base = sr->BusBase + HQM1_BUS_OFFSET;
118 bus_limit = bus_base + HQM_RESERVED_BUS;
119 if (bus_limit <= sr->BusLimit)
Patrick Rudolph8c99ebc2024-01-19 17:28:47 +0100120 create_ioat_domain(path, bus, bus_base, bus_limit, 0, -1, mem64_base, mem64_limit);
Arthur Heymans550f55e2022-08-24 14:44:26 +0200121
122 /* DINO */
123 mem64_base = mem64_limit + 1;
124 mem64_limit = sr->PciResourceMem64Limit;
125 bus_base = sr->BusBase;
126 bus_limit = bus_base;
Patrick Rudolph8c99ebc2024-01-19 17:28:47 +0100127 create_ioat_domain(path, bus, bus_base, bus_limit, sr->PciResourceMem32Base, sr->PciResourceMem32Limit,
Arthur Heymans550f55e2022-08-24 14:44:26 +0200128 mem64_base, mem64_limit);
129}