blob: 36d47542ba425c72aa26af7371e2d60e124f8094 [file] [log] [blame]
Uwe Hermannb7fec822009-08-25 12:25:36 +00001##
2## This file is part of the coreboot project.
3##
4## Copyright (C) 2009 Uwe Hermann <uwe@hermann-uwe.de>
5##
6## This program is free software; you can redistribute it and/or modify
7## it under the terms of the GNU General Public License as published by
Nils Jacobsdd6ad342010-05-14 09:48:05 +00008## the Free Software Foundation; version 2 of the License.
Uwe Hermannb7fec822009-08-25 12:25:36 +00009##
10## This program is distributed in the hope that it will be useful,
11## but WITHOUT ANY WARRANTY; without even the implied warranty of
12## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13## GNU General Public License for more details.
14##
Uwe Hermannb7fec822009-08-25 12:25:36 +000015
16config NORTHBRIDGE_INTEL_I440BX
17 bool
Kyösti Mälkki3d15e102016-11-29 16:46:56 +020018 select NO_MMCONF_SUPPORT
Jens Rottmann0d11f2d2010-08-26 12:46:02 +000019 select HAVE_DEBUG_RAM_SETUP
Kyösti Mälkki3bf38542014-12-18 22:22:04 +020020 select LATE_CBMEM_INIT
Stefan Reinauer3d840d02016-02-24 11:01:54 -080021 select UDELAY_IO
Patrick Georgi88f55b22009-09-25 18:43:02 +000022
Keith Hui9c1e1f02010-03-13 20:16:48 +000023config SDRAMPWR_4DIMM
24 bool
25 depends on NORTHBRIDGE_INTEL_I440BX
26 default n
27 help
28 This option affects how the SDRAMC register is programmed.
29 Memory clock signals will not be routed properly if this option
30 is set wrong.
Stefan Reinauer14e22772010-04-27 06:56:47 +000031
Keith Hui9c1e1f02010-03-13 20:16:48 +000032 If your board has 4 DIMM slots, you must use select this option, in
33 your Kconfig file of the board. On boards with 3 DIMM slots,
34 do _not_ select this option.