Patrick Georgi | ac95903 | 2020-05-05 22:49:26 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-or-later */ |
Jonathan Zhang | 8f89549 | 2020-01-16 11:16:45 -0800 | [diff] [blame] | 2 | |
| 3 | #include <assert.h> |
Marc Jones | 63e2a84 | 2020-12-02 11:33:02 -0700 | [diff] [blame] | 4 | #include <intelblocks/acpi.h> |
Patrick Rudolph | 40e0748 | 2024-02-23 09:23:41 +0100 | [diff] [blame] | 5 | #include <soc/chip_common.h> |
Jonathan Zhang | 8f89549 | 2020-01-16 11:16:45 -0800 | [diff] [blame] | 6 | #include <soc/pci_devs.h> |
Marc Jones | 18960ce | 2020-11-02 12:41:12 -0700 | [diff] [blame] | 7 | #include <soc/util.h> |
Arthur Heymans | 8a3e2b8 | 2022-12-02 12:42:27 +0100 | [diff] [blame] | 8 | #include <stdint.h> |
Maximilian Brune | b3e336c | 2023-09-16 19:49:39 +0200 | [diff] [blame] | 9 | #include <stdlib.h> |
Marc Jones | 9f55574 | 2020-09-24 16:35:56 -0600 | [diff] [blame] | 10 | |
Marc Jones | 31ed885 | 2021-01-15 13:29:14 -0700 | [diff] [blame] | 11 | #include "chip.h" |
| 12 | |
| 13 | /* |
| 14 | * List of supported C-states in this processor. |
| 15 | */ |
| 16 | enum { |
| 17 | C_STATE_C1, /* 0 */ |
| 18 | C_STATE_C3, /* 1 */ |
| 19 | C_STATE_C6, /* 2 */ |
| 20 | C_STATE_C7, /* 3 */ |
| 21 | NUM_C_STATES |
| 22 | }; |
| 23 | |
| 24 | static const acpi_cstate_t cstate_map[NUM_C_STATES] = { |
| 25 | [C_STATE_C1] = { |
| 26 | /* C1 */ |
| 27 | .latency = 1, |
| 28 | .power = 0x3e8, |
| 29 | .resource = MWAIT_RES(0, 0), |
| 30 | }, |
| 31 | [C_STATE_C3] = { |
| 32 | /* C3 */ |
| 33 | .latency = 15, |
| 34 | .power = 0x1f4, |
| 35 | .resource = MWAIT_RES(1, 0), |
| 36 | }, |
| 37 | [C_STATE_C6] = { |
| 38 | /* C6 */ |
| 39 | .latency = 41, |
| 40 | .power = 0x15e, |
| 41 | .resource = MWAIT_RES(2, 0), |
| 42 | }, |
| 43 | [C_STATE_C7] = { |
| 44 | /* C7 */ |
| 45 | .latency = 41, |
| 46 | .power = 0x0c8, |
| 47 | .resource = MWAIT_RES(3, 0), |
| 48 | } |
| 49 | }; |
| 50 | |
| 51 | /* Max states supported */ |
| 52 | static int cstate_set_all[] = { |
| 53 | C_STATE_C1, |
| 54 | C_STATE_C3, |
| 55 | C_STATE_C6, |
| 56 | C_STATE_C7 |
| 57 | }; |
| 58 | |
| 59 | static int cstate_set_c1_c6[] = { |
| 60 | C_STATE_C1, |
| 61 | C_STATE_C6, |
| 62 | }; |
| 63 | |
Angel Pons | e9f10ff | 2021-10-17 13:28:23 +0200 | [diff] [blame] | 64 | const acpi_cstate_t *soc_get_cstate_map(size_t *entries) |
Marc Jones | 9f55574 | 2020-09-24 16:35:56 -0600 | [diff] [blame] | 65 | { |
Marc Jones | 31ed885 | 2021-01-15 13:29:14 -0700 | [diff] [blame] | 66 | static acpi_cstate_t map[ARRAY_SIZE(cstate_set_all)]; |
| 67 | int *cstate_set; |
| 68 | int i; |
| 69 | |
| 70 | const config_t *config = config_of_soc(); |
| 71 | |
| 72 | const enum acpi_cstate_mode states = config->cstate_states; |
| 73 | |
| 74 | switch (states) { |
| 75 | case CSTATES_C1C6: |
| 76 | *entries = ARRAY_SIZE(cstate_set_c1_c6); |
| 77 | cstate_set = cstate_set_c1_c6; |
| 78 | break; |
| 79 | case CSTATES_ALL: |
| 80 | default: |
| 81 | *entries = ARRAY_SIZE(cstate_set_all); |
| 82 | cstate_set = cstate_set_all; |
| 83 | break; |
| 84 | } |
| 85 | |
| 86 | for (i = 0; i < *entries; i++) { |
| 87 | map[i] = cstate_map[cstate_set[i]]; |
| 88 | map[i].ctype = i + 1; |
| 89 | } |
| 90 | return map; |
Marc Jones | 9f55574 | 2020-09-24 16:35:56 -0600 | [diff] [blame] | 91 | } |
| 92 | |
Shuo Liu | 37a2fb5 | 2024-04-02 22:10:20 +0800 | [diff] [blame^] | 93 | #if CONFIG(XEON_SP_HAVE_IIO_IOAPIC) |
Arthur Heymans | 8a3e2b8 | 2022-12-02 12:42:27 +0100 | [diff] [blame] | 94 | static uintptr_t xeonsp_ioapic_bases[CONFIG(XEON_SP_HAVE_IIO_IOAPIC) * 8 + 1]; |
Arthur Heymans | c7eebac | 2020-11-06 12:25:28 +0100 | [diff] [blame] | 95 | |
Arthur Heymans | 8a3e2b8 | 2022-12-02 12:42:27 +0100 | [diff] [blame] | 96 | size_t soc_get_ioapic_info(const uintptr_t *ioapic_bases[]) |
Marc Jones | 9f55574 | 2020-09-24 16:35:56 -0600 | [diff] [blame] | 97 | { |
Arthur Heymans | 8a3e2b8 | 2022-12-02 12:42:27 +0100 | [diff] [blame] | 98 | int index = 0; |
Arthur Heymans | 7598b4b | 2020-11-06 12:33:35 +0100 | [diff] [blame] | 99 | const IIO_UDS *hob = get_iio_uds(); |
Marc Jones | 9f55574 | 2020-09-24 16:35:56 -0600 | [diff] [blame] | 100 | |
Arthur Heymans | 8a3e2b8 | 2022-12-02 12:42:27 +0100 | [diff] [blame] | 101 | *ioapic_bases = xeonsp_ioapic_bases; |
Christian Walter | 106def9 | 2022-06-29 18:23:51 +0200 | [diff] [blame] | 102 | |
Patrick Rudolph | abc2744 | 2024-03-12 14:48:16 +0100 | [diff] [blame] | 103 | for (int socket = 0; socket < CONFIG_MAX_SOCKET; socket++) { |
Patrick Rudolph | ac02857 | 2023-07-14 17:44:33 +0200 | [diff] [blame] | 104 | if (!soc_cpu_is_enabled(socket)) |
| 105 | continue; |
Arthur Heymans | 7598b4b | 2020-11-06 12:33:35 +0100 | [diff] [blame] | 106 | for (int stack = 0; stack < MAX_IIO_STACK; ++stack) { |
| 107 | const STACK_RES *ri = |
| 108 | &hob->PlatformData.IIO_resource[socket].StackRes[stack]; |
Arthur Heymans | 8a3e2b8 | 2022-12-02 12:42:27 +0100 | [diff] [blame] | 109 | uint32_t ioapic_base = ri->IoApicBase; |
Arthur Heymans | 470f1d3 | 2023-08-31 18:19:09 +0200 | [diff] [blame] | 110 | if (ioapic_base == 0 || ioapic_base == 0xFFFFFFFF) |
| 111 | continue; |
Arthur Heymans | 8a3e2b8 | 2022-12-02 12:42:27 +0100 | [diff] [blame] | 112 | assert(index < ARRAY_SIZE(xeonsp_ioapic_bases)); |
| 113 | xeonsp_ioapic_bases[index++] = ioapic_base; |
| 114 | if (!CONFIG(XEON_SP_HAVE_IIO_IOAPIC)) |
| 115 | return index; |
Arthur Heymans | 7598b4b | 2020-11-06 12:33:35 +0100 | [diff] [blame] | 116 | /* |
| 117 | * Stack 0 has non-PCH IOAPIC and PCH IOAPIC. |
Arthur Heymans | 77038b1 | 2020-11-06 12:59:46 +0100 | [diff] [blame] | 118 | * The IIO IOAPIC is placed at 0x1000 from the reported base. |
Arthur Heymans | 7598b4b | 2020-11-06 12:33:35 +0100 | [diff] [blame] | 119 | */ |
Arthur Heymans | 8a3e2b8 | 2022-12-02 12:42:27 +0100 | [diff] [blame] | 120 | if (socket == 0 && stack == 0) { |
| 121 | ioapic_base += 0x1000; |
| 122 | assert(index < ARRAY_SIZE(xeonsp_ioapic_bases)); |
| 123 | xeonsp_ioapic_bases[index++] = ioapic_base; |
| 124 | } |
Jonathan Zhang | 8f89549 | 2020-01-16 11:16:45 -0800 | [diff] [blame] | 125 | } |
| 126 | } |
Marc Jones | 9f55574 | 2020-09-24 16:35:56 -0600 | [diff] [blame] | 127 | |
Arthur Heymans | 8a3e2b8 | 2022-12-02 12:42:27 +0100 | [diff] [blame] | 128 | return index; |
Marc Jones | 9f55574 | 2020-09-24 16:35:56 -0600 | [diff] [blame] | 129 | } |
Shuo Liu | 37a2fb5 | 2024-04-02 22:10:20 +0800 | [diff] [blame^] | 130 | #endif |
Patrick Rudolph | 40e0748 | 2024-02-23 09:23:41 +0100 | [diff] [blame] | 131 | |
| 132 | void iio_domain_set_acpi_name(struct device *dev, const char *prefix) |
| 133 | { |
| 134 | const union xeon_domain_path dn = { |
| 135 | .domain_path = dev->path.domain.domain |
| 136 | }; |
| 137 | |
| 138 | assert(dn.socket < CONFIG_MAX_SOCKET); |
| 139 | assert(dn.stack < 16); |
| 140 | assert(prefix != NULL && strlen(prefix) == 2); |
| 141 | |
| 142 | if (dn.socket >= CONFIG_MAX_SOCKET || dn.stack >= 16 || |
| 143 | !prefix || strlen(prefix) != 2) |
| 144 | return; |
| 145 | |
| 146 | char *name = xmalloc(ACPI_NAME_BUFFER_SIZE); |
| 147 | snprintf(name, ACPI_NAME_BUFFER_SIZE, "%s%1X%1X", prefix, dn.socket, dn.stack); |
| 148 | dev->name = name; |
| 149 | } |
| 150 | |
| 151 | const char *soc_acpi_name(const struct device *dev) |
| 152 | { |
| 153 | if (dev->path.type == DEVICE_PATH_DOMAIN) |
| 154 | return dev->name; |
| 155 | |
| 156 | /* FIXME: Add SoC specific device names here */ |
| 157 | |
| 158 | return NULL; |
| 159 | } |