Marc Jones | 738347e | 2010-09-13 19:24:38 +0000 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright (C) 2010 Advanced Micro Devices, Inc. |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; version 2 of the License. |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
Marc Jones | 738347e | 2010-09-13 19:24:38 +0000 | [diff] [blame] | 14 | */ |
| 15 | |
| 16 | /* This file defines the processor and performance state capability |
| 17 | * for each core in the system. It is included into the DSDT for each |
| 18 | * core. It assumes that each core of the system has the same performance |
| 19 | * characteristics. |
| 20 | */ |
| 21 | /* |
Elyes HAOUAS | 6d19a20 | 2018-11-22 11:15:29 +0100 | [diff] [blame] | 22 | #include <arch/acpi.h> |
| 23 | DefinitionBlock ("DSDT.AML", "DSDT", 0x01, OEM_ID, ACPI_TABLE_CREATOR, 0x00010001) |
Marc Jones | 738347e | 2010-09-13 19:24:38 +0000 | [diff] [blame] | 24 | { |
Elyes HAOUAS | 36fcc85 | 2019-10-24 15:22:32 +0200 | [diff] [blame^] | 25 | Scope (\_PR) { |
| 26 | Device (CPU0) { |
| 27 | Name (_HID, "ACPI0007") |
| 28 | Name (_UID, 0) |
Marc Jones | 738347e | 2010-09-13 19:24:38 +0000 | [diff] [blame] | 29 | #include "cpstate.asl" |
| 30 | } |
Elyes HAOUAS | 36fcc85 | 2019-10-24 15:22:32 +0200 | [diff] [blame^] | 31 | Device (CPU1) { |
| 32 | Name (_HID, "ACPI0007") |
| 33 | Name (_UID, 1) |
Marc Jones | 738347e | 2010-09-13 19:24:38 +0000 | [diff] [blame] | 34 | #include "cpstate.asl" |
| 35 | } |
Elyes HAOUAS | 36fcc85 | 2019-10-24 15:22:32 +0200 | [diff] [blame^] | 36 | Device (CPU2) { |
| 37 | Name (_HID, "ACPI0007") |
| 38 | Name (_UID, 2) |
Marc Jones | 738347e | 2010-09-13 19:24:38 +0000 | [diff] [blame] | 39 | #include "cpstate.asl" |
| 40 | } |
Elyes HAOUAS | 36fcc85 | 2019-10-24 15:22:32 +0200 | [diff] [blame^] | 41 | Device (CPU3) { |
| 42 | Name (_HID, "ACPI0007") |
| 43 | Name (_UID, 3) |
Marc Jones | 738347e | 2010-09-13 19:24:38 +0000 | [diff] [blame] | 44 | #include "cpstate.asl" |
| 45 | } |
| 46 | } |
| 47 | */ |
| 48 | /* P-state support: The maximum number of P-states supported by the */ |
| 49 | /* CPUs we'll use is 6. */ |
| 50 | /* Get from AMI BIOS. */ |
| 51 | Name(_PSS, Package(){ |
| 52 | Package () |
| 53 | { |
| 54 | 0x00000AF0, |
| 55 | 0x0000BF81, |
| 56 | 0x00000002, |
| 57 | 0x00000002, |
| 58 | 0x00000000, |
| 59 | 0x00000000 |
| 60 | }, |
| 61 | |
| 62 | Package () |
| 63 | { |
| 64 | 0x00000578, |
| 65 | 0x000076F2, |
| 66 | 0x00000002, |
| 67 | 0x00000002, |
| 68 | 0x00000001, |
| 69 | 0x00000001 |
| 70 | } |
| 71 | }) |
| 72 | |
| 73 | Name(_PCT, Package(){ |
| 74 | ResourceTemplate(){Register(FFixedHW, 0, 0, 0)}, |
| 75 | ResourceTemplate(){Register(FFixedHW, 0, 0, 0)} |
| 76 | }) |
| 77 | |
| 78 | Method(_PPC, 0){ |
| 79 | Return(0) |
| 80 | } |