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Angel Ponsf5627e82020-04-05 15:46:52 +02001/* SPDX-License-Identifier: GPL-2.0-only */
Bora Guvendik5d11cc92017-09-25 14:33:17 -07002
Lijian Zhao51605e22018-02-20 14:37:03 -08003#include <soc/pcr_ids.h>
4
Bora Guvendik5d11cc92017-09-25 14:33:17 -07005Scope (\_SB.PCI0) {
Bora Guvendik2a50a1f2018-03-19 17:15:20 -07006
7 /*
8 * Clear register 0x1C20/0x4820
9 * Arg0 - PCR Port ID
10 */
11 Method(SCSC, 1, Serialized)
12 {
13 ^PCRA (Arg0, 0x1C20, 0x0)
14 ^PCRA (Arg0, 0x4820, 0x0)
15 }
16
Lijian Zhao21573e92017-11-08 19:21:32 -080017 /* EMMC */
18 Device(PEMC) {
19 Name(_ADR, 0x001A0000)
Subrata Banik1014de62018-01-18 15:26:20 +053020 Name (_DDN, "eMMC Controller")
Subrata Banikd99f9d52018-01-18 15:13:53 +053021 Name (TEMP, 0)
Kane Chend2b2be32020-04-13 20:48:54 +080022 Name (DSUU, ToUUID("f6c13ea5-65cd-461f-ab7a-29f7e8d5bd61"))
Lijian Zhao21573e92017-11-08 19:21:32 -080023
24 OperationRegion(SCSR, PCI_Config, 0x00, 0x100)
25 Field(SCSR, WordAcc, NoLock, Preserve) {
Elyes HAOUAS48a6c012020-07-08 09:22:13 +020026 VDID, 32, /* PCI VID DID */
Subrata Banikd99f9d52018-01-18 15:13:53 +053027 Offset (0x84), /* PMECTRLSTATUS */
28 PMCR, 16,
29 Offset (0xA2), /* PG_CONFIG */
Lijian Zhao21573e92017-11-08 19:21:32 -080030 , 2,
Subrata Banikd99f9d52018-01-18 15:13:53 +053031 PGEN, 1, /* PG_ENABLE */
Lijian Zhao21573e92017-11-08 19:21:32 -080032 }
33
Bora Guvendik2a50a1f2018-03-19 17:15:20 -070034 Method(_INI) {
35 /* Clear register 0x1C20/0x4820 */
36 ^^SCSC (PID_EMMC)
37 }
38
Lijian Zhao21573e92017-11-08 19:21:32 -080039 Method(_PS0, 0, Serialized) {
Subrata Banikd99f9d52018-01-18 15:13:53 +053040 Stall (50) // Sleep 50 us
41
Felix Singer3dc4d842022-12-12 07:36:41 +010042 PGEN = 0 // Disable PG
Subrata Banikd99f9d52018-01-18 15:13:53 +053043
Lijian Zhao51605e22018-02-20 14:37:03 -080044 /* Clear register 0x1C20/0x4820 */
Bora Guvendik2a50a1f2018-03-19 17:15:20 -070045 ^^SCSC (PID_EMMC)
Lijian Zhao51605e22018-02-20 14:37:03 -080046
Subrata Banikd99f9d52018-01-18 15:13:53 +053047 /* Set Power State to D0 */
Felix Singer35e65a82022-12-16 07:11:17 +010048 PMCR &= 0xFFFC
Felix Singer3dc4d842022-12-12 07:36:41 +010049 ^TEMP = PMCR
Lijian Zhao21573e92017-11-08 19:21:32 -080050 }
51
52 Method(_PS3, 0, Serialized) {
Felix Singer3dc4d842022-12-12 07:36:41 +010053 PGEN = 1 // Enable PG
Subrata Banikd99f9d52018-01-18 15:13:53 +053054
55 /* Set Power State to D3 */
Felix Singer86bc2e72022-12-16 04:40:39 +010056 PMCR |= 3
Felix Singer3dc4d842022-12-12 07:36:41 +010057 ^TEMP = PMCR
Lijian Zhao21573e92017-11-08 19:21:32 -080058 }
Subrata Banik1014de62018-01-18 15:26:20 +053059
60 Device (CARD)
61 {
62 Name (_ADR, 0x00000008)
63 Method (_RMV, 0, NotSerialized)
64 {
65 Return (0)
66 }
67 }
Kane Chend2b2be32020-04-13 20:48:54 +080068 /* _DSM x86 Device Specific Method
69 * Arg0: UUID Unique function identifier
70 * Arg1: Integer Revision Level
71 * Arg2: Integer Function Index (0 = Return Supported Functions)
72 * Arg3: Package Parameters
73 */
74 Method (_DSM, 4)
75 {
Felix Singer5c956042022-01-02 01:09:03 +010076 If (Arg0 == ^DSUU) {
Kane Chend2b2be32020-04-13 20:48:54 +080077 /* Check the revision */
Felix Singerd62f3aa2022-01-02 02:16:23 +010078 If (Arg1 >= 0) {
Kane Chend2b2be32020-04-13 20:48:54 +080079 /*
80 * Function Index 0 the return value is a buffer
81 * containing one bit for each function index, starting
82 * with zero.
83 * Bit 0 - Indicates whether there is support for any
Elyes HAOUASbda27cd2020-06-27 07:17:16 +020084 * functions other than function 0
Kane Chend2b2be32020-04-13 20:48:54 +080085 * Bit 1 - Indicates support to clear power control
86 * register
87 * Bit 2 - Indicates support to set power control
88 * register
89 * Bit 3 - Indicates support to set 1.8V signalling
90 * Bit 4 - Indicates support to set 3.3V signalling
91 * Bit 5 - Indicates support for HS200 mode
92 * Bit 6 - Indicates support for HS400 mode
93 * Bit 9 - Indicates eMMC I/O Driver Strength
94 */
Felix Singer5c956042022-01-02 01:09:03 +010095 If (Arg2 == 0) {
96 If (VDID == 0x02c48086) {
Kane Chend2b2be32020-04-13 20:48:54 +080097 /*
98 * Set bit 9 for CML eMMC to indicate
99 * eMMC I/O driver strength is supported
100 */
101 Return(Buffer() {0x0, 0x02})
102 }
103
104 }
105 /*
106 * Function Index 9, the return value is preferred eMMC
107 * driver strength
108 * 0 - 50 ohm
109 * 1 - 33 ohm
110 * 2 - 66 ohm
111 * 3 - 100 ohm
112 * 4 - 40 ohm
113 */
Felix Singer5c956042022-01-02 01:09:03 +0100114 If (Arg2 == 9) {
Kane Chend2b2be32020-04-13 20:48:54 +0800115 Return(Buffer() {0x4})
116 }
117 }
118 }
119 Return(Buffer() { 0x0 })
120 }
Lijian Zhao21573e92017-11-08 19:21:32 -0800121 }
Bora Guvendik5d11cc92017-09-25 14:33:17 -0700122
123 /* SD CARD */
124 Device (SDXC)
125 {
126 Name (_ADR, 0x00140005)
Subrata Banik1014de62018-01-18 15:26:20 +0530127 Name (_DDN, "SD Controller")
Subrata Banika9712542018-01-18 15:20:21 +0530128 Name (TEMP, 0)
V Sowmya3c8c81b2019-03-19 19:55:14 +0530129 Name (DSUU, ToUUID("f6c13ea5-65cd-461f-ab7a-29f7e8d5bd61"))
Bora Guvendik5d11cc92017-09-25 14:33:17 -0700130
Vaibhav Shankar6fd5a792017-11-16 17:46:48 -0800131 OperationRegion (SDPC, PCI_Config, 0x00, 0x100)
132 Field (SDPC, WordAcc, NoLock, Preserve)
133 {
Subrata Banika9712542018-01-18 15:20:21 +0530134 Offset (0x84), /* PMECTRLSTATUS */
135 PMCR, 16,
136 Offset (0xA2), /* PG_CONFIG */
Vaibhav Shankar6fd5a792017-11-16 17:46:48 -0800137 , 2,
Subrata Banika9712542018-01-18 15:20:21 +0530138 PGEN, 1, /* PG_ENABLE */
Vaibhav Shankar6fd5a792017-11-16 17:46:48 -0800139 }
140
V Sowmya3c8c81b2019-03-19 19:55:14 +0530141 /* _DSM x86 Device Specific Method
142 * Arg0: UUID Unique function identifier
143 * Arg1: Integer Revision Level
144 * Arg2: Integer Function Index (0 = Return Supported Functions)
145 * Arg3: Package Parameters
146 */
147 Method (_DSM, 4)
148 {
Felix Singer5c956042022-01-02 01:09:03 +0100149 If (Arg0 == ^DSUU) {
V Sowmya3c8c81b2019-03-19 19:55:14 +0530150 /* Check the revision */
Felix Singerd62f3aa2022-01-02 02:16:23 +0100151 If (Arg1 >= 0) {
V Sowmya3c8c81b2019-03-19 19:55:14 +0530152 /*
153 * Function Index 0 the return value is a buffer containing
154 * one bit for each function index, starting with zero.
155 * Bit 0 - Indicates whether there is support for any functions other than function 0.
156 * Bit 1 - Indicates support to clear power control register
157 * Bit 2 - Indicates support to set power control register
158 * Bit 3 - Indicates support to set 1.8V signalling
159 * Bit 4 - Indicates support to set 3.3V signalling
160 * Bit 5 - Indicates support for HS200 mode
161 * Bit 6 - Indicates support for HS400 mode
162 * Bit 9 - Indicates eMMC I/O Driver Strength
163 */
164 /*
165 * For SD we have to support functions to
166 * set 1.8V signalling and 3.3V signalling [BIT4, BIT3]
167 */
Felix Singer5c956042022-01-02 01:09:03 +0100168 If (Arg2 == 0) {
V Sowmya3c8c81b2019-03-19 19:55:14 +0530169 Return (Buffer () { 0x19 })
170 }
V Sowmya3c8c81b2019-03-19 19:55:14 +0530171 /*
172 * Function Index 3: Set 1.8v signalling.
173 * We put a sleep of 100ms in this method to
174 * work around a known issue with detecting
175 * UHS SD card on PCH. This is to compensate
176 * for the SD VR slowness.
177 */
Felix Singer5c956042022-01-02 01:09:03 +0100178 If (Arg2 == 3) {
V Sowmya3c8c81b2019-03-19 19:55:14 +0530179 Sleep (100)
180 Return(Buffer () { 0x00 })
181 }
182 /*
183 * Function Index 4: Set 3.3v signalling.
184 * We put a sleep of 100ms in this method to
185 * work around a known issue with detecting
186 * UHS SD card on PCH. This is to compensate
187 * for the SD VR slowness.
188 */
Felix Singer5c956042022-01-02 01:09:03 +0100189 If (Arg2 == 4) {
V Sowmya3c8c81b2019-03-19 19:55:14 +0530190 Sleep (100)
191 Return(Buffer () { 0x00 })
192 }
V Sowmya3c8c81b2019-03-19 19:55:14 +0530193 }
194 }
195 Return(Buffer() { 0x0 })
196 }
197
Bora Guvendik2a50a1f2018-03-19 17:15:20 -0700198 Method(_INI)
199 {
200 /* Clear register 0x1C20/0x4820 */
201 ^^SCSC (PID_SDX)
202 }
203
Vaibhav Shankar6fd5a792017-11-16 17:46:48 -0800204 Method (_PS0, 0, Serialized)
205 {
Felix Singer3dc4d842022-12-12 07:36:41 +0100206 PGEN = 0 /* Disable PG */
Subrata Banika9712542018-01-18 15:20:21 +0530207
Lijian Zhao51605e22018-02-20 14:37:03 -0800208 /* Clear register 0x1C20/0x4820 */
Bora Guvendik2a50a1f2018-03-19 17:15:20 -0700209 ^^SCSC (PID_SDX)
Lijian Zhao51605e22018-02-20 14:37:03 -0800210
Subrata Banika9712542018-01-18 15:20:21 +0530211 /* Set Power State to D0 */
Felix Singer35e65a82022-12-16 07:11:17 +0100212 PMCR &= 0xFFFC
Felix Singer3dc4d842022-12-12 07:36:41 +0100213 ^TEMP = PMCR
Rizwan Qureshi8aadab72019-02-17 11:31:21 +0530214
Julius Wernercd49cce2019-03-05 16:53:33 -0800215#if CONFIG(MB_HAS_ACTIVE_HIGH_SD_PWR_ENABLE)
Rizwan Qureshi8aadab72019-02-17 11:31:21 +0530216 /* Change pad mode to Native */
217 GPMO(SD_PWR_EN_PIN, 0x1)
218#endif
Vaibhav Shankar6fd5a792017-11-16 17:46:48 -0800219 }
220
221 Method (_PS3, 0, Serialized)
222 {
Felix Singer3dc4d842022-12-12 07:36:41 +0100223 PGEN = 1 /* Enable PG */
Subrata Banika9712542018-01-18 15:20:21 +0530224
225 /* Set Power State to D3 */
Felix Singer86bc2e72022-12-16 04:40:39 +0100226 PMCR |= 3
Felix Singer3dc4d842022-12-12 07:36:41 +0100227 ^TEMP = PMCR
Rizwan Qureshi8aadab72019-02-17 11:31:21 +0530228
Julius Wernercd49cce2019-03-05 16:53:33 -0800229#if CONFIG(MB_HAS_ACTIVE_HIGH_SD_PWR_ENABLE)
Rizwan Qureshi8aadab72019-02-17 11:31:21 +0530230 /* Change pad mode to GPIO control */
231 GPMO(SD_PWR_EN_PIN, 0x0)
232
233 /* Enable Tx Buffer */
234 GTXE(SD_PWR_EN_PIN, 0x1)
235
236 /* Drive TX to zero */
237 CTXS(SD_PWR_EN_PIN)
238#endif
Vaibhav Shankar6fd5a792017-11-16 17:46:48 -0800239 }
Subrata Banik1014de62018-01-18 15:26:20 +0530240
241 Device (CARD)
242 {
243 Name (_ADR, 0x00000008)
244 Method (_RMV, 0, NotSerialized)
245 {
246 Return (1)
247 }
248 }
Bora Guvendik5d11cc92017-09-25 14:33:17 -0700249 } /* Device (SDXC) */
250}