Angel Pons | f5627e8 | 2020-04-05 15:46:52 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
Bora Guvendik | 5d11cc9 | 2017-09-25 14:33:17 -0700 | [diff] [blame] | 2 | |
Lijian Zhao | 51605e2 | 2018-02-20 14:37:03 -0800 | [diff] [blame] | 3 | #include <soc/pcr_ids.h> |
| 4 | |
Bora Guvendik | 5d11cc9 | 2017-09-25 14:33:17 -0700 | [diff] [blame] | 5 | Scope (\_SB.PCI0) { |
Bora Guvendik | 2a50a1f | 2018-03-19 17:15:20 -0700 | [diff] [blame] | 6 | |
| 7 | /* |
| 8 | * Clear register 0x1C20/0x4820 |
| 9 | * Arg0 - PCR Port ID |
| 10 | */ |
| 11 | Method(SCSC, 1, Serialized) |
| 12 | { |
| 13 | ^PCRA (Arg0, 0x1C20, 0x0) |
| 14 | ^PCRA (Arg0, 0x4820, 0x0) |
| 15 | } |
| 16 | |
Lijian Zhao | 21573e9 | 2017-11-08 19:21:32 -0800 | [diff] [blame] | 17 | /* EMMC */ |
| 18 | Device(PEMC) { |
| 19 | Name(_ADR, 0x001A0000) |
Subrata Banik | 1014de6 | 2018-01-18 15:26:20 +0530 | [diff] [blame] | 20 | Name (_DDN, "eMMC Controller") |
Subrata Banik | d99f9d5 | 2018-01-18 15:13:53 +0530 | [diff] [blame] | 21 | Name (TEMP, 0) |
Kane Chen | d2b2be3 | 2020-04-13 20:48:54 +0800 | [diff] [blame] | 22 | Name (DSUU, ToUUID("f6c13ea5-65cd-461f-ab7a-29f7e8d5bd61")) |
Lijian Zhao | 21573e9 | 2017-11-08 19:21:32 -0800 | [diff] [blame] | 23 | |
| 24 | OperationRegion(SCSR, PCI_Config, 0x00, 0x100) |
| 25 | Field(SCSR, WordAcc, NoLock, Preserve) { |
Elyes HAOUAS | 48a6c01 | 2020-07-08 09:22:13 +0200 | [diff] [blame] | 26 | VDID, 32, /* PCI VID DID */ |
Subrata Banik | d99f9d5 | 2018-01-18 15:13:53 +0530 | [diff] [blame] | 27 | Offset (0x84), /* PMECTRLSTATUS */ |
| 28 | PMCR, 16, |
| 29 | Offset (0xA2), /* PG_CONFIG */ |
Lijian Zhao | 21573e9 | 2017-11-08 19:21:32 -0800 | [diff] [blame] | 30 | , 2, |
Subrata Banik | d99f9d5 | 2018-01-18 15:13:53 +0530 | [diff] [blame] | 31 | PGEN, 1, /* PG_ENABLE */ |
Lijian Zhao | 21573e9 | 2017-11-08 19:21:32 -0800 | [diff] [blame] | 32 | } |
| 33 | |
Bora Guvendik | 2a50a1f | 2018-03-19 17:15:20 -0700 | [diff] [blame] | 34 | Method(_INI) { |
| 35 | /* Clear register 0x1C20/0x4820 */ |
| 36 | ^^SCSC (PID_EMMC) |
| 37 | } |
| 38 | |
Lijian Zhao | 21573e9 | 2017-11-08 19:21:32 -0800 | [diff] [blame] | 39 | Method(_PS0, 0, Serialized) { |
Subrata Banik | d99f9d5 | 2018-01-18 15:13:53 +0530 | [diff] [blame] | 40 | Stall (50) // Sleep 50 us |
| 41 | |
Felix Singer | 3dc4d84 | 2022-12-12 07:36:41 +0100 | [diff] [blame] | 42 | PGEN = 0 // Disable PG |
Subrata Banik | d99f9d5 | 2018-01-18 15:13:53 +0530 | [diff] [blame] | 43 | |
Lijian Zhao | 51605e2 | 2018-02-20 14:37:03 -0800 | [diff] [blame] | 44 | /* Clear register 0x1C20/0x4820 */ |
Bora Guvendik | 2a50a1f | 2018-03-19 17:15:20 -0700 | [diff] [blame] | 45 | ^^SCSC (PID_EMMC) |
Lijian Zhao | 51605e2 | 2018-02-20 14:37:03 -0800 | [diff] [blame] | 46 | |
Subrata Banik | d99f9d5 | 2018-01-18 15:13:53 +0530 | [diff] [blame] | 47 | /* Set Power State to D0 */ |
Felix Singer | 35e65a8 | 2022-12-16 07:11:17 +0100 | [diff] [blame^] | 48 | PMCR &= 0xFFFC |
Felix Singer | 3dc4d84 | 2022-12-12 07:36:41 +0100 | [diff] [blame] | 49 | ^TEMP = PMCR |
Lijian Zhao | 21573e9 | 2017-11-08 19:21:32 -0800 | [diff] [blame] | 50 | } |
| 51 | |
| 52 | Method(_PS3, 0, Serialized) { |
Felix Singer | 3dc4d84 | 2022-12-12 07:36:41 +0100 | [diff] [blame] | 53 | PGEN = 1 // Enable PG |
Subrata Banik | d99f9d5 | 2018-01-18 15:13:53 +0530 | [diff] [blame] | 54 | |
| 55 | /* Set Power State to D3 */ |
Felix Singer | 86bc2e7 | 2022-12-16 04:40:39 +0100 | [diff] [blame] | 56 | PMCR |= 3 |
Felix Singer | 3dc4d84 | 2022-12-12 07:36:41 +0100 | [diff] [blame] | 57 | ^TEMP = PMCR |
Lijian Zhao | 21573e9 | 2017-11-08 19:21:32 -0800 | [diff] [blame] | 58 | } |
Subrata Banik | 1014de6 | 2018-01-18 15:26:20 +0530 | [diff] [blame] | 59 | |
| 60 | Device (CARD) |
| 61 | { |
| 62 | Name (_ADR, 0x00000008) |
| 63 | Method (_RMV, 0, NotSerialized) |
| 64 | { |
| 65 | Return (0) |
| 66 | } |
| 67 | } |
Kane Chen | d2b2be3 | 2020-04-13 20:48:54 +0800 | [diff] [blame] | 68 | /* _DSM x86 Device Specific Method |
| 69 | * Arg0: UUID Unique function identifier |
| 70 | * Arg1: Integer Revision Level |
| 71 | * Arg2: Integer Function Index (0 = Return Supported Functions) |
| 72 | * Arg3: Package Parameters |
| 73 | */ |
| 74 | Method (_DSM, 4) |
| 75 | { |
Felix Singer | 5c95604 | 2022-01-02 01:09:03 +0100 | [diff] [blame] | 76 | If (Arg0 == ^DSUU) { |
Kane Chen | d2b2be3 | 2020-04-13 20:48:54 +0800 | [diff] [blame] | 77 | /* Check the revision */ |
Felix Singer | d62f3aa | 2022-01-02 02:16:23 +0100 | [diff] [blame] | 78 | If (Arg1 >= 0) { |
Kane Chen | d2b2be3 | 2020-04-13 20:48:54 +0800 | [diff] [blame] | 79 | /* |
| 80 | * Function Index 0 the return value is a buffer |
| 81 | * containing one bit for each function index, starting |
| 82 | * with zero. |
| 83 | * Bit 0 - Indicates whether there is support for any |
Elyes HAOUAS | bda27cd | 2020-06-27 07:17:16 +0200 | [diff] [blame] | 84 | * functions other than function 0 |
Kane Chen | d2b2be3 | 2020-04-13 20:48:54 +0800 | [diff] [blame] | 85 | * Bit 1 - Indicates support to clear power control |
| 86 | * register |
| 87 | * Bit 2 - Indicates support to set power control |
| 88 | * register |
| 89 | * Bit 3 - Indicates support to set 1.8V signalling |
| 90 | * Bit 4 - Indicates support to set 3.3V signalling |
| 91 | * Bit 5 - Indicates support for HS200 mode |
| 92 | * Bit 6 - Indicates support for HS400 mode |
| 93 | * Bit 9 - Indicates eMMC I/O Driver Strength |
| 94 | */ |
Felix Singer | 5c95604 | 2022-01-02 01:09:03 +0100 | [diff] [blame] | 95 | If (Arg2 == 0) { |
| 96 | If (VDID == 0x02c48086) { |
Kane Chen | d2b2be3 | 2020-04-13 20:48:54 +0800 | [diff] [blame] | 97 | /* |
| 98 | * Set bit 9 for CML eMMC to indicate |
| 99 | * eMMC I/O driver strength is supported |
| 100 | */ |
| 101 | Return(Buffer() {0x0, 0x02}) |
| 102 | } |
| 103 | |
| 104 | } |
| 105 | /* |
| 106 | * Function Index 9, the return value is preferred eMMC |
| 107 | * driver strength |
| 108 | * 0 - 50 ohm |
| 109 | * 1 - 33 ohm |
| 110 | * 2 - 66 ohm |
| 111 | * 3 - 100 ohm |
| 112 | * 4 - 40 ohm |
| 113 | */ |
Felix Singer | 5c95604 | 2022-01-02 01:09:03 +0100 | [diff] [blame] | 114 | If (Arg2 == 9) { |
Kane Chen | d2b2be3 | 2020-04-13 20:48:54 +0800 | [diff] [blame] | 115 | Return(Buffer() {0x4}) |
| 116 | } |
| 117 | } |
| 118 | } |
| 119 | Return(Buffer() { 0x0 }) |
| 120 | } |
Lijian Zhao | 21573e9 | 2017-11-08 19:21:32 -0800 | [diff] [blame] | 121 | } |
Bora Guvendik | 5d11cc9 | 2017-09-25 14:33:17 -0700 | [diff] [blame] | 122 | |
| 123 | /* SD CARD */ |
| 124 | Device (SDXC) |
| 125 | { |
| 126 | Name (_ADR, 0x00140005) |
Subrata Banik | 1014de6 | 2018-01-18 15:26:20 +0530 | [diff] [blame] | 127 | Name (_DDN, "SD Controller") |
Subrata Banik | a971254 | 2018-01-18 15:20:21 +0530 | [diff] [blame] | 128 | Name (TEMP, 0) |
V Sowmya | 3c8c81b | 2019-03-19 19:55:14 +0530 | [diff] [blame] | 129 | Name (DSUU, ToUUID("f6c13ea5-65cd-461f-ab7a-29f7e8d5bd61")) |
Bora Guvendik | 5d11cc9 | 2017-09-25 14:33:17 -0700 | [diff] [blame] | 130 | |
Vaibhav Shankar | 6fd5a79 | 2017-11-16 17:46:48 -0800 | [diff] [blame] | 131 | OperationRegion (SDPC, PCI_Config, 0x00, 0x100) |
| 132 | Field (SDPC, WordAcc, NoLock, Preserve) |
| 133 | { |
Subrata Banik | a971254 | 2018-01-18 15:20:21 +0530 | [diff] [blame] | 134 | Offset (0x84), /* PMECTRLSTATUS */ |
| 135 | PMCR, 16, |
| 136 | Offset (0xA2), /* PG_CONFIG */ |
Vaibhav Shankar | 6fd5a79 | 2017-11-16 17:46:48 -0800 | [diff] [blame] | 137 | , 2, |
Subrata Banik | a971254 | 2018-01-18 15:20:21 +0530 | [diff] [blame] | 138 | PGEN, 1, /* PG_ENABLE */ |
Vaibhav Shankar | 6fd5a79 | 2017-11-16 17:46:48 -0800 | [diff] [blame] | 139 | } |
| 140 | |
V Sowmya | 3c8c81b | 2019-03-19 19:55:14 +0530 | [diff] [blame] | 141 | /* _DSM x86 Device Specific Method |
| 142 | * Arg0: UUID Unique function identifier |
| 143 | * Arg1: Integer Revision Level |
| 144 | * Arg2: Integer Function Index (0 = Return Supported Functions) |
| 145 | * Arg3: Package Parameters |
| 146 | */ |
| 147 | Method (_DSM, 4) |
| 148 | { |
Felix Singer | 5c95604 | 2022-01-02 01:09:03 +0100 | [diff] [blame] | 149 | If (Arg0 == ^DSUU) { |
V Sowmya | 3c8c81b | 2019-03-19 19:55:14 +0530 | [diff] [blame] | 150 | /* Check the revision */ |
Felix Singer | d62f3aa | 2022-01-02 02:16:23 +0100 | [diff] [blame] | 151 | If (Arg1 >= 0) { |
V Sowmya | 3c8c81b | 2019-03-19 19:55:14 +0530 | [diff] [blame] | 152 | /* |
| 153 | * Function Index 0 the return value is a buffer containing |
| 154 | * one bit for each function index, starting with zero. |
| 155 | * Bit 0 - Indicates whether there is support for any functions other than function 0. |
| 156 | * Bit 1 - Indicates support to clear power control register |
| 157 | * Bit 2 - Indicates support to set power control register |
| 158 | * Bit 3 - Indicates support to set 1.8V signalling |
| 159 | * Bit 4 - Indicates support to set 3.3V signalling |
| 160 | * Bit 5 - Indicates support for HS200 mode |
| 161 | * Bit 6 - Indicates support for HS400 mode |
| 162 | * Bit 9 - Indicates eMMC I/O Driver Strength |
| 163 | */ |
| 164 | /* |
| 165 | * For SD we have to support functions to |
| 166 | * set 1.8V signalling and 3.3V signalling [BIT4, BIT3] |
| 167 | */ |
Felix Singer | 5c95604 | 2022-01-02 01:09:03 +0100 | [diff] [blame] | 168 | If (Arg2 == 0) { |
V Sowmya | 3c8c81b | 2019-03-19 19:55:14 +0530 | [diff] [blame] | 169 | Return (Buffer () { 0x19 }) |
| 170 | } |
V Sowmya | 3c8c81b | 2019-03-19 19:55:14 +0530 | [diff] [blame] | 171 | /* |
| 172 | * Function Index 3: Set 1.8v signalling. |
| 173 | * We put a sleep of 100ms in this method to |
| 174 | * work around a known issue with detecting |
| 175 | * UHS SD card on PCH. This is to compensate |
| 176 | * for the SD VR slowness. |
| 177 | */ |
Felix Singer | 5c95604 | 2022-01-02 01:09:03 +0100 | [diff] [blame] | 178 | If (Arg2 == 3) { |
V Sowmya | 3c8c81b | 2019-03-19 19:55:14 +0530 | [diff] [blame] | 179 | Sleep (100) |
| 180 | Return(Buffer () { 0x00 }) |
| 181 | } |
| 182 | /* |
| 183 | * Function Index 4: Set 3.3v signalling. |
| 184 | * We put a sleep of 100ms in this method to |
| 185 | * work around a known issue with detecting |
| 186 | * UHS SD card on PCH. This is to compensate |
| 187 | * for the SD VR slowness. |
| 188 | */ |
Felix Singer | 5c95604 | 2022-01-02 01:09:03 +0100 | [diff] [blame] | 189 | If (Arg2 == 4) { |
V Sowmya | 3c8c81b | 2019-03-19 19:55:14 +0530 | [diff] [blame] | 190 | Sleep (100) |
| 191 | Return(Buffer () { 0x00 }) |
| 192 | } |
V Sowmya | 3c8c81b | 2019-03-19 19:55:14 +0530 | [diff] [blame] | 193 | } |
| 194 | } |
| 195 | Return(Buffer() { 0x0 }) |
| 196 | } |
| 197 | |
Bora Guvendik | 2a50a1f | 2018-03-19 17:15:20 -0700 | [diff] [blame] | 198 | Method(_INI) |
| 199 | { |
| 200 | /* Clear register 0x1C20/0x4820 */ |
| 201 | ^^SCSC (PID_SDX) |
| 202 | } |
| 203 | |
Vaibhav Shankar | 6fd5a79 | 2017-11-16 17:46:48 -0800 | [diff] [blame] | 204 | Method (_PS0, 0, Serialized) |
| 205 | { |
Felix Singer | 3dc4d84 | 2022-12-12 07:36:41 +0100 | [diff] [blame] | 206 | PGEN = 0 /* Disable PG */ |
Subrata Banik | a971254 | 2018-01-18 15:20:21 +0530 | [diff] [blame] | 207 | |
Lijian Zhao | 51605e2 | 2018-02-20 14:37:03 -0800 | [diff] [blame] | 208 | /* Clear register 0x1C20/0x4820 */ |
Bora Guvendik | 2a50a1f | 2018-03-19 17:15:20 -0700 | [diff] [blame] | 209 | ^^SCSC (PID_SDX) |
Lijian Zhao | 51605e2 | 2018-02-20 14:37:03 -0800 | [diff] [blame] | 210 | |
Subrata Banik | a971254 | 2018-01-18 15:20:21 +0530 | [diff] [blame] | 211 | /* Set Power State to D0 */ |
Felix Singer | 35e65a8 | 2022-12-16 07:11:17 +0100 | [diff] [blame^] | 212 | PMCR &= 0xFFFC |
Felix Singer | 3dc4d84 | 2022-12-12 07:36:41 +0100 | [diff] [blame] | 213 | ^TEMP = PMCR |
Rizwan Qureshi | 8aadab7 | 2019-02-17 11:31:21 +0530 | [diff] [blame] | 214 | |
Julius Werner | cd49cce | 2019-03-05 16:53:33 -0800 | [diff] [blame] | 215 | #if CONFIG(MB_HAS_ACTIVE_HIGH_SD_PWR_ENABLE) |
Rizwan Qureshi | 8aadab7 | 2019-02-17 11:31:21 +0530 | [diff] [blame] | 216 | /* Change pad mode to Native */ |
| 217 | GPMO(SD_PWR_EN_PIN, 0x1) |
| 218 | #endif |
Vaibhav Shankar | 6fd5a79 | 2017-11-16 17:46:48 -0800 | [diff] [blame] | 219 | } |
| 220 | |
| 221 | Method (_PS3, 0, Serialized) |
| 222 | { |
Felix Singer | 3dc4d84 | 2022-12-12 07:36:41 +0100 | [diff] [blame] | 223 | PGEN = 1 /* Enable PG */ |
Subrata Banik | a971254 | 2018-01-18 15:20:21 +0530 | [diff] [blame] | 224 | |
| 225 | /* Set Power State to D3 */ |
Felix Singer | 86bc2e7 | 2022-12-16 04:40:39 +0100 | [diff] [blame] | 226 | PMCR |= 3 |
Felix Singer | 3dc4d84 | 2022-12-12 07:36:41 +0100 | [diff] [blame] | 227 | ^TEMP = PMCR |
Rizwan Qureshi | 8aadab7 | 2019-02-17 11:31:21 +0530 | [diff] [blame] | 228 | |
Julius Werner | cd49cce | 2019-03-05 16:53:33 -0800 | [diff] [blame] | 229 | #if CONFIG(MB_HAS_ACTIVE_HIGH_SD_PWR_ENABLE) |
Rizwan Qureshi | 8aadab7 | 2019-02-17 11:31:21 +0530 | [diff] [blame] | 230 | /* Change pad mode to GPIO control */ |
| 231 | GPMO(SD_PWR_EN_PIN, 0x0) |
| 232 | |
| 233 | /* Enable Tx Buffer */ |
| 234 | GTXE(SD_PWR_EN_PIN, 0x1) |
| 235 | |
| 236 | /* Drive TX to zero */ |
| 237 | CTXS(SD_PWR_EN_PIN) |
| 238 | #endif |
Vaibhav Shankar | 6fd5a79 | 2017-11-16 17:46:48 -0800 | [diff] [blame] | 239 | } |
Subrata Banik | 1014de6 | 2018-01-18 15:26:20 +0530 | [diff] [blame] | 240 | |
| 241 | Device (CARD) |
| 242 | { |
| 243 | Name (_ADR, 0x00000008) |
| 244 | Method (_RMV, 0, NotSerialized) |
| 245 | { |
| 246 | Return (1) |
| 247 | } |
| 248 | } |
Bora Guvendik | 5d11cc9 | 2017-09-25 14:33:17 -0700 | [diff] [blame] | 249 | } /* Device (SDXC) */ |
| 250 | } |