blob: 2262c9146542a0afe892357041a945abf92a2eca [file] [log] [blame]
Arthur Heymans7b9c1392017-04-09 20:40:39 +02001/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright (C) 2008-2009 coresystems GmbH
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation; version 2 of
9 * the License.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 */
16
17#include <device/device.h>
18#include <device/pci.h>
19#include <device/pci_ids.h>
Arthur Heymans349e0852017-04-09 20:48:37 +020020#include "i82801jx.h"
Arthur Heymans7b9c1392017-04-09 20:40:39 +020021
22static void pci_init(struct device *dev)
23{
24 u16 reg16;
25 u8 reg8;
26
27 /* This device has no interrupt */
28 pci_write_config8(dev, PCI_INTERRUPT_LINE, 0xff);
29
30 /* Master Latency Count must be set to 0x04! */
31 reg8 = pci_read_config8(dev, D30F0_SMLT);
32 reg8 &= 0x07;
33 reg8 |= (0x04 << 3);
34 pci_write_config8(dev, D30F0_SMLT, reg8);
35
36 /* Clear errors in status registers */
37 reg16 = pci_read_config16(dev, PCI_STATUS);
38 //reg16 |= 0xf900;
39 pci_write_config16(dev, PCI_STATUS, reg16);
40
41 reg16 = pci_read_config16(dev, PCI_SEC_STATUS);
42 // reg16 |= 0xf900;
43 pci_write_config16(dev, PCI_SEC_STATUS, reg16);
44}
45
46static void set_subsystem(device_t dev, unsigned vendor, unsigned device)
47{
48 /* NOTE: 0x54 is not the default position! */
49 if (!vendor || !device) {
50 pci_write_config32(dev, 0x54,
51 pci_read_config32(dev, PCI_VENDOR_ID));
52 } else {
53 pci_write_config32(dev, 0x54,
54 ((device & 0xffff) << 16) | (vendor & 0xffff));
55 }
56}
57
58static struct pci_operations pci_ops = {
59 .set_subsystem = set_subsystem,
60};
61
62static struct device_operations device_ops = {
63 .read_resources = pci_bus_read_resources,
64 .set_resources = pci_dev_set_resources,
65 .enable_resources = pci_bus_enable_resources,
66 .init = pci_init,
67 .scan_bus = pci_scan_bridge,
68 .reset_bus = pci_bus_reset,
69 .ops_pci = &pci_ops,
70};
71
72static const unsigned short pci_device_ids[] = {
Arthur Heymans349e0852017-04-09 20:48:37 +020073 0x244e,
Arthur Heymans7b9c1392017-04-09 20:40:39 +020074 0
75};
76
Arthur Heymans349e0852017-04-09 20:48:37 +020077static const struct pci_driver ich10_pci __pci_driver = {
Arthur Heymans7b9c1392017-04-09 20:40:39 +020078 .ops = &device_ops,
79 .vendor = PCI_VENDOR_ID_INTEL,
80 .devices = pci_device_ids,
81};