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Zheng Baoc5e28ab2020-10-28 11:38:09 +08001/* SPDX-License-Identifier: GPL-2.0-only */
2
3#ifndef _AMD_FW_TOOL_H_
4#define _AMD_FW_TOOL_H_
5
Zheng Bao6be1ab62021-05-26 10:16:33 +08006#include <stdint.h>
7
Zheng Baoc5e28ab2020-10-28 11:38:09 +08008typedef enum _amd_fw_type {
9 AMD_FW_PSP_PUBKEY = 0,
10 AMD_FW_PSP_BOOTLOADER = 1,
11 AMD_FW_PSP_SMU_FIRMWARE = 8,
12 AMD_FW_PSP_RECOVERY = 3,
13 AMD_FW_PSP_RTM_PUBKEY = 5,
14 AMD_FW_PSP_SECURED_OS = 2,
15 AMD_FW_PSP_NVRAM = 4,
16 AMD_FW_PSP_SECURED_DEBUG = 9,
17 AMD_FW_PSP_TRUSTLETS = 12,
18 AMD_FW_PSP_TRUSTLETKEY = 13,
19 AMD_FW_PSP_SMU_FIRMWARE2 = 18,
20 AMD_PSP_FUSE_CHAIN = 11,
21 AMD_FW_PSP_SMUSCS = 95,
22 AMD_DEBUG_UNLOCK = 0x13,
Zheng Baobf29a0d2020-12-03 23:00:48 +080023 AMD_HW_IPCFG = 0x20,
Zheng Baoc5e28ab2020-10-28 11:38:09 +080024 AMD_WRAPPED_IKEK = 0x21,
25 AMD_TOKEN_UNLOCK = 0x22,
26 AMD_SEC_GASKET = 0x24,
27 AMD_MP2_FW = 0x25,
28 AMD_DRIVER_ENTRIES = 0x28,
Zheng Baobf29a0d2020-12-03 23:00:48 +080029 AMD_FW_KVM_IMAGE = 0x29,
Zheng Baoc5e28ab2020-10-28 11:38:09 +080030 AMD_S0I3_DRIVER = 0x2d,
31 AMD_ABL0 = 0x30,
32 AMD_ABL1 = 0x31,
33 AMD_ABL2 = 0x32,
34 AMD_ABL3 = 0x33,
35 AMD_ABL4 = 0x34,
36 AMD_ABL5 = 0x35,
37 AMD_ABL6 = 0x36,
38 AMD_ABL7 = 0x37,
39 AMD_FW_PSP_WHITELIST = 0x3a,
Zheng Baobf29a0d2020-12-03 23:00:48 +080040 AMD_VBIOS_BTLOADER = 0x3c,
Zheng Baoc5e28ab2020-10-28 11:38:09 +080041 AMD_FW_L2_PTR = 0x40,
Zheng Baobf29a0d2020-12-03 23:00:48 +080042 AMD_FW_USB_PHY = 0x44,
43 AMD_FW_TOS_SEC_POLICY = 0x45,
44 AMD_FW_DRTM_TA = 0x47,
45 AMD_FW_KEYDB_BL = 0x50,
46 AMD_FW_KEYDB_TOS = 0x51,
Zheng Baoc5e28ab2020-10-28 11:38:09 +080047 AMD_FW_PSP_VERSTAGE = 0x52,
48 AMD_FW_VERSTAGE_SIG = 0x53,
Zheng Baobf29a0d2020-12-03 23:00:48 +080049 AMD_RPMC_NVRAM = 0x54,
50 AMD_FW_DMCU_ERAM = 0x58,
51 AMD_FW_DMCU_ISR = 0x59,
Zheng Baob993cb22021-02-02 18:48:23 +080052 AMD_FW_PSP_BOOTLOADER_AB = 0x73,
Zheng Baoc5e28ab2020-10-28 11:38:09 +080053 AMD_FW_IMC = 0x200, /* Large enough to be larger than the top BHD entry type. */
54 AMD_FW_GEC,
55 AMD_FW_XHCI,
56 AMD_FW_INVALID, /* Real last one to detect the last entry in table. */
57 AMD_FW_SKIP /* This is for non-applicable options. */
58} amd_fw_type;
59
60typedef enum _amd_bios_type {
Zheng Baobf29a0d2020-12-03 23:00:48 +080061 AMD_BIOS_RTM_PUBKEY = 5,
Zheng Baoc5e28ab2020-10-28 11:38:09 +080062 AMD_BIOS_APCB = 0x60,
63 AMD_BIOS_APOB = 0x61,
64 AMD_BIOS_BIN = 0x62,
65 AMD_BIOS_APOB_NV = 0x63,
66 AMD_BIOS_PMUI = 0x64,
67 AMD_BIOS_PMUD = 0x65,
68 AMD_BIOS_UCODE = 0x66,
69 AMD_BIOS_APCB_BK = 0x68,
70 AMD_BIOS_MP2_CFG = 0x6a,
71 AMD_BIOS_PSP_SHARED_MEM = 0x6b,
72 AMD_BIOS_L2_PTR = 0x70,
73 AMD_BIOS_INVALID,
74 AMD_BIOS_SKIP
75} amd_bios_type;
76
Zheng Bao6be1ab62021-05-26 10:16:33 +080077struct second_gen_efs { /* todo: expand for Server products */
78 int gen:1; /* Client products only use bit 0 */
79 int reserved:31;
80} __attribute__((packed));
81
82#define EFS_SECOND_GEN 0
83
84typedef struct _embedded_firmware {
85 uint32_t signature; /* 0x55aa55aa */
86 uint32_t imc_entry;
87 uint32_t gec_entry;
88 uint32_t xhci_entry;
Felix Heldad68b072021-10-18 14:00:35 +020089 uint32_t psp_directory;
90 uint32_t combo_psp_directory;
Zheng Bao6be1ab62021-05-26 10:16:33 +080091 uint32_t bios0_entry; /* todo: add way to select correct entry */
92 uint32_t bios1_entry;
93 uint32_t bios2_entry;
94 struct second_gen_efs efs_gen;
95 uint32_t bios3_entry;
96 uint32_t reserved_2Ch;
97 uint32_t promontory_fw_ptr;
98 uint32_t lp_promontory_fw_ptr;
99 uint32_t reserved_38h;
100 uint32_t reserved_3Ch;
101 uint8_t spi_readmode_f15_mod_60_6f;
102 uint8_t fast_speed_new_f15_mod_60_6f;
103 uint8_t reserved_42h;
104 uint8_t spi_readmode_f17_mod_00_2f;
105 uint8_t spi_fastspeed_f17_mod_00_2f;
106 uint8_t qpr_dummy_cycle_f17_mod_00_2f;
107 uint8_t reserved_46h;
108 uint8_t spi_readmode_f17_mod_30_3f;
109 uint8_t spi_fastspeed_f17_mod_30_3f;
110 uint8_t micron_detect_f17_mod_30_3f;
111 uint8_t reserved_4Ah;
112 uint8_t reserved_4Bh;
113 uint32_t reserved_4Ch;
114} __attribute__((packed, aligned(16))) embedded_firmware;
115
116typedef struct _psp_directory_header {
117 uint32_t cookie;
118 uint32_t checksum;
119 uint32_t num_entries;
120 uint32_t additional_info;
121} __attribute__((packed, aligned(16))) psp_directory_header;
122
123typedef struct _psp_directory_entry {
124 uint8_t type;
125 uint8_t subprog;
126 uint16_t rsvd;
127 uint32_t size;
128 uint64_t addr; /* or a value in some cases */
129} __attribute__((packed)) psp_directory_entry;
130
131typedef struct _psp_directory_table {
132 psp_directory_header header;
133 psp_directory_entry entries[];
134} __attribute__((packed, aligned(16))) psp_directory_table;
135
136#define MAX_PSP_ENTRIES 0x1f
137
138typedef struct _psp_combo_header {
139 uint32_t cookie;
140 uint32_t checksum;
141 uint32_t num_entries;
142 uint32_t lookup;
143 uint64_t reserved[2];
144} __attribute__((packed, aligned(16))) psp_combo_header;
145
146typedef struct _psp_combo_entry {
147 uint32_t id_sel;
148 uint32_t id;
149 uint64_t lvl2_addr;
150} __attribute__((packed)) psp_combo_entry;
151
152typedef struct _psp_combo_directory {
153 psp_combo_header header;
154 psp_combo_entry entries[];
155} __attribute__((packed, aligned(16))) psp_combo_directory;
156
157#define MAX_COMBO_ENTRIES 1
158
159typedef struct _bios_directory_hdr {
160 uint32_t cookie;
161 uint32_t checksum;
162 uint32_t num_entries;
163 uint32_t additional_info;
164} __attribute__((packed, aligned(16))) bios_directory_hdr;
165
166typedef struct _bios_directory_entry {
167 uint8_t type;
168 uint8_t region_type;
169 int reset:1;
170 int copy:1;
171 int ro:1;
172 int compressed:1;
173 int inst:4;
174 uint8_t subprog; /* b[7:3] reserved */
175 uint32_t size;
176 uint64_t source;
177 uint64_t dest;
178} __attribute__((packed)) bios_directory_entry;
179
180typedef struct _bios_directory_table {
181 bios_directory_hdr header;
182 bios_directory_entry entries[];
183} bios_directory_table;
Zheng Baoc5e28ab2020-10-28 11:38:09 +0800184
Zheng Bao33351332021-10-30 16:53:23 +0800185#define BDT_LVL1 (1 << 0)
186#define BDT_LVL2 (1 << 1)
Zheng Baoc5e28ab2020-10-28 11:38:09 +0800187#define BDT_BOTH (BDT_LVL1 | BDT_LVL2)
188typedef struct _amd_bios_entry {
189 amd_bios_type type;
190 char *filename;
191 int subpr;
192 int region_type;
193 int reset;
194 int copy;
195 int ro;
196 int zlib;
197 int inst;
198 uint64_t src;
199 uint64_t dest;
200 size_t size;
201 int level;
202} amd_bios_entry;
203
Zheng Bao6be1ab62021-05-26 10:16:33 +0800204#define EMBEDDED_FW_SIGNATURE 0x55aa55aa
205#define PSP_COOKIE 0x50535024 /* 'PSP$' */
206#define PSPL2_COOKIE 0x324c5024 /* '2LP$' */
207#define PSP2_COOKIE 0x50535032 /* 'PSP2' */
208#define BDT1_COOKIE 0x44484224 /* 'DHB$ */
209#define BDT2_COOKIE 0x324c4224 /* '2LB$ */
Zheng Baoc5e28ab2020-10-28 11:38:09 +0800210
Zheng Bao33351332021-10-30 16:53:23 +0800211#define PSP_LVL1 (1 << 0)
212#define PSP_LVL2 (1 << 1)
Zheng Baoc5e28ab2020-10-28 11:38:09 +0800213#define PSP_BOTH (PSP_LVL1 | PSP_LVL2)
214typedef struct _amd_fw_entry {
215 amd_fw_type type;
216 char *filename;
217 uint8_t subprog;
218 int level;
219 uint64_t other;
220} amd_fw_entry;
221
222typedef struct _amd_cb_config {
223 uint8_t have_whitelist;
224 uint8_t unlock_secure;
225 uint8_t use_secureos;
226 uint8_t load_mp2_fw;
Zheng Bao481661e2021-08-20 14:47:46 +0800227 uint8_t multi_level;
Zheng Baoc5e28ab2020-10-28 11:38:09 +0800228 uint8_t s0i3;
229} amd_cb_config;
230
231void register_fw_fuse(char *str);
232uint8_t process_config(FILE *config, amd_cb_config *cb_config, uint8_t print_deps);
233
234#define OK 0
235
236#define LINE_EOF (1)
237#define LINE_TOO_LONG (2)
238
239
240#endif /* _AMD_FW_TOOL_H_ */