blob: 0ebadeae34977ae591c7d978d2db4f950dbc59d0 [file] [log] [blame]
Furquan Shaikh8c8c3772014-02-19 11:35:30 -08001/*
Furquan Shaikh8c8c3772014-02-19 11:35:30 -08002 *
3 * Copyright (C) 2008 Advanced Micro Devices, Inc.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * 3. The name of the author may not be used to endorse or promote products
14 * derived from this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 */
28
29#include <arch/asm.h>
Julius Wernerbf33b032020-02-14 12:42:01 -080030#include <arch/lib_helpers.h>
Furquan Shaikh8c8c3772014-02-19 11:35:30 -080031
32/*
33 * Our entry point
34 */
35ENTRY(_entry)
Julius Wernerbf33b032020-02-14 12:42:01 -080036 /* Initialize SCTLR to intended state (icache and stack-alignment on) */
37 ldr w1, =(SCTLR_RES1 | SCTLR_I | SCTLR_SA)
38 msr sctlr_el2, x1
Furquan Shaikh8c8c3772014-02-19 11:35:30 -080039
40 /* Save off the location of the coreboot tables */
41 ldr x1, 1f
42 str x0, [x1]
43
Furquan Shaikh8c8c3772014-02-19 11:35:30 -080044 /* Setup new stack */
45 ldr x1, 2f
Furquan Shaikh02efc942014-08-27 21:40:23 -070046 mov sp, x1
Furquan Shaikh8c8c3772014-02-19 11:35:30 -080047
48 /* Let's rock. */
49 bl start_main
50
Furquan Shaikh8c8c3772014-02-19 11:35:30 -080051 ret
52ENDPROC(_entry)
53
54.align 4
551:
56.quad cb_header_ptr
572:
Yi Chou32ea2ab2023-11-18 12:12:01 +080058.quad _estack