Kane Chen | 01ebc74 | 2019-08-23 12:03:05 +0800 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright (C) 2019 Intel Corporation. |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; version 2 of the License. |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
| 14 | */ |
| 15 | |
| 16 | #include <device/pci.h> |
| 17 | #include <device/pci_ids.h> |
| 18 | #include <console/console.h> |
Kyösti Mälkki | 32d47eb | 2019-09-28 00:00:30 +0300 | [diff] [blame^] | 19 | #include <intelblocks/cfg.h> |
Kane Chen | 01ebc74 | 2019-08-23 12:03:05 +0800 | [diff] [blame] | 20 | #include <intelblocks/mmc.h> |
| 21 | |
| 22 | static int mmc_write_dll_reg(void *bar, uint32_t reg, uint32_t val) |
| 23 | { |
| 24 | int ret = 0; |
| 25 | if (val) { |
| 26 | write32(bar + reg, val); |
| 27 | ret = 1; |
| 28 | } |
| 29 | return ret; |
| 30 | } |
| 31 | |
| 32 | int set_mmc_dll(void *bar) |
| 33 | { |
| 34 | const struct soc_intel_common_config *common_config; |
| 35 | const struct mmc_dll_params *dll_params; |
| 36 | int override = 0; |
| 37 | |
| 38 | common_config = chip_get_common_soc_structure(); |
| 39 | dll_params = &common_config->emmc_dll; |
| 40 | |
| 41 | override |= mmc_write_dll_reg(bar, EMMC_TX_CMD_CNTL_OFFSET, |
| 42 | dll_params->emmc_tx_cmd_cntl); |
| 43 | |
| 44 | override |= mmc_write_dll_reg(bar, EMMC_TX_DATA_CNTL1_OFFSET, |
| 45 | dll_params->emmc_tx_data_cntl1); |
| 46 | |
| 47 | override |= mmc_write_dll_reg(bar, EMMC_TX_DATA_CNTL2_OFFSET, |
| 48 | dll_params->emmc_tx_data_cntl2); |
| 49 | |
| 50 | override |= mmc_write_dll_reg(bar, EMMC_RX_CMD_DATA_CNTL1_OFFSET, |
| 51 | dll_params->emmc_rx_cmd_data_cntl1); |
| 52 | |
| 53 | override |= mmc_write_dll_reg(bar, EMMC_RX_STROBE_CNTL_OFFSET, |
| 54 | dll_params->emmc_rx_strobe_cntl); |
| 55 | |
| 56 | override |= mmc_write_dll_reg(bar, EMMC_RX_CMD_DATA_CNTL2_OFFSET, |
| 57 | dll_params->emmc_rx_cmd_data_cntl2); |
| 58 | |
| 59 | if (override == 0) { |
| 60 | printk(BIOS_INFO, "Skip Emmc dll value programming\n"); |
| 61 | return -1; |
| 62 | } |
| 63 | |
| 64 | return 0; |
| 65 | } |
| 66 | |
| 67 | static void mmc_soc_init(struct device *dev) |
| 68 | { |
| 69 | const struct resource *res; |
| 70 | |
| 71 | if (!CONFIG(SOC_INTEL_COMMON_MMC_OVERRIDE)) |
| 72 | return; |
| 73 | |
| 74 | res = find_resource(dev, PCI_BASE_ADDRESS_0); |
| 75 | set_mmc_dll((void *)(uintptr_t)(res->base)); |
| 76 | } |
| 77 | |
| 78 | static struct device_operations dev_ops = { |
| 79 | .read_resources = pci_dev_read_resources, |
| 80 | .set_resources = pci_dev_set_resources, |
| 81 | .enable_resources = pci_dev_enable_resources, |
| 82 | .init = mmc_soc_init, |
| 83 | .ops_pci = &pci_dev_ops_pci, |
| 84 | }; |
| 85 | |
| 86 | static const unsigned short pci_device_ids[] = { |
| 87 | PCI_DEVICE_ID_INTEL_CMP_EMMC, |
| 88 | 0 |
| 89 | }; |
| 90 | |
| 91 | static const struct pci_driver pch_sd __pci_driver = { |
| 92 | .ops = &dev_ops, |
| 93 | .vendor = PCI_VENDOR_ID_INTEL, |
| 94 | .devices = pci_device_ids, |
| 95 | }; |