blob: 6902bd8288ed52e7e9d3cb220671021a07bf8ec1 [file] [log] [blame]
Macpaul Lin5d16f8d2022-08-11 16:27:10 +08001/* SPDX-License-Identifier: GPL-2.0-only OR MIT */
Yuchen Huang144237f2021-03-01 14:39:33 +08002
3#include <device/mmio.h>
4#include <soc/infracfg.h>
5#include <soc/pll.h>
6#include <soc/usb.h>
7
8void mtk_usb_prepare(void)
9{
Rex-BC Chen13c8d022022-07-11 15:01:51 +080010 mt_pll_set_usb_clock();
Yuchen Huang144237f2021-03-01 14:39:33 +080011}
Rex-BC Chenf371a782021-12-21 12:52:40 +080012
13void mtk_usb_adjust_phy_shift(void)
14{
15 u32 phy_set_val, write_val;
16 struct ssusb_sif_port *phy = (void *)(SSUSB_SIF_BASE);
17
18 SET32_BITFIELDS(&phy->u3phyd.phyd_reserved,
19 AUTO_LOAD_DIS, 1);
20
21 phy_set_val = read32((void *)USB_PHY_SETTING_REG);
22
23 /* TX imp */
24 write_val = (phy_set_val & TX_IMP_MASK) >> TX_IMP_SHIFT;
25 SET32_BITFIELDS(&phy->u3phyd.phyd_cal0,
26 TX_IMP_CAL, write_val,
27 TX_IMP_CAL_EN, 1);
28
29 /* RX imp */
30 write_val = (phy_set_val & RX_IMP_MASK) >> RX_IMP_SHIFT;
31 SET32_BITFIELDS(&phy->u3phyd.phyd_cal1,
32 RX_IMP_CAL, write_val,
33 RX_IMP_CAL_EN, 1);
34
35 /* Intr_cal */
36 write_val = (phy_set_val & INTR_CAL_MASK) >> INTR_CAL_SHIFT;
37 SET32_BITFIELDS(&phy->u3phya.phya_reg0,
38 INTR_CAL, write_val);
39}