| Sean Rhodes | d061c74 | 2022-06-27 09:41:17 +0100 | [diff] [blame] | 1 | # Complete IFWI Map |
| 2 | # Start (hex) End (hex) Length (hex) Area Name |
| 3 | # ----------- --------- ------------ --------- |
| 4 | # |
| 5 | # 00000000 007FFFFF 00800000 Full Flash Image |
| 6 | # 00000014 00000017 00000004 FLMAP0 - Flash Map 0 Register |
| 7 | # 00000018 0000001B 00000004 FLMAP1 - Flash Map 1 Register |
| 8 | # 0000001C 0000001F 00000004 FLMAP2 - Flash Map 2 Register |
| 9 | # 00000030 0000003B 0000000C FCBA - Flash Component Registers |
| 10 | # 00000040 00000043 00000004 FLREG0 - Flash Region 0 (Flash Descriptor) Register |
| 11 | # 00000044 00000047 00000004 FLREG1 - Flash Region 1 (IFWI) Register |
| 12 | # 00000048 0000004B 00000004 FLREG2 - Flash Region 2 (Intel(R) TXE) Register |
| 13 | # 00000050 00000053 00000004 FLREG4 - Flash Region 4 (Platform Data) Register |
| 14 | # 00000054 00000057 00000004 FLREG5 - Flash Region 5 (Device Expansion) Register |
| 15 | # 00000060 00000063 00000004 FLREG8 - Flash Region 8 (Embedded Controller) Register |
| 16 | # 00000080 00000083 00000004 FLMSTR1 - Flash Master 1 (Host CPU/BIOS) |
| 17 | # 00000084 00000087 00000004 FLMSTR2 - Flash Master 2 (Intel(R) TXE) |
| 18 | # 00000090 00000093 00000004 FLMSTR5 - Flash Master 5 (EC) |
| 19 | # 00000100 000002FF 00000200 FPSBA - SoC Straps (Including Padding) |
| 20 | # 00000DF0 00000EFF 00000110 VSCC Table |
| 21 | # 00000DF0 00000DF7 00000008 GD25LQ64 |
| 22 | # 00001000 0037FFFF 0037F000 Boot Partition 1 |
| 23 | # 00001000 000C2FFF 000C2000 Primary Boot Partition |
| 24 | # 00001200 0000120F 00000010 IFP Overrides Partition |
| 25 | # 00001210 00001317 00000108 Unified Emulation Partition (UEP) |
| 26 | # 00002000 00002FFF 00001000 OEM SMIP Partition |
| 27 | # 00003000 0000DFFF 0000B000 CSE RBE Partition |
| 28 | # 0000E000 0001CFFF 0000F000 PMCP |
| 29 | # 0001D000 0007DFFF 00061000 CSE BUP Partition |
| 30 | # 0007E000 000A3FFF 00026000 uCode Partition |
| 31 | # 0007E040 0009083F 00012800 uCode Patch 1 |
| 32 | # 00090840 000A303F 00012800 uCode Patch 2 |
| 33 | # 000A4000 000C0FFF 0001D000 IBB Partition |
| 34 | # 000C1000 000C2FFF 00002000 Debug Token Partition |
| 35 | # 000C3000 001C6FFF 00104000 Secondary Boot Partition |
| 36 | # 000C4000 001C6FFF 00103000 CSE Main Partition |
| 37 | # 00380000 006FEFFF 0037F000 Boot Partition 2 |
| 38 | # 00380000 003801FF 00000200 Primary Boot Partition |
| 39 | # 00380200 0062FFFF 002AFE00 Secondary Boot Partition |
| 40 | # 00381000 0062FFFF 002AF000 OBB Partition |
| 41 | # 006FF000 007FFFFF 00101000 TXE Data Region |
| Sean Rhodes | 5da05b6 | 2022-01-10 21:58:04 +0000 | [diff] [blame] | 42 | |
| Sean Rhodes | d061c74 | 2022-06-27 09:41:17 +0100 | [diff] [blame] | 43 | # coreboot only needs to know about the OBB. It's nested inside OBBP, to account for |
| 44 | # the header. |
| Sean Rhodes | 5da05b6 | 2022-01-10 21:58:04 +0000 | [diff] [blame] | 45 | FLASH 8M { |
| Sean Rhodes | d061c74 | 2022-06-27 09:41:17 +0100 | [diff] [blame] | 46 | OBBP@0x382000 { |
| 47 | OBB@0x0 0x2ae000 { |
| 48 | FMAP@0xe000 0x10000 |
| 49 | COREBOOT(CBFS)@0x1e000 0x210000 |
| 50 | FPF_STATUS@0x22e000 0x10000 |
| 51 | UNIFIED_MRC_CACHE@0x23e000 0x30000 { |
| 52 | RECOVERY_MRC_CACHE@0x0 0x10000 |
| 53 | RW_MRC_CACHE@0x10000 0x10000 |
| 54 | RW_VAR_MRC_CACHE@0x20000 0x10000 |
| Sean Rhodes | 5da05b6 | 2022-01-10 21:58:04 +0000 | [diff] [blame] | 55 | } |
| Sean Rhodes | d061c74 | 2022-06-27 09:41:17 +0100 | [diff] [blame] | 56 | SMMSTORE@0x26e000 0x40000 |
| Sean Rhodes | 5da05b6 | 2022-01-10 21:58:04 +0000 | [diff] [blame] | 57 | } |
| 58 | } |
| Sean Rhodes | 5da05b6 | 2022-01-10 21:58:04 +0000 | [diff] [blame] | 59 | } |