blob: c2934819844dafea61c486dff403d0cc35650b33 [file] [log] [blame]
Angel Pons8a3453f2020-04-02 23:48:19 +02001/* SPDX-License-Identifier: GPL-2.0-only */
Michał Żygowski1b12b642019-11-24 16:32:05 +01002
3#include <bootblock_common.h>
4#include <halt.h>
Michał Żygowski1b12b642019-11-24 16:32:05 +01005#include <amdblocks/amd_pci_mmconf.h>
6#include <amdblocks/biosram.h>
Kyösti Mälkki520717d2019-12-15 21:37:48 +02007#include <arch/bootblock.h>
Michał Żygowski1b12b642019-11-24 16:32:05 +01008#include <cpu/x86/mtrr.h>
Kyösti Mälkkifedaac82019-12-15 21:37:38 +02009#include <cpu/x86/lapic.h>
Michał Żygowski1b12b642019-11-24 16:32:05 +010010
11#define EARLY_VMTRR_FLASH 6
12
13static void set_early_mtrrs(void)
14{
15 /* Cache the ROM to speed up booting */
16 set_var_mtrr(EARLY_VMTRR_FLASH, OPTIMAL_CACHE_ROM_BASE,
17 OPTIMAL_CACHE_ROM_SIZE, MTRR_TYPE_WRPROT);
18}
19
Kyösti Mälkki520717d2019-12-15 21:37:48 +020020void bootblock_soc_early_init(void)
21{
22 bootblock_early_southbridge_init();
23}
24
Michał Żygowski1b12b642019-11-24 16:32:05 +010025asmlinkage void bootblock_c_entry(uint64_t base_timestamp)
26{
27 enable_pci_mmconf();
28 set_early_mtrrs();
29
Kyösti Mälkkifedaac82019-12-15 21:37:38 +020030 if (CONFIG(UDELAY_LAPIC))
31 enable_lapic();
32
Michał Żygowski1b12b642019-11-24 16:32:05 +010033 bootblock_main_with_basetime(base_timestamp);
34}
35
36asmlinkage void ap_bootblock_c_entry(void)
37{
38 enable_pci_mmconf();
39 set_early_mtrrs();
40
Kyösti Mälkkifedaac82019-12-15 21:37:38 +020041 if (CONFIG(UDELAY_LAPIC))
42 enable_lapic();
43
Michał Żygowski1b12b642019-11-24 16:32:05 +010044 void (*ap_romstage_entry)(void) = get_ap_entry_ptr();
45 ap_romstage_entry(); /* execution does not return */
46 halt();
47}