| Felix Held | 31ca978 | 2024-01-30 18:42:38 +0100 | [diff] [blame^] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
| 2 | |
| 3 | #include <amdblocks/memmap.h> |
| 4 | #include <amdblocks/iomap.h> |
| 5 | #include <amdblocks/root_complex.h> |
| 6 | #include <arch/vga.h> |
| 7 | #include <cbmem.h> |
| 8 | #include <device/device.h> |
| 9 | #include <stdint.h> |
| 10 | |
| 11 | /* |
| 12 | * +--------------------------------+ |
| 13 | * | | |
| 14 | * | | |
| 15 | * | | |
| 16 | * | | |
| 17 | * | | |
| 18 | * | | |
| 19 | * | | |
| 20 | * reserved_dram_end +--------------------------------+ |
| 21 | * | | |
| 22 | * | verstage (if reqd) | |
| 23 | * | (VERSTAGE_SIZE) | |
| 24 | * +--------------------------------+ VERSTAGE_ADDR |
| 25 | * | | |
| 26 | * | FSP-M | |
| 27 | * | (FSP_M_SIZE) | |
| 28 | * +--------------------------------+ FSP_M_ADDR |
| 29 | * | romstage | |
| 30 | * | (ROMSTAGE_SIZE) | |
| 31 | * +--------------------------------+ ROMSTAGE_ADDR = BOOTBLOCK_END |
| 32 | * | | X86_RESET_VECTOR = BOOTBLOCK_END - 0x10 |
| 33 | * | bootblock | |
| 34 | * | (C_ENV_BOOTBLOCK_SIZE) | |
| 35 | * +--------------------------------+ BOOTBLOCK_ADDR = BOOTBLOCK_END - C_ENV_BOOTBLOCK_SIZE |
| 36 | * | Unused hole | |
| 37 | * | (86KiB) | |
| 38 | * +--------------------------------+ |
| 39 | * | FMAP cache (FMAP_SIZE) | |
| 40 | * +--------------------------------+ PSP_SHAREDMEM_BASE + PSP_SHAREDMEM_SIZE + PRERAM_CBMEM_CONSOLE_SIZE + 0x200 |
| 41 | * | Early Timestamp region (512B) | |
| 42 | * +--------------------------------+ PSP_SHAREDMEM_BASE + PSP_SHAREDMEM_SIZE + PRERAM_CBMEM_CONSOLE_SIZE |
| 43 | * | Preram CBMEM console | |
| 44 | * | (PRERAM_CBMEM_CONSOLE_SIZE) | |
| 45 | * +--------------------------------+ PSP_SHAREDMEM_BASE + PSP_SHAREDMEM_SIZE |
| 46 | * | PSP shared (vboot workbuf) | |
| 47 | * | (PSP_SHAREDMEM_SIZE) | |
| 48 | * +--------------------------------+ PSP_SHAREDMEM_BASE |
| 49 | * | APOB (64KiB) | |
| 50 | * +--------------------------------+ PSP_APOB_DRAM_ADDRESS |
| 51 | * | Early BSP stack | |
| 52 | * | (EARLYRAM_BSP_STACK_SIZE) | |
| 53 | * reserved_dram_start +--------------------------------+ EARLY_RESERVED_DRAM_BASE |
| 54 | * | DRAM | |
| 55 | * +--------------------------------+ 0x100000 |
| 56 | * | Option ROM | |
| 57 | * +--------------------------------+ 0xc0000 |
| 58 | * | Legacy VGA | |
| 59 | * +--------------------------------+ 0xa0000 |
| 60 | * | DRAM | |
| 61 | * +--------------------------------+ 0x0 |
| 62 | */ |
| 63 | void read_soc_memmap_resources(struct device *dev, unsigned long *idx) |
| 64 | { |
| 65 | uint32_t mem_usable = (uintptr_t)cbmem_top(); |
| 66 | |
| 67 | uintptr_t early_reserved_dram_start, early_reserved_dram_end; |
| 68 | const struct memmap_early_dram *e = memmap_get_early_dram_usage(); |
| 69 | |
| 70 | early_reserved_dram_start = e->base; |
| 71 | early_reserved_dram_end = e->base + e->size; |
| 72 | |
| 73 | /* 0x0 - 0x9ffff */ |
| 74 | ram_range(dev, (*idx)++, 0, 0xa0000); |
| 75 | |
| 76 | /* 0xa0000 - 0xbffff: legacy VGA */ |
| 77 | mmio_range(dev, (*idx)++, VGA_MMIO_BASE, VGA_MMIO_SIZE); |
| 78 | |
| 79 | /* 0xc0000 - 0xfffff: Option ROM */ |
| 80 | reserved_ram_from_to(dev, (*idx)++, 0xc0000, 1 * MiB); |
| 81 | |
| 82 | /* 1MB - bottom of DRAM reserved for early coreboot usage */ |
| 83 | ram_from_to(dev, (*idx)++, 1 * MiB, early_reserved_dram_start); |
| 84 | |
| 85 | /* DRAM reserved for early coreboot usage */ |
| 86 | reserved_ram_from_to(dev, (*idx)++, early_reserved_dram_start, early_reserved_dram_end); |
| 87 | |
| 88 | /* top of DRAM consumed early - low top usable RAM |
| 89 | * cbmem_top() accounts for low UMA and TSEG if they are used. */ |
| 90 | ram_from_to(dev, (*idx)++, early_reserved_dram_end, mem_usable); |
| 91 | |
| 92 | /* Reserve fixed IOMMU MMIO region */ |
| 93 | mmio_range(dev, (*idx)++, IOMMU_RESERVED_MMIO_BASE, IOMMU_RESERVED_MMIO_SIZE); |
| 94 | |
| 95 | read_fsp_resources(dev, idx); |
| 96 | } |