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Kyösti Mälkkicf246d52021-01-21 08:17:00 +02001/* SPDX-License-Identifier: GPL-2.0-only */
Kyösti Mälkkifa5f9b52021-01-19 14:12:19 +02002
3#include <acpi/acpigen_extern.asl>
Kyösti Mälkkiae7ac8a2021-01-12 15:23:25 +02004
Kyösti Mälkki84d10cc2021-02-10 17:53:34 +02005#if CONFIG(CHROMEOS_NVS)
Jon Murphyc4e90452022-06-28 10:36:23 -06006/* ChromeOS specific */
Kyösti Mälkkiade4f352021-01-20 23:02:16 +02007#include <vendorcode/google/chromeos/acpi/chromeos.asl>
Kyösti Mälkkiae7ac8a2021-01-12 15:23:25 +02008#endif
Kyösti Mälkkid6ccbb92021-01-15 13:46:11 +02009
Kyösti Mälkkif6f12152020-12-29 09:04:30 +020010/* Operating system enumeration. */
11Name (OSYS, 0)
12
Felix Singer9df60d32022-12-26 09:43:07 +010013/* 0 => PIC mode, 1 => APIC Mode */
14Name (PICM, 0)
Kyösti Mälkkiaa969e82021-01-25 17:05:35 +020015
Kyösti Mälkkid6ccbb92021-01-15 13:46:11 +020016/* Power state (AC = 1) */
Felix Singer7b8ac002022-12-26 08:45:56 +010017Name (PWRS, 1)
Kyösti Mälkkid591a5a2021-01-25 17:05:35 +020018
19/*
20 * The _PIC method is called by the OS to choose between interrupt
21 * routing via the i8259 interrupt controller or the APIC.
22 *
23 * _PIC is called with a parameter of 0 for i8259 configuration and
24 * with a parameter of 1 for Local Apic/IOAPIC configuration.
25 */
26
27Method (_PIC, 1)
28{
29 /* Remember the OS' IRQ routing choice. */
30 PICM = Arg0
31}
Kyösti Mälkkic92efa32021-02-14 00:06:39 +020032
Shelley Chen4e9bb332021-10-20 15:43:45 -070033#if CONFIG(ECAM_MMCONF_SUPPORT)
Kyösti Mälkkic0733e12021-02-14 06:58:39 +020034Scope(\_SB) {
35 /* Base address of PCIe config space */
Shelley Chen4e9bb332021-10-20 15:43:45 -070036 Name(PCBA, CONFIG_ECAM_MMCONF_BASE_ADDRESS)
Kyösti Mälkkic92efa32021-02-14 00:06:39 +020037
Kyösti Mälkkic0733e12021-02-14 06:58:39 +020038 /* Length of PCIe config space, 1MB each bus */
Shelley Chen4e9bb332021-10-20 15:43:45 -070039 Name(PCLN, CONFIG_ECAM_MMCONF_LENGTH)
Kyösti Mälkkic0733e12021-02-14 06:58:39 +020040
41 /* PCIe Configuration Space */
42 OperationRegion(PCFG, SystemMemory, PCBA, PCLN) /* Each bus consumes 1MB */
Arthur Heymansa9a92ac2023-06-08 15:22:27 +020043
44 /* From the Linux documentation (Documentation/PCI/acpi-info.rst):
45 * [6] PCI Firmware 3.2, sec 4.1.2:
46 * If the operating system does not natively comprehend reserving the
47 * MMCFG region, the MMCFG region must be reserved by firmware. The
48 * address range reported in the MCFG table or by _CBA method (see Section
49 * 4.1.3) must be reserved by declaring a motherboard resource. For most
50 * systems, the motherboard resource would appear at the root of the ACPI
51 * namespace (under \_SB) in a node with a _HID of EISAID (PNP0C02), and
52 * the resources in this case should not be claimed in the root PCI bus's
53 * _CRS. The resources can optionally be returned in Int15 E820 or
54 * EFIGetMemoryMap as reserved memory but must always be reported through
55 * ACPI as a motherboard resource.
56 */
57 Device (PERC) // PCI ECAM Resource Consumption
58 {
59 Name (_HID, EisaId("PNP0C02"))
Naresh Solanki1d6eeff2023-11-16 18:25:38 +053060 Method (_CRS, 0, Serialized)
Arthur Heymansa9a92ac2023-06-08 15:22:27 +020061 {
Naresh Solanki1d6eeff2023-11-16 18:25:38 +053062 Name (RBUF, ResourceTemplate ()
63 {
64 QWordMemory (ResourceConsumer, PosDecode, MinFixed, MaxFixed,
65 NonCacheable, ReadWrite,
66 0x0000000000000000, // Granularity
67 0x0000000000000000, // _MIN
68 0x0000000000000001, // _MAX
69 0x0000000000000000, // Translation
70 0x0000000000000002, // _Len
71 ,, _Y00, AddressRangeMemory, TypeStatic)
72 })
73 CreateQWordField (RBUF, \_SB.PERC._CRS._Y00._MIN, MIN1)
74 CreateQWordField (RBUF, \_SB.PERC._CRS._Y00._MAX, MAX1)
75 CreateQWordField (RBUF, \_SB.PERC._CRS._Y00._LEN, LEN1)
76 MIN1 = CONFIG_ECAM_MMCONF_BASE_ADDRESS
77 MAX1 = (MIN1 + CONFIG_ECAM_MMCONF_LENGTH -1)
78 LEN1 = CONFIG_ECAM_MMCONF_LENGTH
79 Return (RBUF)
80 }
Arthur Heymansa9a92ac2023-06-08 15:22:27 +020081 }
Kyösti Mälkkic0733e12021-02-14 06:58:39 +020082}
Kyösti Mälkkic92efa32021-02-14 00:06:39 +020083#endif