| Angel Pons | 182dbde | 2020-04-02 23:49:05 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
| Stefan Reinauer | 8e07382 | 2012-04-04 00:07:22 +0200 | [diff] [blame] | 2 | |
| 3 | #include <console/console.h> |
| Stefan Reinauer | 8e07382 | 2012-04-04 00:07:22 +0200 | [diff] [blame] | 4 | #include <device/device.h> |
| 5 | #include <device/pci.h> |
| Elyes HAOUAS | 551a759 | 2019-05-01 16:56:36 +0200 | [diff] [blame] | 6 | #include <device/pci_ops.h> |
| Patrick Rudolph | 48b2425 | 2018-07-27 18:58:06 +0200 | [diff] [blame] | 7 | #include <southbridge/intel/common/pmbase.h> |
| Elyes HAOUAS | 551a759 | 2019-05-01 16:56:36 +0200 | [diff] [blame] | 8 | #include <southbridge/intel/common/tco.h> |
| Stefan Reinauer | 8e07382 | 2012-04-04 00:07:22 +0200 | [diff] [blame] | 9 | #include <watchdog.h> |
| 10 | |
| Patrick Rudolph | 48b2425 | 2018-07-27 18:58:06 +0200 | [diff] [blame] | 11 | /* |
| Elyes HAOUAS | 551a759 | 2019-05-01 16:56:36 +0200 | [diff] [blame] | 12 | * Disable ICH-NM10-PCH watchdog timer |
| Patrick Rudolph | 48b2425 | 2018-07-27 18:58:06 +0200 | [diff] [blame] | 13 | */ |
| Stefan Reinauer | 8e07382 | 2012-04-04 00:07:22 +0200 | [diff] [blame] | 14 | void watchdog_off(void) |
| 15 | { |
| Patrick Rudolph | 48b2425 | 2018-07-27 18:58:06 +0200 | [diff] [blame] | 16 | unsigned int value; |
| Elyes HAOUAS | 4aec340 | 2018-05-25 08:29:27 +0200 | [diff] [blame] | 17 | struct device *dev; |
| Stefan Reinauer | 8e07382 | 2012-04-04 00:07:22 +0200 | [diff] [blame] | 18 | |
| Patrick Rudolph | 48b2425 | 2018-07-27 18:58:06 +0200 | [diff] [blame] | 19 | /* Get LPC device. */ |
| Kyösti Mälkki | c70eed1 | 2018-05-22 02:18:00 +0300 | [diff] [blame] | 20 | dev = pcidev_on_root(0x1f, 0); |
| Stefan Reinauer | 8e07382 | 2012-04-04 00:07:22 +0200 | [diff] [blame] | 21 | |
| Patrick Rudolph | 48b2425 | 2018-07-27 18:58:06 +0200 | [diff] [blame] | 22 | value = pci_read_config16(dev, PCI_COMMAND); |
| Elyes HAOUAS | 551a759 | 2019-05-01 16:56:36 +0200 | [diff] [blame] | 23 | |
| Arthur Heymans | c2c634a | 2019-11-19 18:37:28 +0100 | [diff] [blame] | 24 | /* Disable interrupt. */ |
| 25 | value |= PCI_COMMAND_INT_DISABLE; |
| Patrick Rudolph | 48b2425 | 2018-07-27 18:58:06 +0200 | [diff] [blame] | 26 | pci_write_config16(dev, PCI_COMMAND, value); |
| Stefan Reinauer | 8e07382 | 2012-04-04 00:07:22 +0200 | [diff] [blame] | 27 | |
| 28 | /* Disable the watchdog timer. */ |
| Elyes HAOUAS | 551a759 | 2019-05-01 16:56:36 +0200 | [diff] [blame] | 29 | value = read_pmbase16(PMBASE_TCO_OFFSET + TCO1_CNT); |
| Marek Maslanka | 06798cd | 2024-01-17 14:57:36 +0000 | [diff] [blame] | 30 | value |= TCO1_TMR_HLT; |
| Elyes HAOUAS | 551a759 | 2019-05-01 16:56:36 +0200 | [diff] [blame] | 31 | write_pmbase16(PMBASE_TCO_OFFSET + TCO1_CNT, value); |
| Stefan Reinauer | 8e07382 | 2012-04-04 00:07:22 +0200 | [diff] [blame] | 32 | |
| 33 | /* Clear TCO timeout status. */ |
| Marek Maslanka | 06798cd | 2024-01-17 14:57:36 +0000 | [diff] [blame] | 34 | write_pmbase16(PMBASE_TCO_OFFSET + TCO1_STS, TCO1_STS_TIMEOUT); |
| Kyösti Mälkki | 307320c | 2022-11-21 17:27:07 +0200 | [diff] [blame] | 35 | write_pmbase16(PMBASE_TCO_OFFSET + TCO2_STS, TCO2_STS_SECOND_TO); |
| Stefan Reinauer | 8e07382 | 2012-04-04 00:07:22 +0200 | [diff] [blame] | 36 | |
| Elyes HAOUAS | 551a759 | 2019-05-01 16:56:36 +0200 | [diff] [blame] | 37 | printk(BIOS_DEBUG, "ICH-NM10-PCH: watchdog disabled\n"); |
| Stefan Reinauer | 8e07382 | 2012-04-04 00:07:22 +0200 | [diff] [blame] | 38 | } |