Angel Pons | 182dbde | 2020-04-02 23:49:05 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
Patrick Rudolph | 853bb4d | 2018-06-28 13:58:36 +0200 | [diff] [blame] | 2 | |
Furquan Shaikh | 76cedd2 | 2020-05-02 10:24:23 -0700 | [diff] [blame] | 3 | #include <acpi/acpi.h> |
Patrick Rudolph | 853bb4d | 2018-06-28 13:58:36 +0200 | [diff] [blame] | 4 | #include <arch/io.h> |
Kyösti Mälkki | e742b68 | 2023-04-10 17:03:32 +0300 | [diff] [blame] | 5 | #include <arch/ioapic.h> |
Elyes Haouas | 89d9bf9 | 2022-10-02 20:05:20 +0200 | [diff] [blame] | 6 | #include <assert.h> |
Bill XIE | 516c0a5 | 2020-02-24 23:08:35 +0800 | [diff] [blame] | 7 | #include <bootmode.h> |
Kyösti Mälkki | f1b58b7 | 2019-03-01 13:43:02 +0200 | [diff] [blame] | 8 | #include <device/pci_ops.h> |
Elyes Haouas | 89d9bf9 | 2022-10-02 20:05:20 +0200 | [diff] [blame] | 9 | #include <device/pci_type.h> |
Kyösti Mälkki | 83faa5d | 2023-01-05 15:39:16 +0200 | [diff] [blame] | 10 | #include <halt.h> |
Elyes Haouas | 89d9bf9 | 2022-10-02 20:05:20 +0200 | [diff] [blame] | 11 | #include <stdint.h> |
Patrick Rudolph | 853bb4d | 2018-06-28 13:58:36 +0200 | [diff] [blame] | 12 | |
| 13 | #include "pmbase.h" |
Joel Kitching | 1d93b88 | 2018-09-26 17:58:14 +0800 | [diff] [blame] | 14 | #include "pmutil.h" |
Patrick Rudolph | 853bb4d | 2018-06-28 13:58:36 +0200 | [diff] [blame] | 15 | |
| 16 | /* LPC PM Base Address Register */ |
| 17 | #define PMBASE 0x40 |
| 18 | #define PMSIZE 0x80 |
| 19 | |
Patrick Rudolph | 853bb4d | 2018-06-28 13:58:36 +0200 | [diff] [blame] | 20 | u16 lpc_get_pmbase(void) |
| 21 | { |
Kyösti Mälkki | 21d6a27 | 2019-11-05 18:50:38 +0200 | [diff] [blame] | 22 | #ifdef __SIMPLE_DEVICE__ |
Patrick Rudolph | 853bb4d | 2018-06-28 13:58:36 +0200 | [diff] [blame] | 23 | /* Don't assume PMBASE is still the same */ |
Angel Pons | ac9af1a | 2021-04-17 12:32:38 +0200 | [diff] [blame] | 24 | return pci_read_config16(PCI_DEV(0, 0x1f, 0), PMBASE) & 0xfffc; |
Patrick Rudolph | 853bb4d | 2018-06-28 13:58:36 +0200 | [diff] [blame] | 25 | #else |
Arthur Heymans | f751aee | 2018-12-29 13:35:26 +0100 | [diff] [blame] | 26 | static u16 pmbase; |
Patrick Rudolph | 853bb4d | 2018-06-28 13:58:36 +0200 | [diff] [blame] | 27 | |
| 28 | if (pmbase) |
| 29 | return pmbase; |
| 30 | |
Angel Pons | ac9af1a | 2021-04-17 12:32:38 +0200 | [diff] [blame] | 31 | pmbase = pci_read_config16(pcidev_on_root(0x1f, 0), PMBASE) & 0xfffc; |
Patrick Rudolph | 853bb4d | 2018-06-28 13:58:36 +0200 | [diff] [blame] | 32 | |
| 33 | return pmbase; |
| 34 | #endif |
| 35 | } |
| 36 | |
| 37 | void write_pmbase32(const u8 addr, const u32 val) |
| 38 | { |
| 39 | ASSERT(addr <= (PMSIZE - sizeof(u32))); |
| 40 | |
| 41 | outl(val, lpc_get_pmbase() + addr); |
| 42 | } |
| 43 | |
| 44 | void write_pmbase16(const u8 addr, const u16 val) |
| 45 | { |
| 46 | ASSERT(addr <= (PMSIZE - sizeof(u16))); |
| 47 | |
| 48 | outw(val, lpc_get_pmbase() + addr); |
| 49 | } |
| 50 | |
| 51 | void write_pmbase8(const u8 addr, const u8 val) |
| 52 | { |
| 53 | ASSERT(addr <= (PMSIZE - sizeof(u8))); |
| 54 | |
| 55 | outb(val, lpc_get_pmbase() + addr); |
| 56 | } |
| 57 | |
| 58 | u32 read_pmbase32(const u8 addr) |
| 59 | { |
| 60 | ASSERT(addr <= (PMSIZE - sizeof(u32))); |
| 61 | |
| 62 | return inl(lpc_get_pmbase() + addr); |
| 63 | } |
| 64 | |
| 65 | u16 read_pmbase16(const u8 addr) |
| 66 | { |
| 67 | ASSERT(addr <= (PMSIZE - sizeof(u16))); |
| 68 | |
| 69 | return inw(lpc_get_pmbase() + addr); |
| 70 | } |
| 71 | |
| 72 | u8 read_pmbase8(const u8 addr) |
| 73 | { |
| 74 | ASSERT(addr <= (PMSIZE - sizeof(u8))); |
| 75 | |
| 76 | return inb(lpc_get_pmbase() + addr); |
| 77 | } |
Joel Kitching | 1d93b88 | 2018-09-26 17:58:14 +0800 | [diff] [blame] | 78 | |
Arthur Heymans | 89c5553 | 2021-05-05 10:39:00 +0200 | [diff] [blame] | 79 | int acpi_get_sleep_type(void) |
| 80 | { |
| 81 | return acpi_sleep_from_pm1(read_pmbase32(PM1_CNT)); |
| 82 | } |
| 83 | |
Arthur Heymans | a2c5115 | 2021-05-05 10:42:24 +0200 | [diff] [blame] | 84 | /* |
| 85 | * Note that southbridge_detect_s3_resume clears the sleep state, |
| 86 | * so this may not be used reliable throughout romstage. |
| 87 | */ |
Bill XIE | 516c0a5 | 2020-02-24 23:08:35 +0800 | [diff] [blame] | 88 | int platform_is_resuming(void) |
Joel Kitching | 1d93b88 | 2018-09-26 17:58:14 +0800 | [diff] [blame] | 89 | { |
| 90 | u16 reg16 = read_pmbase16(PM1_STS); |
| 91 | |
| 92 | if (!(reg16 & WAK_STS)) |
| 93 | return 0; |
| 94 | |
Arthur Heymans | a2c5115 | 2021-05-05 10:42:24 +0200 | [diff] [blame] | 95 | return acpi_get_sleep_type() == ACPI_S3; |
Joel Kitching | 1d93b88 | 2018-09-26 17:58:14 +0800 | [diff] [blame] | 96 | } |
Kyösti Mälkki | e742b68 | 2023-04-10 17:03:32 +0300 | [diff] [blame] | 97 | |
Kyösti Mälkki | 83faa5d | 2023-01-05 15:39:16 +0200 | [diff] [blame] | 98 | void poweroff(void) |
| 99 | { |
| 100 | uint32_t pm1_cnt; |
| 101 | |
| 102 | /* Go to S5 */ |
| 103 | pm1_cnt = read_pmbase32(PM1_CNT); |
| 104 | pm1_cnt |= (0xf << 10); |
| 105 | write_pmbase32(PM1_CNT, pm1_cnt); |
| 106 | } |
| 107 | |
Kyösti Mälkki | e742b68 | 2023-04-10 17:03:32 +0300 | [diff] [blame] | 108 | #define ACPI_SCI_IRQ 9 |
| 109 | |
| 110 | void ioapic_get_sci_pin(u8 *gsi, u8 *irq, u8 *flags) |
| 111 | { |
| 112 | *gsi = ACPI_SCI_IRQ; |
| 113 | *irq = ACPI_SCI_IRQ; |
| 114 | *flags = MP_IRQ_TRIGGER_LEVEL | MP_IRQ_POLARITY_HIGH; |
| 115 | } |