Mario Scheithauer | e27f654 | 2023-01-25 13:50:05 +0100 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
| 2 | |
| 3 | #include <baseboard/variants.h> |
| 4 | #include <commonlib/helpers.h> |
| 5 | |
| 6 | /* Pad configuration in ramstage */ |
| 7 | static const struct pad_config gpio_table[] = { |
| 8 | /* Community 0 - GpioGroup GPP_B */ |
| 9 | PAD_CFG_NF(GPP_B2, NONE, PLTRST, NF1), /* PMC_VRALERT_N */ |
| 10 | PAD_CFG_NF(GPP_B3, NONE, PLTRST, NF4), /* ESPI_ALERT0_N */ |
Mario Scheithauer | ae5852b | 2023-04-04 11:07:30 +0200 | [diff] [blame] | 11 | PAD_NC(GPP_B4, NONE), /* Not connected */ |
Mario Scheithauer | e27f654 | 2023-01-25 13:50:05 +0100 | [diff] [blame] | 12 | PAD_NC(GPP_B9, NONE), /* Not connected */ |
| 13 | PAD_NC(GPP_B10, NONE), /* Not connected */ |
| 14 | PAD_CFG_NF(GPP_B11, NONE, PLTRST, NF1), /* PMC_ALERT_N */ |
| 15 | PAD_NC(GPP_B14, NONE), /* Not connected */ |
Mario Scheithauer | ae5852b | 2023-04-04 11:07:30 +0200 | [diff] [blame] | 16 | PAD_NC(GPP_B15, NONE), /* Not connected */ |
Mario Scheithauer | e27f654 | 2023-01-25 13:50:05 +0100 | [diff] [blame] | 17 | PAD_NC(GPP_B18, NONE), /* Not connected */ |
| 18 | PAD_NC(GPP_B19, NONE), /* Not connected */ |
Mario Scheithauer | e27f654 | 2023-01-25 13:50:05 +0100 | [diff] [blame] | 19 | PAD_NC(GPP_B23, NONE), /* Not connected */ |
| 20 | |
| 21 | /* Community 0 - GpioGroup GPP_T */ |
Mario Scheithauer | e27f654 | 2023-01-25 13:50:05 +0100 | [diff] [blame] | 22 | PAD_CFG_NF(GPP_T12, NONE, DEEP, NF2), /* SIO_UART0_RXD */ |
| 23 | PAD_CFG_NF(GPP_T13, NONE, DEEP, NF2), /* SIO_UART0_TXD */ |
| 24 | |
| 25 | /* Community 0 - GpioGroup GPP_G */ |
| 26 | PAD_NC(GPP_G8, NONE), /* Not connected */ |
| 27 | PAD_NC(GPP_G9, NONE), /* Not connected */ |
| 28 | PAD_NC(GPP_G12, NONE), /* Not connected */ |
| 29 | PAD_CFG_NF(GPP_G15, NONE, DEEP, NF1), /* ESPI_IO_0 */ |
| 30 | PAD_CFG_NF(GPP_G16, NONE, DEEP, NF1), /* ESPI_IO_1 */ |
| 31 | PAD_CFG_NF(GPP_G17, NONE, DEEP, NF1), /* ESPI_IO_2 */ |
| 32 | PAD_CFG_NF(GPP_G18, NONE, DEEP, NF1), /* ESPI_IO_3 */ |
Mario Scheithauer | e27f654 | 2023-01-25 13:50:05 +0100 | [diff] [blame] | 33 | PAD_CFG_NF(GPP_G20, NONE, DEEP, NF1), /* ESPI_CSO_N */ |
| 34 | PAD_CFG_NF(GPP_G21, NONE, DEEP, NF1), /* ESPI_CLK */ |
| 35 | PAD_CFG_NF(GPP_G22, NONE, DEEP, NF1), /* ESPI_RST0_N */ |
| 36 | |
| 37 | /* Community 1 - GpioGroup GPP_V */ |
| 38 | PAD_CFG_NF(GPP_V0, UP_20K, DEEP, NF1), /* EMMC_CMD */ |
| 39 | PAD_CFG_NF(GPP_V1, UP_20K, DEEP, NF1), /* EMMC_DATA0 */ |
| 40 | PAD_CFG_NF(GPP_V2, UP_20K, DEEP, NF1), /* EMMC_DATA1 */ |
| 41 | PAD_CFG_NF(GPP_V3, UP_20K, DEEP, NF1), /* EMMC_DATA2 */ |
| 42 | PAD_CFG_NF(GPP_V4, UP_20K, DEEP, NF1), /* EMMC_DATA3 */ |
| 43 | PAD_CFG_NF(GPP_V5, UP_20K, DEEP, NF1), /* EMMC_DATA4 */ |
| 44 | PAD_CFG_NF(GPP_V6, UP_20K, DEEP, NF1), /* EMMC_DATA5 */ |
| 45 | PAD_CFG_NF(GPP_V7, UP_20K, DEEP, NF1), /* EMMC_DATA6 */ |
| 46 | PAD_CFG_NF(GPP_V8, UP_20K, DEEP, NF1), /* EMMC_DATA7 */ |
| 47 | PAD_CFG_NF(GPP_V9, DN_20K, DEEP, NF1), /* EMMC_RCLK */ |
| 48 | PAD_CFG_NF(GPP_V10, DN_20K, DEEP, NF1), /* EMMC_CLK */ |
Mario Scheithauer | ae5852b | 2023-04-04 11:07:30 +0200 | [diff] [blame] | 49 | PAD_CFG_NF(GPP_V11, NONE, DEEP, NF1), /* EMMC_RESET */ |
Mario Scheithauer | e27f654 | 2023-01-25 13:50:05 +0100 | [diff] [blame] | 50 | |
| 51 | /* Community 1 - GpioGroup GPP_H */ |
Mario Scheithauer | e27f654 | 2023-01-25 13:50:05 +0100 | [diff] [blame] | 52 | PAD_CFG_NF(GPP_H8, UP_20K, DEEP, NF1), /* SIO_I2C4_SDA */ |
| 53 | PAD_CFG_NF(GPP_H9, UP_20K, DEEP, NF1), /* SIO_I2C4_SCL */ |
| 54 | |
| 55 | /* Community 1 - GpioGroup GPP_D */ |
| 56 | PAD_CFG_GPO(GPP_D16, 0, DEEP), /* EMMC_PWR_EN_N */ |
| 57 | |
| 58 | /* Community 1 - GpioGroup GPP_U */ |
Mario Scheithauer | e27f654 | 2023-01-25 13:50:05 +0100 | [diff] [blame] | 59 | PAD_NC(GPP_U12, NONE), /* Not connected */ |
| 60 | PAD_NC(GPP_U13, NONE), /* Not connected */ |
| 61 | PAD_NC(GPP_U16, NONE), /* Not connected */ |
| 62 | PAD_NC(GPP_U17, NONE), /* Not connected */ |
| 63 | PAD_NC(GPP_U18, NONE), /* Not connected */ |
Mario Scheithauer | e27f654 | 2023-01-25 13:50:05 +0100 | [diff] [blame] | 64 | |
| 65 | /* Community 2 - GpioGroup DSW */ |
| 66 | PAD_CFG_NF(GPD4, NONE, PLTRST, NF1), /* SLP_S3 */ |
| 67 | PAD_CFG_NF(GPD5, NONE, PLTRST, NF1), /* SLP_S4 */ |
| 68 | PAD_NC(GPD7, NONE), /* Not connected */ |
Mario Scheithauer | ae5852b | 2023-04-04 11:07:30 +0200 | [diff] [blame] | 69 | PAD_NC(GPD9, NONE), /* Not connected */ |
Mario Scheithauer | e27f654 | 2023-01-25 13:50:05 +0100 | [diff] [blame] | 70 | PAD_CFG_NF(GPD10, NONE, PLTRST, NF1), /* SLP_S5 */ |
Mario Scheithauer | ae5852b | 2023-04-04 11:07:30 +0200 | [diff] [blame] | 71 | PAD_NC(GPD11, NONE), /* Not connected */ |
Mario Scheithauer | e27f654 | 2023-01-25 13:50:05 +0100 | [diff] [blame] | 72 | |
| 73 | /* Community 3 - GpioGroup GPP_S */ |
| 74 | PAD_NC(GPP_S0, NONE), /* Not connected */ |
| 75 | PAD_NC(GPP_S1, NONE), /* Not connected */ |
| 76 | |
Mario Scheithauer | e27f654 | 2023-01-25 13:50:05 +0100 | [diff] [blame] | 77 | /* Community 4 - GpioGroup GPP_C */ |
Mario Scheithauer | e27f654 | 2023-01-25 13:50:05 +0100 | [diff] [blame] | 78 | PAD_NC(GPP_C5, NONE), /* Not connected */ |
Mario Scheithauer | e27f654 | 2023-01-25 13:50:05 +0100 | [diff] [blame] | 79 | PAD_NC(GPP_C8, NONE), /* Not connected */ |
| 80 | PAD_CFG_NF(GPP_C12, NONE, DEEP, NF4), /* SIO_UART1_RXD */ |
| 81 | PAD_CFG_NF(GPP_C13, NONE, DEEP, NF4), /* SIO_UART1_TXD */ |
Mario Scheithauer | e27f654 | 2023-01-25 13:50:05 +0100 | [diff] [blame] | 82 | PAD_CFG_NF(GPP_C18, NONE, DEEP, NF4), /* SIO_I2C1_SDA */ |
| 83 | PAD_CFG_NF(GPP_C19, NONE, DEEP, NF4), /* SIO_I2C1_SCL */ |
| 84 | |
| 85 | /* Community 4 - GpioGroup GPP_F */ |
| 86 | PAD_NC(GPP_F0, NONE), /* Not connected */ |
| 87 | PAD_NC(GPP_F1, NONE), /* Not connected */ |
| 88 | PAD_NC(GPP_F2, NONE), /* Not connected */ |
| 89 | PAD_NC(GPP_F3, NONE), /* Not connected */ |
| 90 | PAD_NC(GPP_F4, NONE), /* Not connected */ |
| 91 | PAD_NC(GPP_F5, NONE), /* Not connected */ |
| 92 | PAD_NC(GPP_F7, NONE), /* Not connected */ |
| 93 | PAD_NC(GPP_F8, NONE), /* Not connected */ |
| 94 | PAD_NC(GPP_F10, NONE), /* Not connected */ |
| 95 | PAD_NC(GPP_F11, NONE), /* Not connected */ |
| 96 | PAD_NC(GPP_F12, NONE), /* Not connected */ |
| 97 | PAD_NC(GPP_F13, NONE), /* Not connected */ |
| 98 | PAD_NC(GPP_F14, NONE), /* Not connected */ |
| 99 | PAD_NC(GPP_F15, NONE), /* Not connected */ |
| 100 | PAD_NC(GPP_F16, NONE), /* Not connected */ |
| 101 | PAD_NC(GPP_F17, NONE), /* Not connected */ |
| 102 | PAD_NC(GPP_F20, NONE), /* Not connected */ |
| 103 | PAD_NC(GPP_F21, NONE), /* Not connected */ |
| 104 | |
| 105 | /* Community 4 - GpioGroup GPP_E */ |
| 106 | PAD_CFG_NF(GPP_E0, NONE, DEEP, NF1), /* SATA_LED_N */ |
Mario Scheithauer | e27f654 | 2023-01-25 13:50:05 +0100 | [diff] [blame] | 107 | PAD_NC(GPP_E6, NONE), /* Not connected */ |
Mario Scheithauer | e27f654 | 2023-01-25 13:50:05 +0100 | [diff] [blame] | 108 | PAD_NC(GPP_E15, NONE), /* Not connected */ |
| 109 | PAD_NC(GPP_E16, NONE), /* Not connected */ |
Mario Scheithauer | ae5852b | 2023-04-04 11:07:30 +0200 | [diff] [blame] | 110 | PAD_NC(GPP_E18, NONE), /* Not connected */ |
| 111 | PAD_NC(GPP_E19, NONE), /* Not connected */ |
Mario Scheithauer | e27f654 | 2023-01-25 13:50:05 +0100 | [diff] [blame] | 112 | PAD_NC(GPP_E23, NONE), /* Not connected */ |
| 113 | |
| 114 | /* Community 5 - GpioGroup GPP_R */ |
| 115 | PAD_NC(GPP_R1, NONE), /* Not connected */ |
Mario Scheithauer | e27f654 | 2023-01-25 13:50:05 +0100 | [diff] [blame] | 116 | PAD_NC(GPP_R3, NONE), /* Not connected */ |
| 117 | }; |
| 118 | |
| 119 | /* Early pad configuration in bootblock */ |
| 120 | static const struct pad_config early_gpio_table[] = { |
Mario Scheithauer | 0ec7a9f | 2023-07-04 15:41:35 +0200 | [diff] [blame] | 121 | PAD_CFG_GPI(GPP_B5, NONE, DEEP), /* DRAM population */ |
Mario Scheithauer | e27f654 | 2023-01-25 13:50:05 +0100 | [diff] [blame] | 122 | PAD_CFG_NF(GPP_C0, NONE, DEEP, NF1), /* SMB_CLK */ |
| 123 | PAD_CFG_NF(GPP_C1, NONE, DEEP, NF1), /* SMB_DATA */ |
| 124 | PAD_CFG_NF(GPP_C2, NONE, DEEP, NF2), /* SMB_ALERT_N */ |
| 125 | PAD_CFG_NF(GPP_C20, NONE, DEEP, NF4), /* SIO_UART2_RXD */ |
| 126 | PAD_CFG_NF(GPP_C21, NONE, DEEP, NF4), /* SIO_UART2_TXD */ |
| 127 | }; |
| 128 | |
| 129 | const struct pad_config *variant_gpio_table(size_t *num) |
| 130 | { |
| 131 | *num = ARRAY_SIZE(gpio_table); |
| 132 | return gpio_table; |
| 133 | } |
| 134 | |
| 135 | const struct pad_config *variant_early_gpio_table(size_t *num) |
| 136 | { |
| 137 | *num = ARRAY_SIZE(early_gpio_table); |
| 138 | return early_gpio_table; |
| 139 | } |