V Sowmya | ce07b5c | 2020-12-17 08:03:03 +0530 | [diff] [blame] | 1 | chip soc/intel/alderlake |
V Sowmya | 1b150cb | 2021-01-15 14:01:54 +0530 | [diff] [blame] | 2 | |
Arthur Heymans | 69cd729 | 2022-11-07 13:52:11 +0100 | [diff] [blame] | 3 | device cpu_cluster 0 on end |
V Sowmya | 1b150cb | 2021-01-15 14:01:54 +0530 | [diff] [blame] | 4 | |
| 5 | # GPE configuration |
| 6 | # Note that GPE events called out in ASL code rely on this |
| 7 | # route. i.e. If this route changes then the affected GPE |
| 8 | # offset bits also need to be changed. |
| 9 | register "pmc_gpe0_dw0" = "GPP_C" |
| 10 | register "pmc_gpe0_dw1" = "GPP_D" |
| 11 | register "pmc_gpe0_dw2" = "GPP_E" |
| 12 | |
V Sowmya | 8cb7af8 | 2021-02-23 13:31:34 +0530 | [diff] [blame] | 13 | # TCSS |
MAULIK V VAGHELA | 215a97e | 2022-03-07 18:39:17 +0530 | [diff] [blame] | 14 | register "tcss_aux_ori" = "1" |
Deepti Deshatty | 8e7facf | 2021-05-12 17:45:37 +0530 | [diff] [blame] | 15 | register "typec_aux_bias_pads[0]" = "{.pad_auxp_dc = GPP_A5, .pad_auxn_dc = GPP_A6}" |
V Sowmya | 8cb7af8 | 2021-02-23 13:31:34 +0530 | [diff] [blame] | 16 | |
Sridhar Siricilla | fce0954 | 2021-04-08 13:27:13 +0530 | [diff] [blame] | 17 | # Enable CNVi Bluetooth |
MAULIK V VAGHELA | 215a97e | 2022-03-07 18:39:17 +0530 | [diff] [blame] | 18 | register "cnvi_bt_core" = "true" |
Sridhar Siricilla | fce0954 | 2021-04-08 13:27:13 +0530 | [diff] [blame] | 19 | |
V Sowmya | ae930d8 | 2021-01-20 07:55:20 +0530 | [diff] [blame] | 20 | # FSP configuration |
MAULIK V VAGHELA | 215a97e | 2022-03-07 18:39:17 +0530 | [diff] [blame] | 21 | register "sagv" = "SaGv_Enabled" |
V Sowmya | ae930d8 | 2021-01-20 07:55:20 +0530 | [diff] [blame] | 22 | |
| 23 | # S0ix enable |
| 24 | register "s0ix_enable" = "1" |
| 25 | |
| 26 | register "usb2_ports[0]" = "USB2_PORT_MID(OC1)" # Type-A Port A0 |
| 27 | register "usb2_ports[1]" = "USB2_PORT_MID(OC2)" # Type-A Port A1 |
| 28 | register "usb2_ports[2]" = "USB2_PORT_MID(OC_SKIP)" # M.2 WWAN |
| 29 | register "usb2_ports[3]" = "USB2_PORT_MID(OC0)" # Type-A / Type-C Cl |
| 30 | register "usb2_ports[4]" = "USB2_PORT_MID(OC_SKIP)" # M.2 Camera |
| 31 | register "usb2_ports[5]" = "USB2_PORT_MID(OC3)" # Type-A / Type-C Co |
| 32 | register "usb2_ports[9]" = "USB2_PORT_MID(OC_SKIP)" # M.2 Bluetooth |
| 33 | |
| 34 | register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC1)" # USB3/2 Type A port A0 |
| 35 | register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC2)" # USB3/2 Type A port A1 |
| 36 | register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC_SKIP)" # M.2 WWAN |
| 37 | |
V Sowmya | 1b150cb | 2021-01-15 14:01:54 +0530 | [diff] [blame] | 38 | # EC host command ranges are in 0x800-0x8ff & 0x200-0x20f |
| 39 | register "gen1_dec" = "0x00fc0801" |
| 40 | register "gen2_dec" = "0x000c0201" |
| 41 | # EC memory map range is 0x900-0x9ff |
| 42 | register "gen3_dec" = "0x00fc0901" |
V Sowmya | 738aaa2 | 2021-01-20 07:15:37 +0530 | [diff] [blame] | 43 | |
| 44 | # Enable PCH PCIE RP 5 using CLK 1 |
| 45 | register "pch_pcie_rp[PCH_RP(5)]" = "{ |
| 46 | .clk_src = 1, |
| 47 | .clk_req = 1, |
| 48 | .flags = PCIE_RP_CLK_REQ_DETECT, |
| 49 | }" |
| 50 | |
| 51 | # Enable NVMe PCIE 9 using clk 0 |
| 52 | register "pch_pcie_rp[PCH_RP(9)]" = "{ |
| 53 | .clk_src = 0, |
| 54 | .clk_req = 0, |
| 55 | .flags = PCIE_RP_LTR, |
| 56 | }" |
| 57 | |
| 58 | # Enable SD Card PCIE 8 using clk 3 |
| 59 | register "pch_pcie_rp[PCH_RP(8)]" = "{ |
| 60 | .clk_src = 3, |
| 61 | .clk_req = 3, |
| 62 | .flags = PCIE_RP_HOTPLUG | PCIE_RP_LTR, |
| 63 | }" |
V Sowmya | 1b150cb | 2021-01-15 14:01:54 +0530 | [diff] [blame] | 64 | |
V Sowmya | ae930d8 | 2021-01-20 07:55:20 +0530 | [diff] [blame] | 65 | # Enable SATA |
MAULIK V VAGHELA | 215a97e | 2022-03-07 18:39:17 +0530 | [diff] [blame] | 66 | register "sata_mode" = "0" |
| 67 | register "sata_salp_support" = "1" |
| 68 | register "sata_ports_enable[0]" = "0" |
| 69 | register "sata_ports_enable[1]" = "1" |
| 70 | register "sata_ports_dev_slp[0]" = "0" |
| 71 | register "sata_ports_dev_slp[1]" = "1" |
| 72 | register "sata_ports_enable_dito_config[1]" = "1" |
V Sowmya | ae930d8 | 2021-01-20 07:55:20 +0530 | [diff] [blame] | 73 | |
MAULIK V VAGHELA | 215a97e | 2022-03-07 18:39:17 +0530 | [diff] [blame] | 74 | register "serial_io_i2c_mode" = "{ |
V Sowmya | ae930d8 | 2021-01-20 07:55:20 +0530 | [diff] [blame] | 75 | [PchSerialIoIndexI2C0] = PchSerialIoPci, |
| 76 | [PchSerialIoIndexI2C1] = PchSerialIoPci, |
| 77 | [PchSerialIoIndexI2C2] = PchSerialIoPci, |
| 78 | [PchSerialIoIndexI2C3] = PchSerialIoPci, |
| 79 | [PchSerialIoIndexI2C4] = PchSerialIoDisabled, |
| 80 | [PchSerialIoIndexI2C5] = PchSerialIoPci, |
| 81 | }" |
| 82 | |
MAULIK V VAGHELA | 215a97e | 2022-03-07 18:39:17 +0530 | [diff] [blame] | 83 | register "serial_io_gspi_mode" = "{ |
V Sowmya | ae930d8 | 2021-01-20 07:55:20 +0530 | [diff] [blame] | 84 | [PchSerialIoIndexGSPI0] = PchSerialIoPci, |
Sridhar Siricilla | 72e736d | 2021-04-08 15:47:24 +0530 | [diff] [blame] | 85 | [PchSerialIoIndexGSPI1] = PchSerialIoDisabled, |
V Sowmya | ae930d8 | 2021-01-20 07:55:20 +0530 | [diff] [blame] | 86 | [PchSerialIoIndexGSPI2] = PchSerialIoDisabled, |
| 87 | [PchSerialIoIndexGSPI3] = PchSerialIoDisabled, |
| 88 | }" |
| 89 | |
MAULIK V VAGHELA | 215a97e | 2022-03-07 18:39:17 +0530 | [diff] [blame] | 90 | register "serial_io_gspi_cs_mode" = "{ |
V Sowmya | ae930d8 | 2021-01-20 07:55:20 +0530 | [diff] [blame] | 91 | [PchSerialIoIndexGSPI0] = 1, |
V Sowmya | ae930d8 | 2021-01-20 07:55:20 +0530 | [diff] [blame] | 92 | }" |
| 93 | |
MAULIK V VAGHELA | 215a97e | 2022-03-07 18:39:17 +0530 | [diff] [blame] | 94 | register "serial_io_gspi_cs_state" = "{ |
V Sowmya | ae930d8 | 2021-01-20 07:55:20 +0530 | [diff] [blame] | 95 | [PchSerialIoIndexGSPI0] = 1, |
V Sowmya | ae930d8 | 2021-01-20 07:55:20 +0530 | [diff] [blame] | 96 | }" |
| 97 | |
MAULIK V VAGHELA | 215a97e | 2022-03-07 18:39:17 +0530 | [diff] [blame] | 98 | register "serial_io_uart_mode" = "{ |
Subrata Banik | 93632a9 | 2021-06-04 14:09:13 +0530 | [diff] [blame] | 99 | [PchSerialIoIndexUART0] = PchSerialIoSkipInit, |
V Sowmya | ae930d8 | 2021-01-20 07:55:20 +0530 | [diff] [blame] | 100 | [PchSerialIoIndexUART1] = PchSerialIoDisabled, |
| 101 | [PchSerialIoIndexUART2] = PchSerialIoDisabled, |
| 102 | }" |
| 103 | |
| 104 | # HD Audio |
MAULIK V VAGHELA | 215a97e | 2022-03-07 18:39:17 +0530 | [diff] [blame] | 105 | register "pch_hda_dsp_enable" = "1" |
| 106 | register "pch_hda_idisp_link_tmode" = "HDA_TMODE_8T" |
| 107 | register "pch_hda_idisp_link_frequency" = "HDA_LINKFREQ_96MHZ" |
| 108 | register "pch_hda_idisp_codec_enable" = "1" |
V Sowmya | ae930d8 | 2021-01-20 07:55:20 +0530 | [diff] [blame] | 109 | |
| 110 | # DP port |
MAULIK V VAGHELA | 215a97e | 2022-03-07 18:39:17 +0530 | [diff] [blame] | 111 | register "ddi_portA_config" = "1" # eDP |
| 112 | register "ddi_portB_config" = "0" |
V Sowmya | ae930d8 | 2021-01-20 07:55:20 +0530 | [diff] [blame] | 113 | |
Subrata Banik | 8a18bd8 | 2021-06-09 21:57:49 +0530 | [diff] [blame] | 114 | # Enable Display Port Configuration |
| 115 | register "ddi_ports_config" = "{ |
| 116 | [DDI_PORT_A] = DDI_ENABLE_HPD, |
| 117 | [DDI_PORT_B] = DDI_ENABLE_HPD | DDI_ENABLE_DDC, |
| 118 | [DDI_PORT_1] = DDI_ENABLE_HPD, |
| 119 | [DDI_PORT_2] = DDI_ENABLE_HPD, |
| 120 | }" |
V Sowmya | ae930d8 | 2021-01-20 07:55:20 +0530 | [diff] [blame] | 121 | |
| 122 | # Intel Common SoC Config |
| 123 | #+-------------------+---------------------------+ |
| 124 | #| Field | Value | |
| 125 | #+-------------------+---------------------------+ |
V Sowmya | ae930d8 | 2021-01-20 07:55:20 +0530 | [diff] [blame] | 126 | #| GSPI0 | cr50 TPM. Early init is | |
| 127 | #| | required to set up a BAR | |
| 128 | #| | for TPM communication | |
| 129 | #| | before memory is up | |
| 130 | #| GSPI1 | Fingerprint MCU | |
| 131 | #| I2C0 | SAR0, WWAN, HDMI | |
| 132 | #| I2C1 | Camera | |
| 133 | #| I2C2 | Audio | |
| 134 | #| I2C3 | Touchscreen, USI | |
| 135 | #| I2C5 | Trackpad | |
| 136 | #+-------------------+---------------------------+ |
| 137 | register "common_soc_config" = "{ |
V Sowmya | ae930d8 | 2021-01-20 07:55:20 +0530 | [diff] [blame] | 138 | .gspi[0] = { |
| 139 | .speed_mhz = 1, |
| 140 | .early_init = 1, |
| 141 | }, |
| 142 | .i2c[0] = { |
| 143 | .speed = I2C_SPEED_FAST, |
| 144 | }, |
| 145 | .i2c[1] = { |
| 146 | .speed = I2C_SPEED_FAST, |
| 147 | }, |
| 148 | .i2c[2] = { |
| 149 | .speed = I2C_SPEED_FAST, |
| 150 | }, |
| 151 | .i2c[3] = { |
| 152 | .speed = I2C_SPEED_FAST, |
| 153 | }, |
| 154 | .i2c[5] = { |
| 155 | .speed = I2C_SPEED_FAST, |
| 156 | }, |
| 157 | }" |
| 158 | |
V Sowmya | 1b150cb | 2021-01-15 14:01:54 +0530 | [diff] [blame] | 159 | device domain 0 on |
Subrata Banik | 66a5d40 | 2021-06-04 16:50:29 +0530 | [diff] [blame] | 160 | device ref igpu on end |
| 161 | device ref dtt on end |
| 162 | device ref ipu on end |
| 163 | device ref tbt_pcie_rp0 on end |
| 164 | device ref tbt_pcie_rp1 on end |
| 165 | device ref tbt_pcie_rp2 on end |
| 166 | device ref tbt_pcie_rp3 on end |
| 167 | device ref crashlog off end |
| 168 | device ref tcss_xhci on end |
| 169 | device ref tcss_dma0 on |
John Zhao | 7e982b1 | 2021-05-13 23:08:16 -0700 | [diff] [blame] | 170 | chip drivers/intel/usb4/retimer |
| 171 | register "dfp" = "{ |
| 172 | [0] = {.power_gpio = ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_H19),}, |
| 173 | [1] = {.power_gpio = ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_H19),}}" |
| 174 | device generic 0 on end |
| 175 | end |
| 176 | end |
Subrata Banik | 66a5d40 | 2021-06-04 16:50:29 +0530 | [diff] [blame] | 177 | device ref tcss_dma1 on end |
| 178 | device ref xhci on |
V Sowmya | ae930d8 | 2021-01-20 07:55:20 +0530 | [diff] [blame] | 179 | chip drivers/usb/acpi |
| 180 | register "desc" = ""Root Hub"" |
| 181 | register "type" = "UPC_TYPE_HUB" |
Subrata Banik | 66a5d40 | 2021-06-04 16:50:29 +0530 | [diff] [blame] | 182 | device ref xhci_root_hub on |
V Sowmya | ae930d8 | 2021-01-20 07:55:20 +0530 | [diff] [blame] | 183 | chip drivers/usb/acpi |
| 184 | register "desc" = ""Bluetooth"" |
| 185 | register "type" = "UPC_TYPE_INTERNAL" |
Aamir Bohra | 7f61e57 | 2021-03-06 11:26:13 +0530 | [diff] [blame] | 186 | register "reset_gpio" = |
| 187 | "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_A13)" |
Subrata Banik | 66a5d40 | 2021-06-04 16:50:29 +0530 | [diff] [blame] | 188 | device ref usb2_port10 on end |
V Sowmya | ae930d8 | 2021-01-20 07:55:20 +0530 | [diff] [blame] | 189 | end |
| 190 | end |
| 191 | end |
Subrata Banik | 66a5d40 | 2021-06-04 16:50:29 +0530 | [diff] [blame] | 192 | end |
| 193 | device ref cnvi_wifi on |
V Sowmya | ae930d8 | 2021-01-20 07:55:20 +0530 | [diff] [blame] | 194 | chip drivers/wifi/generic |
| 195 | register "wake" = "GPE0_PME_B0" |
| 196 | device generic 0 on end |
| 197 | end |
Subrata Banik | 66a5d40 | 2021-06-04 16:50:29 +0530 | [diff] [blame] | 198 | end |
| 199 | device ref i2c0 on end |
| 200 | device ref i2c1 on end |
| 201 | device ref i2c2 on |
V Sowmya | ae930d8 | 2021-01-20 07:55:20 +0530 | [diff] [blame] | 202 | chip drivers/i2c/generic |
| 203 | register "hid" = ""10EC5682"" |
| 204 | register "name" = ""RT58"" |
| 205 | register "desc" = ""Headset Codec"" |
| 206 | register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_BOTH(GPP_F9)" |
| 207 | # Set the jd_src to RT5668_JD1 for jack detection |
| 208 | register "property_count" = "1" |
| 209 | register "property_list[0].type" = "ACPI_DP_TYPE_INTEGER" |
| 210 | register "property_list[0].name" = ""realtek,jd-src"" |
| 211 | register "property_list[0].integer" = "1" |
| 212 | device i2c 1a on end |
| 213 | end |
| 214 | chip drivers/i2c/max98373 |
| 215 | register "vmon_slot_no" = "0" |
| 216 | register "imon_slot_no" = "1" |
| 217 | register "uid" = "0" |
| 218 | register "desc" = ""Right Speaker Amp"" |
| 219 | register "name" = ""MAXR"" |
| 220 | device i2c 31 on end |
| 221 | end |
| 222 | chip drivers/i2c/max98373 |
| 223 | register "vmon_slot_no" = "2" |
| 224 | register "imon_slot_no" = "3" |
| 225 | register "uid" = "1" |
| 226 | register "desc" = ""Left Speaker Amp"" |
| 227 | register "name" = ""MAXL"" |
| 228 | device i2c 32 on end |
| 229 | end |
Subrata Banik | 66a5d40 | 2021-06-04 16:50:29 +0530 | [diff] [blame] | 230 | end |
| 231 | device ref i2c3 on end |
| 232 | device ref heci1 on end |
| 233 | device ref sata on end |
| 234 | device ref i2c5 on |
V Sowmya | ae930d8 | 2021-01-20 07:55:20 +0530 | [diff] [blame] | 235 | chip drivers/i2c/generic |
| 236 | register "hid" = ""ELAN0000"" |
| 237 | register "desc" = ""ELAN Touchpad"" |
| 238 | register "irq" = "ACPI_IRQ_WAKE_LEVEL_LOW(GPP_E15_IRQ)" |
| 239 | register "wake" = "GPE0_DW2_15" |
Matt DeVillier | 2cf52d8 | 2022-09-01 15:09:24 -0500 | [diff] [blame] | 240 | register "detect" = "1" |
V Sowmya | ae930d8 | 2021-01-20 07:55:20 +0530 | [diff] [blame] | 241 | device i2c 15 on end |
| 242 | end |
Subrata Banik | 66a5d40 | 2021-06-04 16:50:29 +0530 | [diff] [blame] | 243 | end |
| 244 | device ref pcie_rp5 on end |
| 245 | device ref pcie_rp8 on |
Rizwan Qureshi | 9452aab | 2021-04-06 20:05:04 +0530 | [diff] [blame] | 246 | chip soc/intel/common/block/pcie/rtd3 |
| 247 | register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_H3)" |
| 248 | register "srcclk_pin" = "3" |
| 249 | device generic 0 on end |
| 250 | end |
Subrata Banik | 66a5d40 | 2021-06-04 16:50:29 +0530 | [diff] [blame] | 251 | end |
| 252 | device ref pcie_rp9 on end |
| 253 | device ref uart0 on end |
| 254 | device ref gspi0 on |
Aamir Bohra | c63a9fb | 2021-02-25 15:02:35 +0530 | [diff] [blame] | 255 | chip drivers/spi/acpi |
| 256 | register "hid" = "ACPI_DT_NAMESPACE_HID" |
| 257 | register "compat_string" = ""google,cr50"" |
| 258 | register "irq" = "ACPI_IRQ_EDGE_LOW(GPP_C3_IRQ)" |
| 259 | device spi 0 on end |
| 260 | end |
Subrata Banik | 66a5d40 | 2021-06-04 16:50:29 +0530 | [diff] [blame] | 261 | end |
| 262 | device ref pch_espi on |
V Sowmya | 1b150cb | 2021-01-15 14:01:54 +0530 | [diff] [blame] | 263 | chip ec/google/chromeec |
V Sowmya | 8cb7af8 | 2021-02-23 13:31:34 +0530 | [diff] [blame] | 264 | use conn0 as mux_conn[0] |
| 265 | use conn1 as mux_conn[1] |
V Sowmya | 1b150cb | 2021-01-15 14:01:54 +0530 | [diff] [blame] | 266 | device pnp 0c09.0 on end |
| 267 | end |
Subrata Banik | 66a5d40 | 2021-06-04 16:50:29 +0530 | [diff] [blame] | 268 | end |
| 269 | device ref p2sb on end |
| 270 | device ref pmc hidden |
V Sowmya | 8cb7af8 | 2021-02-23 13:31:34 +0530 | [diff] [blame] | 271 | # The pmc_mux chip driver is a placeholder for the |
| 272 | # PMC.MUX device in the ACPI hierarchy. |
| 273 | chip drivers/intel/pmc_mux |
| 274 | device generic 0 on |
| 275 | chip drivers/intel/pmc_mux/conn |
Reka Norman | d448f8c | 2021-12-09 12:09:27 +1100 | [diff] [blame] | 276 | use usb2_port6 as usb2_port |
| 277 | use tcss_usb3_port1 as usb3_port |
V Sowmya | 8cb7af8 | 2021-02-23 13:31:34 +0530 | [diff] [blame] | 278 | # SBU is fixed, HSL follows CC |
| 279 | register "sbu_orientation" = "TYPEC_ORIENTATION_NORMAL" |
| 280 | device generic 0 alias conn0 on end |
| 281 | end |
| 282 | chip drivers/intel/pmc_mux/conn |
Reka Norman | d448f8c | 2021-12-09 12:09:27 +1100 | [diff] [blame] | 283 | use usb2_port4 as usb2_port |
| 284 | use tcss_usb3_port2 as usb3_port |
V Sowmya | 8cb7af8 | 2021-02-23 13:31:34 +0530 | [diff] [blame] | 285 | # SBU is fixed, HSL follows CC |
| 286 | register "sbu_orientation" = "TYPEC_ORIENTATION_NORMAL" |
| 287 | device generic 1 alias conn1 on end |
| 288 | end |
| 289 | end |
| 290 | end |
Subrata Banik | 66a5d40 | 2021-06-04 16:50:29 +0530 | [diff] [blame] | 291 | end |
| 292 | device ref hda on end |
| 293 | device ref smbus on end |
V Sowmya | 1b150cb | 2021-01-15 14:01:54 +0530 | [diff] [blame] | 294 | end |
V Sowmya | ce07b5c | 2020-12-17 08:03:03 +0530 | [diff] [blame] | 295 | end |