Maulik V Vaghela | d64b940 | 2018-08-07 14:26:04 +0530 | [diff] [blame] | 1 | FLASH@0xfe000000 0x2000000 { |
| 2 | SI_ALL@0x0 0x1081000 { |
| 3 | SI_DESC@0x0 0x1000 |
| 4 | SI_EC@0x1000 0x80000 |
| 5 | SI_ME@0x81000 0x1000000 |
| 6 | } |
| 7 | SI_BIOS@0x1400000 0xC00000 { |
| 8 | RW_SECTION_A@0x0 0x2d0000 { |
| 9 | VBLOCK_A@0x0 0x10000 |
| 10 | FW_MAIN_A(CBFS)@0x10000 0x2bffc0 |
| 11 | RW_FWID_A@0x2cffc0 0x40 |
| 12 | } |
| 13 | RW_SECTION_B@0x2d0000 0x2d0000 { |
| 14 | VBLOCK_B@0x0 0x10000 |
| 15 | FW_MAIN_B(CBFS)@0x10000 0x2bffc0 |
| 16 | RW_FWID_B@0x2cffc0 0x40 |
| 17 | } |
| 18 | RW_MISC@0x5a0000 0x30000 { |
| 19 | UNIFIED_MRC_CACHE@0x0 0x20000 { |
| 20 | RECOVERY_MRC_CACHE@0x0 0x10000 |
| 21 | RW_MRC_CACHE@0x10000 0x10000 |
| 22 | } |
Hung-Te Lin | e586182 | 2019-03-04 16:48:05 +0800 | [diff] [blame] | 23 | RW_ELOG(PRESERVE)@0x20000 0x4000 |
Maulik V Vaghela | d64b940 | 2018-08-07 14:26:04 +0530 | [diff] [blame] | 24 | RW_SHARED@0x24000 0x4000 { |
| 25 | SHARED_DATA@0x0 0x2000 |
| 26 | VBLOCK_DEV@0x2000 0x2000 |
| 27 | } |
Hung-Te Lin | e586182 | 2019-03-04 16:48:05 +0800 | [diff] [blame] | 28 | RW_VPD(PRESERVE)@0x28000 0x2000 |
| 29 | RW_NVRAM(PRESERVE)@0x2a000 0x6000 |
Maulik V Vaghela | d64b940 | 2018-08-07 14:26:04 +0530 | [diff] [blame] | 30 | } |
Hung-Te Lin | e586182 | 2019-03-04 16:48:05 +0800 | [diff] [blame] | 31 | SMMSTORE(PRESERVE)@0x5d0000 0x40000 |
Patrick Georgi | 803cf02 | 2018-09-06 18:15:43 +0200 | [diff] [blame] | 32 | RW_LEGACY(CBFS)@0x610000 0x1c0000 |
Maulik V Vaghela | d64b940 | 2018-08-07 14:26:04 +0530 | [diff] [blame] | 33 | WP_RO@0x7d0000 0x430000 { |
Hung-Te Lin | e586182 | 2019-03-04 16:48:05 +0800 | [diff] [blame] | 34 | RO_VPD(PRESERVE)@0x0 0x4000 |
Maulik V Vaghela | d64b940 | 2018-08-07 14:26:04 +0530 | [diff] [blame] | 35 | RO_SECTION@0x4000 0x42c000 { |
| 36 | FMAP@0x0 0x800 |
| 37 | RO_FRID@0x800 0x40 |
| 38 | RO_FRID_PAD@0x840 0x7c0 |
| 39 | GBB@0x1000 0xef000 |
| 40 | COREBOOT(CBFS)@0xf0000 0x33c000 |
| 41 | } |
| 42 | } |
| 43 | } |
| 44 | } |