Angel Pons | 32859fc | 2020-04-02 23:48:27 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
Stefan Reinauer | 8f2c616 | 2010-04-06 21:50:21 +0000 | [diff] [blame] | 2 | |
Eric Biederman | c84c190 | 2004-10-14 20:13:01 +0000 | [diff] [blame] | 3 | #ifndef CPU_X86_CACHE |
| 4 | #define CPU_X86_CACHE |
| 5 | |
Aaron Durbin | 029aaf6 | 2013-10-10 12:41:49 -0500 | [diff] [blame] | 6 | #include <cpu/x86/cr.h> |
| 7 | |
| 8 | #define CR0_CacheDisable (CR0_CD) |
| 9 | #define CR0_NoWriteThrough (CR0_NW) |
Patrick Georgi | 05e740f | 2012-03-31 12:52:21 +0200 | [diff] [blame] | 10 | |
Arthur Heymans | a6a2f93 | 2019-11-25 19:58:36 +0100 | [diff] [blame] | 11 | #define CPUID_FEATURE_CLFLUSH_BIT 19 |
| 12 | |
Patrick Georgi | 05e740f | 2012-03-31 12:52:21 +0200 | [diff] [blame] | 13 | #if !defined(__ASSEMBLER__) |
| 14 | |
Arthur Heymans | 3134a81 | 2019-11-25 12:20:01 +0100 | [diff] [blame^] | 15 | #include <stdbool.h> |
| 16 | |
Rudolf Marek | 417e66b | 2010-05-16 22:32:58 +0000 | [diff] [blame] | 17 | static inline void wbinvd(void) |
| 18 | { |
| 19 | asm volatile ("wbinvd" ::: "memory"); |
| 20 | } |
| 21 | |
Eric Biederman | c84c190 | 2004-10-14 20:13:01 +0000 | [diff] [blame] | 22 | static inline void invd(void) |
| 23 | { |
| 24 | asm volatile("invd" ::: "memory"); |
| 25 | } |
Stefan Reinauer | 8f2c616 | 2010-04-06 21:50:21 +0000 | [diff] [blame] | 26 | |
Marshall Dawson | 1731a33 | 2017-12-13 12:04:14 -0700 | [diff] [blame] | 27 | static inline void clflush(void *addr) |
| 28 | { |
| 29 | asm volatile ("clflush (%0)"::"r" (addr)); |
| 30 | } |
| 31 | |
Arthur Heymans | 3134a81 | 2019-11-25 12:20:01 +0100 | [diff] [blame^] | 32 | bool clflush_supported(void); |
| 33 | |
Aaron Durbin | 75a62e7 | 2018-09-13 02:10:45 -0600 | [diff] [blame] | 34 | /* The following functions require the __always_inline due to AMD |
Scott Duplichan | 78301d0 | 2010-09-17 21:38:40 +0000 | [diff] [blame] | 35 | * function STOP_CAR_AND_CPU that disables cache as |
Elyes HAOUAS | 918535a | 2016-07-28 21:25:21 +0200 | [diff] [blame] | 36 | * RAM, the cache as RAM stack can no longer be used. Called |
Scott Duplichan | 78301d0 | 2010-09-17 21:38:40 +0000 | [diff] [blame] | 37 | * functions must be inlined to avoid stack usage. Also, the |
| 38 | * compiler must keep local variables register based and not |
| 39 | * allocated them from the stack. With gcc 4.5.0, some functions |
| 40 | * declared as inline are not being inlined. This patch forces |
| 41 | * these functions to always be inlined by adding the qualifier |
Aaron Durbin | 75a62e7 | 2018-09-13 02:10:45 -0600 | [diff] [blame] | 42 | * __always_inline to their declaration. |
Scott Duplichan | 78301d0 | 2010-09-17 21:38:40 +0000 | [diff] [blame] | 43 | */ |
Aaron Durbin | 75a62e7 | 2018-09-13 02:10:45 -0600 | [diff] [blame] | 44 | static __always_inline void enable_cache(void) |
Eric Biederman | c84c190 | 2004-10-14 20:13:01 +0000 | [diff] [blame] | 45 | { |
Elyes HAOUAS | 63f98f2 | 2019-06-26 20:17:50 +0200 | [diff] [blame] | 46 | CRx_TYPE cr0; |
Eric Biederman | c84c190 | 2004-10-14 20:13:01 +0000 | [diff] [blame] | 47 | cr0 = read_cr0(); |
Aaron Durbin | 029aaf6 | 2013-10-10 12:41:49 -0500 | [diff] [blame] | 48 | cr0 &= ~(CR0_CD | CR0_NW); |
Eric Biederman | c84c190 | 2004-10-14 20:13:01 +0000 | [diff] [blame] | 49 | write_cr0(cr0); |
| 50 | } |
| 51 | |
Aaron Durbin | 75a62e7 | 2018-09-13 02:10:45 -0600 | [diff] [blame] | 52 | static __always_inline void disable_cache(void) |
Eric Biederman | c84c190 | 2004-10-14 20:13:01 +0000 | [diff] [blame] | 53 | { |
| 54 | /* Disable and write back the cache */ |
Elyes HAOUAS | 63f98f2 | 2019-06-26 20:17:50 +0200 | [diff] [blame] | 55 | CRx_TYPE cr0; |
Eric Biederman | c84c190 | 2004-10-14 20:13:01 +0000 | [diff] [blame] | 56 | cr0 = read_cr0(); |
Aaron Durbin | 029aaf6 | 2013-10-10 12:41:49 -0500 | [diff] [blame] | 57 | cr0 |= CR0_CD; |
Eric Biederman | c84c190 | 2004-10-14 20:13:01 +0000 | [diff] [blame] | 58 | wbinvd(); |
| 59 | write_cr0(cr0); |
| 60 | wbinvd(); |
| 61 | } |
| 62 | |
Patrick Georgi | 05e740f | 2012-03-31 12:52:21 +0200 | [diff] [blame] | 63 | #endif /* !__ASSEMBLER__ */ |
Eric Biederman | c84c190 | 2004-10-14 20:13:01 +0000 | [diff] [blame] | 64 | #endif /* CPU_X86_CACHE */ |