blob: 74a646238c4fe0f4d51f6c1e24dcb945d4a57c6a [file] [log] [blame]
Angel Pons381c4eb2020-04-03 01:22:06 +02001/* SPDX-License-Identifier: GPL-2.0-only */
Patrick Rudolph05284b62019-06-04 15:56:44 +02002
Arthur Heymansfa5d0f82019-11-12 19:11:50 +01003#include <bootblock_common.h>
Patrick Rudolph05284b62019-06-04 15:56:44 +02004#include <superio/nuvoton/npcd378/npcd378.h>
5#include <superio/nuvoton/common/nuvoton.h>
Patrick Rudolph05284b62019-06-04 15:56:44 +02006#include <southbridge/intel/bd82x6x/pch.h>
7
8#define SERIAL_DEV PNP_DEV(0x2e, NPCD378_SP2)
9
Patrick Rudolph05284b62019-06-04 15:56:44 +020010const struct southbridge_usb_port mainboard_usb_ports[] = {
11 { 1, 0, 0 },
12 { 1, 0, 0 },
13 { 1, 0, 0 },
14 { 1, 0, 0 },
15 { 1, 0, 3 },
16 { 1, 0, 3 },
17 { 1, 0, 3 },
18 { 1, 0, 3 },
19 { 1, 1, 5 },
20 { 1, 0, 5 },
21 { 1, 0, 5 },
22 { 1, 0, 5 },
23 { 1, 0, 7 },
24 { 1, 0, 7 },
25};
26
Arthur Heymansfa5d0f82019-11-12 19:11:50 +010027void bootblock_mainboard_early_init(void)
Patrick Rudolph05284b62019-06-04 15:56:44 +020028{
29 if (CONFIG(CONSOLE_SERIAL))
30 nuvoton_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
31}