Vadim Bendebury | 245d457 | 2016-04-05 16:01:57 -0700 | [diff] [blame] | 1 | /* |
| 2 | * Copyright 2016 The Chromium OS Authors. All rights reserved. |
| 3 | * Use of this source code is governed by a BSD-style license that can be |
| 4 | * found in the LICENSE file. |
| 5 | */ |
| 6 | |
Victor Prupis | f706020 | 2016-08-19 10:45:04 -0700 | [diff] [blame] | 7 | #include <arch/early_variables.h> |
Vadim Bendebury | 245d457 | 2016-04-05 16:01:57 -0700 | [diff] [blame] | 8 | #include <console/console.h> |
| 9 | #include <endian.h> |
Vadim Bendebury | 245d457 | 2016-04-05 16:01:57 -0700 | [diff] [blame] | 10 | #include <string.h> |
Vadim Bendebury | 245d457 | 2016-04-05 16:01:57 -0700 | [diff] [blame] | 11 | #include <vb2_api.h> |
Philipp Deppenwiese | 86391f1 | 2017-10-18 21:54:24 +0200 | [diff] [blame] | 12 | #include <security/tpm/tis.h> |
Philipp Deppenwiese | c07f8fb | 2018-02-27 19:40:52 +0100 | [diff] [blame] | 13 | #include <security/tpm/tss.h> |
Vadim Bendebury | 245d457 | 2016-04-05 16:01:57 -0700 | [diff] [blame] | 14 | |
Philipp Deppenwiese | d88fb36 | 2017-10-18 20:26:18 +0200 | [diff] [blame] | 15 | #include "tss_structures.h" |
| 16 | #include "tss_marshaling.h" |
Vadim Bendebury | 245d457 | 2016-04-05 16:01:57 -0700 | [diff] [blame] | 17 | |
| 18 | /* |
| 19 | * This file provides interface between firmware and TPM2 device. The TPM1.2 |
| 20 | * API was copied as is and relevant functions modified to comply with the |
| 21 | * TPM2 specification. |
| 22 | */ |
| 23 | |
Philipp Deppenwiese | c07f8fb | 2018-02-27 19:40:52 +0100 | [diff] [blame] | 24 | void *tpm_process_command(TPM_CC command, void *command_body) |
Vadim Bendebury | 245d457 | 2016-04-05 16:01:57 -0700 | [diff] [blame] | 25 | { |
Aaron Durbin | ee049fa | 2017-03-25 00:38:45 -0500 | [diff] [blame] | 26 | struct obuf ob; |
| 27 | struct ibuf ib; |
| 28 | size_t out_size; |
Duncan Laurie | ed75b27 | 2016-07-15 04:51:45 -0700 | [diff] [blame] | 29 | size_t in_size; |
Aaron Durbin | ee049fa | 2017-03-25 00:38:45 -0500 | [diff] [blame] | 30 | const uint8_t *sendb; |
Vadim Bendebury | 245d457 | 2016-04-05 16:01:57 -0700 | [diff] [blame] | 31 | /* Command/response buffer. */ |
Victor Prupis | f706020 | 2016-08-19 10:45:04 -0700 | [diff] [blame] | 32 | static uint8_t cr_buffer[TPM_BUFFER_SIZE] CAR_GLOBAL; |
| 33 | |
| 34 | uint8_t *cr_buffer_ptr = car_get_var_ptr(cr_buffer); |
Vadim Bendebury | 245d457 | 2016-04-05 16:01:57 -0700 | [diff] [blame] | 35 | |
Aaron Durbin | ee049fa | 2017-03-25 00:38:45 -0500 | [diff] [blame] | 36 | obuf_init(&ob, cr_buffer_ptr, sizeof(cr_buffer)); |
| 37 | |
| 38 | if (tpm_marshal_command(command, command_body, &ob) < 0) { |
| 39 | printk(BIOS_ERR, "command %#x\n", command); |
Vadim Bendebury | 245d457 | 2016-04-05 16:01:57 -0700 | [diff] [blame] | 40 | return NULL; |
| 41 | } |
| 42 | |
Aaron Durbin | ee049fa | 2017-03-25 00:38:45 -0500 | [diff] [blame] | 43 | sendb = obuf_contents(&ob, &out_size); |
| 44 | |
Vadim Bendebury | 245d457 | 2016-04-05 16:01:57 -0700 | [diff] [blame] | 45 | in_size = sizeof(cr_buffer); |
Aaron Durbin | ee049fa | 2017-03-25 00:38:45 -0500 | [diff] [blame] | 46 | if (tis_sendrecv(sendb, out_size, cr_buffer_ptr, &in_size)) { |
Vadim Bendebury | 245d457 | 2016-04-05 16:01:57 -0700 | [diff] [blame] | 47 | printk(BIOS_ERR, "tpm transaction failed\n"); |
| 48 | return NULL; |
| 49 | } |
| 50 | |
Aaron Durbin | ee049fa | 2017-03-25 00:38:45 -0500 | [diff] [blame] | 51 | ibuf_init(&ib, cr_buffer_ptr, in_size); |
| 52 | |
| 53 | return tpm_unmarshal_response(command, &ib); |
Vadim Bendebury | 245d457 | 2016-04-05 16:01:57 -0700 | [diff] [blame] | 54 | } |
| 55 | |
Furquan Shaikh | cc3365a | 2016-09-30 12:53:19 -0700 | [diff] [blame] | 56 | static uint32_t tlcl_send_startup(TPM_SU type) |
| 57 | { |
| 58 | struct tpm2_startup startup; |
| 59 | struct tpm2_response *response; |
| 60 | |
| 61 | startup.startup_type = type; |
| 62 | response = tpm_process_command(TPM2_Startup, &startup); |
| 63 | |
Joel Kitching | c5d0a2e | 2018-10-12 15:52:00 +0800 | [diff] [blame] | 64 | /* IO error, tpm2_response pointer is empty. */ |
| 65 | if (response == NULL) { |
| 66 | printk(BIOS_ERR, "%s: TPM communication error\n", __func__); |
| 67 | return TPM_E_IOERROR; |
Furquan Shaikh | cc3365a | 2016-09-30 12:53:19 -0700 | [diff] [blame] | 68 | } |
Joel Kitching | c5d0a2e | 2018-10-12 15:52:00 +0800 | [diff] [blame] | 69 | |
Joel Kitching | f97ff0c | 2018-09-26 17:52:54 +0800 | [diff] [blame] | 70 | printk(BIOS_INFO, "%s: Startup return code is %x\n", |
| 71 | __func__, response->hdr.tpm_code); |
Joel Kitching | c5d0a2e | 2018-10-12 15:52:00 +0800 | [diff] [blame] | 72 | |
| 73 | switch (response->hdr.tpm_code) { |
| 74 | case TPM_RC_INITIALIZE: |
| 75 | /* TPM already initialized. */ |
| 76 | return TPM_E_INVALID_POSTINIT; |
| 77 | case TPM2_RC_SUCCESS: |
| 78 | return TPM_SUCCESS; |
| 79 | } |
| 80 | |
| 81 | /* Collapse any other errors into TPM_E_IOERROR. */ |
Joel Kitching | f97ff0c | 2018-09-26 17:52:54 +0800 | [diff] [blame] | 82 | return TPM_E_IOERROR; |
Furquan Shaikh | cc3365a | 2016-09-30 12:53:19 -0700 | [diff] [blame] | 83 | } |
| 84 | |
Vadim Bendebury | 245d457 | 2016-04-05 16:01:57 -0700 | [diff] [blame] | 85 | uint32_t tlcl_resume(void) |
| 86 | { |
Furquan Shaikh | cc3365a | 2016-09-30 12:53:19 -0700 | [diff] [blame] | 87 | return tlcl_send_startup(TPM_SU_STATE); |
Vadim Bendebury | 245d457 | 2016-04-05 16:01:57 -0700 | [diff] [blame] | 88 | } |
| 89 | |
Joel Kitching | 2e690ee | 2018-11-15 16:48:53 +0800 | [diff] [blame^] | 90 | static uint32_t tlcl_send_shutdown(TPM_SU type) |
| 91 | { |
| 92 | struct tpm2_shutdown shutdown; |
| 93 | struct tpm2_response *response; |
| 94 | |
| 95 | shutdown.shutdown_type = type; |
| 96 | response = tpm_process_command(TPM2_Shutdown, &shutdown); |
| 97 | |
| 98 | /* IO error, tpm2_response pointer is empty. */ |
| 99 | if (response == NULL) { |
| 100 | printk(BIOS_ERR, "%s: TPM communication error\n", __func__); |
| 101 | return TPM_E_IOERROR; |
| 102 | } |
| 103 | |
| 104 | printk(BIOS_INFO, "%s: Shutdown return code is %x\n", |
| 105 | __func__, response->hdr.tpm_code); |
| 106 | |
| 107 | if (response->hdr.tpm_code == TPM2_RC_SUCCESS) |
| 108 | return TPM_SUCCESS; |
| 109 | |
| 110 | /* Collapse any other errors into TPM_E_IOERROR. */ |
| 111 | return TPM_E_IOERROR; |
| 112 | } |
| 113 | |
| 114 | uint32_t tlcl_save_state(void) |
| 115 | { |
| 116 | return tlcl_send_shutdown(TPM_SU_STATE); |
| 117 | } |
| 118 | |
Vadim Bendebury | 245d457 | 2016-04-05 16:01:57 -0700 | [diff] [blame] | 119 | uint32_t tlcl_assert_physical_presence(void) |
| 120 | { |
| 121 | /* |
| 122 | * Nothing to do on TPM2 for this, use platform hierarchy availability |
| 123 | * instead. |
| 124 | */ |
| 125 | return TPM_SUCCESS; |
| 126 | } |
| 127 | |
Vadim Bendebury | f5ef699 | 2016-07-03 22:20:17 -0700 | [diff] [blame] | 128 | /* |
| 129 | * The caller will provide the digest in a 32 byte buffer, let's consider it a |
| 130 | * sha256 digest. |
| 131 | */ |
Vadim Bendebury | 245d457 | 2016-04-05 16:01:57 -0700 | [diff] [blame] | 132 | uint32_t tlcl_extend(int pcr_num, const uint8_t *in_digest, |
| 133 | uint8_t *out_digest) |
| 134 | { |
Vadim Bendebury | f5ef699 | 2016-07-03 22:20:17 -0700 | [diff] [blame] | 135 | struct tpm2_pcr_extend_cmd pcr_ext_cmd; |
| 136 | struct tpm2_response *response; |
| 137 | |
| 138 | pcr_ext_cmd.pcrHandle = HR_PCR + pcr_num; |
| 139 | pcr_ext_cmd.digests.count = 1; |
| 140 | pcr_ext_cmd.digests.digests[0].hashAlg = TPM_ALG_SHA256; |
| 141 | memcpy(pcr_ext_cmd.digests.digests[0].digest.sha256, in_digest, |
| 142 | sizeof(pcr_ext_cmd.digests.digests[0].digest.sha256)); |
| 143 | |
| 144 | response = tpm_process_command(TPM2_PCR_Extend, &pcr_ext_cmd); |
| 145 | |
| 146 | printk(BIOS_INFO, "%s: response is %x\n", |
| 147 | __func__, response ? response->hdr.tpm_code : -1); |
| 148 | if (!response || response->hdr.tpm_code) |
| 149 | return TPM_E_IOERROR; |
| 150 | |
Vadim Bendebury | 245d457 | 2016-04-05 16:01:57 -0700 | [diff] [blame] | 151 | return TPM_SUCCESS; |
| 152 | } |
| 153 | |
| 154 | uint32_t tlcl_finalize_physical_presence(void) |
| 155 | { |
| 156 | /* Nothing needs to be done with tpm2. */ |
| 157 | printk(BIOS_INFO, "%s:%s:%d\n", __FILE__, __func__, __LINE__); |
| 158 | return TPM_SUCCESS; |
| 159 | } |
| 160 | |
| 161 | uint32_t tlcl_force_clear(void) |
| 162 | { |
Vadim Bendebury | adfbbde | 2016-07-03 15:56:41 -0700 | [diff] [blame] | 163 | struct tpm2_response *response; |
| 164 | |
| 165 | response = tpm_process_command(TPM2_Clear, NULL); |
| 166 | printk(BIOS_INFO, "%s: response is %x\n", |
| 167 | __func__, response ? response->hdr.tpm_code : -1); |
| 168 | |
| 169 | if (!response || response->hdr.tpm_code) |
| 170 | return TPM_E_IOERROR; |
| 171 | |
Vadim Bendebury | 245d457 | 2016-04-05 16:01:57 -0700 | [diff] [blame] | 172 | return TPM_SUCCESS; |
| 173 | } |
| 174 | |
Furquan Shaikh | 8b5d04e | 2016-11-10 09:49:05 -0800 | [diff] [blame] | 175 | static uint8_t tlcl_init_done CAR_GLOBAL; |
| 176 | |
| 177 | /* This function is called directly by vboot, uses vboot return types. */ |
Vadim Bendebury | 245d457 | 2016-04-05 16:01:57 -0700 | [diff] [blame] | 178 | uint32_t tlcl_lib_init(void) |
| 179 | { |
Furquan Shaikh | 8b5d04e | 2016-11-10 09:49:05 -0800 | [diff] [blame] | 180 | uint8_t done = car_get_var(tlcl_init_done); |
| 181 | if (done) |
| 182 | return VB2_SUCCESS; |
| 183 | |
Vadim Bendebury | 245d457 | 2016-04-05 16:01:57 -0700 | [diff] [blame] | 184 | if (tis_init()) |
| 185 | return VB2_ERROR_UNKNOWN; |
| 186 | if (tis_open()) |
| 187 | return VB2_ERROR_UNKNOWN; |
Furquan Shaikh | 8b5d04e | 2016-11-10 09:49:05 -0800 | [diff] [blame] | 188 | |
| 189 | car_set_var(tlcl_init_done, 1); |
| 190 | |
Vadim Bendebury | 245d457 | 2016-04-05 16:01:57 -0700 | [diff] [blame] | 191 | return VB2_SUCCESS; |
| 192 | } |
| 193 | |
| 194 | uint32_t tlcl_physical_presence_cmd_enable(void) |
| 195 | { |
| 196 | printk(BIOS_INFO, "%s:%s:%d\n", __FILE__, __func__, __LINE__); |
| 197 | return TPM_SUCCESS; |
| 198 | } |
| 199 | |
| 200 | uint32_t tlcl_read(uint32_t index, void *data, uint32_t length) |
| 201 | { |
| 202 | struct tpm2_nv_read_cmd nv_readc; |
| 203 | struct tpm2_response *response; |
| 204 | |
| 205 | memset(&nv_readc, 0, sizeof(nv_readc)); |
| 206 | |
| 207 | nv_readc.nvIndex = HR_NV_INDEX + index; |
| 208 | nv_readc.size = length; |
| 209 | |
| 210 | response = tpm_process_command(TPM2_NV_Read, &nv_readc); |
| 211 | |
| 212 | /* Need to map tpm error codes into internal values. */ |
| 213 | if (!response) |
| 214 | return TPM_E_READ_FAILURE; |
| 215 | |
| 216 | printk(BIOS_INFO, "%s:%d index %#x return code %x\n", |
| 217 | __FILE__, __LINE__, index, response->hdr.tpm_code); |
| 218 | switch (response->hdr.tpm_code) { |
| 219 | case 0: |
| 220 | break; |
| 221 | |
Vadim Bendebury | 08f9359 | 2017-06-21 12:23:22 -0700 | [diff] [blame] | 222 | /* Uninitialized, returned if the space hasn't been written. */ |
| 223 | case TPM_RC_NV_UNINITIALIZED: |
| 224 | /* |
| 225 | * Bad index, cr50 specific value, returned if the space |
| 226 | * hasn't been defined. |
| 227 | */ |
| 228 | case TPM_RC_CR50_NV_UNDEFINED: |
Vadim Bendebury | 245d457 | 2016-04-05 16:01:57 -0700 | [diff] [blame] | 229 | return TPM_E_BADINDEX; |
| 230 | |
| 231 | default: |
| 232 | return TPM_E_READ_FAILURE; |
| 233 | } |
| 234 | |
| 235 | if (length > response->nvr.buffer.t.size) |
| 236 | return TPM_E_RESPONSE_TOO_LARGE; |
| 237 | |
| 238 | if (length < response->nvr.buffer.t.size) |
| 239 | return TPM_E_READ_EMPTY; |
| 240 | |
| 241 | memcpy(data, response->nvr.buffer.t.buffer, length); |
| 242 | |
| 243 | return TPM_SUCCESS; |
| 244 | } |
| 245 | |
| 246 | uint32_t tlcl_self_test_full(void) |
| 247 | { |
| 248 | struct tpm2_self_test st; |
| 249 | struct tpm2_response *response; |
| 250 | |
| 251 | st.yes_no = 1; |
| 252 | |
| 253 | response = tpm_process_command(TPM2_SelfTest, &st); |
| 254 | printk(BIOS_INFO, "%s: response is %x\n", |
| 255 | __func__, response ? response->hdr.tpm_code : -1); |
| 256 | return TPM_SUCCESS; |
| 257 | } |
| 258 | |
Vadim Bendebury | 4c0851c | 2016-07-03 17:08:10 -0700 | [diff] [blame] | 259 | uint32_t tlcl_lock_nv_write(uint32_t index) |
Vadim Bendebury | 245d457 | 2016-04-05 16:01:57 -0700 | [diff] [blame] | 260 | { |
Vadim Bendebury | 4c0851c | 2016-07-03 17:08:10 -0700 | [diff] [blame] | 261 | struct tpm2_response *response; |
| 262 | /* TPM Wll reject attempts to write at non-defined index. */ |
| 263 | struct tpm2_nv_write_lock_cmd nv_wl = { |
| 264 | .nvIndex = HR_NV_INDEX + index, |
| 265 | }; |
| 266 | |
| 267 | response = tpm_process_command(TPM2_NV_WriteLock, &nv_wl); |
| 268 | |
| 269 | printk(BIOS_INFO, "%s: response is %x\n", |
| 270 | __func__, response ? response->hdr.tpm_code : -1); |
| 271 | |
| 272 | if (!response || response->hdr.tpm_code) |
| 273 | return TPM_E_IOERROR; |
| 274 | |
Vadim Bendebury | 245d457 | 2016-04-05 16:01:57 -0700 | [diff] [blame] | 275 | return TPM_SUCCESS; |
| 276 | } |
| 277 | |
| 278 | uint32_t tlcl_startup(void) |
| 279 | { |
Furquan Shaikh | cc3365a | 2016-09-30 12:53:19 -0700 | [diff] [blame] | 280 | return tlcl_send_startup(TPM_SU_CLEAR); |
Vadim Bendebury | 245d457 | 2016-04-05 16:01:57 -0700 | [diff] [blame] | 281 | } |
| 282 | |
| 283 | uint32_t tlcl_write(uint32_t index, const void *data, uint32_t length) |
| 284 | { |
| 285 | struct tpm2_nv_write_cmd nv_writec; |
| 286 | struct tpm2_response *response; |
| 287 | |
| 288 | memset(&nv_writec, 0, sizeof(nv_writec)); |
| 289 | |
| 290 | nv_writec.nvIndex = HR_NV_INDEX + index; |
| 291 | nv_writec.data.t.size = length; |
| 292 | nv_writec.data.t.buffer = data; |
| 293 | |
| 294 | response = tpm_process_command(TPM2_NV_Write, &nv_writec); |
| 295 | |
Vadim Bendebury | 1ec7603 | 2016-07-05 22:30:16 -0700 | [diff] [blame] | 296 | printk(BIOS_INFO, "%s: response is %x\n", |
| 297 | __func__, response ? response->hdr.tpm_code : -1); |
Vadim Bendebury | 245d457 | 2016-04-05 16:01:57 -0700 | [diff] [blame] | 298 | |
Vadim Bendebury | 1ec7603 | 2016-07-05 22:30:16 -0700 | [diff] [blame] | 299 | /* Need to map tpm error codes into internal values. */ |
| 300 | if (!response || response->hdr.tpm_code) |
| 301 | return TPM_E_WRITE_FAILURE; |
Vadim Bendebury | 245d457 | 2016-04-05 16:01:57 -0700 | [diff] [blame] | 302 | |
| 303 | return TPM_SUCCESS; |
| 304 | } |
| 305 | |
Philipp Deppenwiese | c07f8fb | 2018-02-27 19:40:52 +0100 | [diff] [blame] | 306 | uint32_t tlcl_define_space(uint32_t space_index, size_t space_size, |
| 307 | const TPMA_NV nv_attributes, |
| 308 | const uint8_t *nv_policy, size_t nv_policy_size) |
Vadim Bendebury | 245d457 | 2016-04-05 16:01:57 -0700 | [diff] [blame] | 309 | { |
| 310 | struct tpm2_nv_define_space_cmd nvds_cmd; |
| 311 | struct tpm2_response *response; |
| 312 | |
| 313 | /* Prepare the define space command structure. */ |
| 314 | memset(&nvds_cmd, 0, sizeof(nvds_cmd)); |
| 315 | |
| 316 | nvds_cmd.publicInfo.dataSize = space_size; |
| 317 | nvds_cmd.publicInfo.nvIndex = HR_NV_INDEX + space_index; |
| 318 | nvds_cmd.publicInfo.nameAlg = TPM_ALG_SHA256; |
Philipp Deppenwiese | c07f8fb | 2018-02-27 19:40:52 +0100 | [diff] [blame] | 319 | nvds_cmd.publicInfo.attributes = nv_attributes; |
Vadim Bendebury | 245d457 | 2016-04-05 16:01:57 -0700 | [diff] [blame] | 320 | |
Philipp Deppenwiese | c07f8fb | 2018-02-27 19:40:52 +0100 | [diff] [blame] | 321 | /* |
| 322 | * Use policy digest based on default pcr0 value. This makes |
| 323 | * sure that the space can not be deleted as soon as PCR0 |
| 324 | * value has been extended from default. |
| 325 | */ |
| 326 | if (nv_policy && nv_policy_size) { |
| 327 | nvds_cmd.publicInfo.authPolicy.t.buffer = nv_policy; |
| 328 | nvds_cmd.publicInfo.authPolicy.t.size = nv_policy_size; |
Vadim Bendebury | 289ee8f | 2016-11-11 09:36:50 -0800 | [diff] [blame] | 329 | } |
Vadim Bendebury | 245d457 | 2016-04-05 16:01:57 -0700 | [diff] [blame] | 330 | |
| 331 | response = tpm_process_command(TPM2_NV_DefineSpace, &nvds_cmd); |
Philipp Deppenwiese | c07f8fb | 2018-02-27 19:40:52 +0100 | [diff] [blame] | 332 | printk(BIOS_INFO, "%s: response is %x\n", __func__, |
| 333 | response ? response->hdr.tpm_code : -1); |
Vadim Bendebury | 245d457 | 2016-04-05 16:01:57 -0700 | [diff] [blame] | 334 | |
| 335 | if (!response) |
| 336 | return TPM_E_NO_DEVICE; |
| 337 | |
Vadim Bendebury | af8ae93 | 2016-11-11 14:15:31 -0800 | [diff] [blame] | 338 | /* Map TPM2 retrun codes into common vboot represenation. */ |
Lee Leahy | 45fde70 | 2017-03-08 18:02:24 -0800 | [diff] [blame] | 339 | switch (response->hdr.tpm_code) { |
Vadim Bendebury | af8ae93 | 2016-11-11 14:15:31 -0800 | [diff] [blame] | 340 | case TPM2_RC_SUCCESS: |
| 341 | return TPM_SUCCESS; |
| 342 | case TPM2_RC_NV_DEFINED: |
| 343 | return TPM_E_NV_DEFINED; |
| 344 | default: |
| 345 | return TPM_E_INTERNAL_INCONSISTENCY; |
| 346 | } |
Vadim Bendebury | 245d457 | 2016-04-05 16:01:57 -0700 | [diff] [blame] | 347 | } |
Aaron Durbin | f56c778 | 2017-01-10 17:44:42 -0600 | [diff] [blame] | 348 | |
| 349 | uint32_t tlcl_disable_platform_hierarchy(void) |
| 350 | { |
| 351 | struct tpm2_response *response; |
| 352 | struct tpm2_hierarchy_control_cmd hc = { |
| 353 | .enable = TPM_RH_PLATFORM, |
| 354 | .state = 0, |
| 355 | }; |
| 356 | |
| 357 | response = tpm_process_command(TPM2_Hierarchy_Control, &hc); |
| 358 | |
| 359 | if (!response || response->hdr.tpm_code) |
| 360 | return TPM_E_INTERNAL_INCONSISTENCY; |
| 361 | |
| 362 | return TPM_SUCCESS; |
| 363 | } |