blob: fd7c659edd35aa7a6798c7d7171fa24893ce7f78 [file] [log] [blame]
Aaron Durbin76c37002012-10-30 09:03:43 -05001/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright (C) 2008-2009 coresystems GmbH
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation; version 2 of
9 * the License.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
19 */
20
21#include <console/console.h>
22#include <device/device.h>
23#include <device/pci.h>
24#include <device/pci_ids.h>
25#include "pch.h"
26#include <usbdebug.h>
27#include <arch/io.h>
28
29static void usb_ehci_init(struct device *dev)
30{
31 u32 reg32;
32
33 /* Disable Wake on Disconnect in RMH */
34 reg32 = RCBA32(0x35b0);
35 reg32 |= 0x22;
36 RCBA32(0x35b0) = reg32;
37
38 printk(BIOS_DEBUG, "EHCI: Setting up controller.. ");
39 reg32 = pci_read_config32(dev, PCI_COMMAND);
40 reg32 |= PCI_COMMAND_MASTER;
41 //reg32 |= PCI_COMMAND_SERR;
42 pci_write_config32(dev, PCI_COMMAND, reg32);
43
44 printk(BIOS_DEBUG, "done.\n");
45}
46
47static void usb_ehci_set_subsystem(device_t dev, unsigned vendor, unsigned device)
48{
49 u8 access_cntl;
50
51 access_cntl = pci_read_config8(dev, 0x80);
52
53 /* Enable writes to protected registers. */
54 pci_write_config8(dev, 0x80, access_cntl | 1);
55
56 if (!vendor || !device) {
57 pci_write_config32(dev, PCI_SUBSYSTEM_VENDOR_ID,
58 pci_read_config32(dev, PCI_VENDOR_ID));
59 } else {
60 pci_write_config32(dev, PCI_SUBSYSTEM_VENDOR_ID,
61 ((device & 0xffff) << 16) | (vendor & 0xffff));
62 }
63
64 /* Restore protection. */
65 pci_write_config8(dev, 0x80, access_cntl);
66}
67
Aaron Durbin76c37002012-10-30 09:03:43 -050068static struct pci_operations lops_pci = {
69 .set_subsystem = &usb_ehci_set_subsystem,
70};
71
72static struct device_operations usb_ehci_ops = {
Kyösti Mälkkifb387df2013-06-07 22:16:52 +030073 .read_resources = pci_ehci_read_resources,
74 .set_resources = pci_dev_set_resources,
Aaron Durbin76c37002012-10-30 09:03:43 -050075 .enable_resources = pci_dev_enable_resources,
76 .init = usb_ehci_init,
77 .scan_bus = 0,
78 .ops_pci = &lops_pci,
79};
80
Kyösti Mälkkif55a5422013-06-14 11:16:25 +030081static const unsigned short pci_device_ids[] = { 0x9c26, 0x8c26, 0x8c2d, 0 };
Aaron Durbin76c37002012-10-30 09:03:43 -050082
83static const struct pci_driver pch_usb_ehci __pci_driver = {
84 .ops = &usb_ehci_ops,
85 .vendor = PCI_VENDOR_ID_INTEL,
86 .devices = pci_device_ids,
87};