blob: c0a2c2066b5130368fac38f08e26e76a989ecd90 [file] [log] [blame]
Stefan Reinauer23190272008-08-20 13:41:24 +00001/*
2 * inteltool - dump all registers on an Intel CPU + chipset based system.
3 *
Stefan Reinauer14e22772010-04-27 06:56:47 +00004 * Copyright (C) 2008-2010 by coresystems GmbH
5 *
Stefan Reinauer23190272008-08-20 13:41:24 +00006 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
18 */
19
20#include <stdint.h>
Stefan Reinauerf7f2f252009-09-01 09:52:14 +000021
22#if defined(__GLIBC__)
Stefan Reinauer1162f252008-12-04 15:18:20 +000023#include <sys/io.h>
Stefan Reinauerf7f2f252009-09-01 09:52:14 +000024#endif
25#if (defined(__MACH__) && defined(__APPLE__))
26/* DirectIO is available here: http://www.coresystems.de/en/directio */
27#define __DARWIN__
Stefan Reinauer1162f252008-12-04 15:18:20 +000028#include <DirectIO/darwinio.h>
29#endif
Stefan Reinauer23190272008-08-20 13:41:24 +000030#include <pci/pci.h>
31
32#define INTELTOOL_VERSION "1.0"
33
34/* Tested chipsets: */
Maciej Pijanka90d17402009-09-30 17:05:46 +000035#define PCI_VENDOR_ID_INTEL 0x8086
36#define PCI_DEVICE_ID_INTEL_ICH 0x2410
37#define PCI_DEVICE_ID_INTEL_ICH0 0x2420
38#define PCI_DEVICE_ID_INTEL_ICH2 0x2440
39#define PCI_DEVICE_ID_INTEL_ICH4 0x24c0
40#define PCI_DEVICE_ID_INTEL_ICH4M 0x24cc
Pat Erleyca3548e2010-04-21 06:23:19 +000041#define PCI_DEVICE_ID_INTEL_ICH6 0x2640
Maciej Pijanka90d17402009-09-30 17:05:46 +000042#define PCI_DEVICE_ID_INTEL_ICH7DH 0x27b0
43#define PCI_DEVICE_ID_INTEL_ICH7 0x27b8
44#define PCI_DEVICE_ID_INTEL_ICH7M 0x27b9
45#define PCI_DEVICE_ID_INTEL_ICH7MDH 0x27bd
46#define PCI_DEVICE_ID_INTEL_ICH8M 0x2815
Anton Kochkovda0b4562010-05-30 12:33:12 +000047#define PCI_DEVICE_ID_INTEL_ICH9DH 0x2912
48#define PCI_DEVICE_ID_INTEL_ICH9DO 0x2914
49#define PCI_DEVICE_ID_INTEL_ICH9R 0x2916
50#define PCI_DEVICE_ID_INTEL_ICH9 0x2918
51#define PCI_DEVICE_ID_INTEL_ICH9M 0x2919
52#define PCI_DEVICE_ID_INTEL_ICH9ME 0x2917
Maciej Pijanka90d17402009-09-30 17:05:46 +000053#define PCI_DEVICE_ID_INTEL_ICH10R 0x3a16
Stefan Reinauer74cd56982010-06-01 10:04:28 +000054#define PCI_DEVICE_ID_INTEL_SCH_POULSBO_LPC 0x8119
Stefan Reinauer23190272008-08-20 13:41:24 +000055
Maciej Pijanka90d17402009-09-30 17:05:46 +000056#define PCI_DEVICE_ID_INTEL_82810 0x7120
57#define PCI_DEVICE_ID_INTEL_82810DC 0x7122
Joseph Smithe10757e2010-06-16 22:21:19 +000058#define PCI_DEVICE_ID_INTEL_82810E_MC 0x7124
Stefan Reinauer04844812010-02-22 11:26:06 +000059#define PCI_DEVICE_ID_INTEL_82830M 0x3575
Maciej Pijanka90d17402009-09-30 17:05:46 +000060#define PCI_DEVICE_ID_INTEL_82845 0x1a30
Pat Erleyca3548e2010-04-21 06:23:19 +000061#define PCI_DEVICE_ID_INTEL_82915 0x2580
Maciej Pijanka90d17402009-09-30 17:05:46 +000062#define PCI_DEVICE_ID_INTEL_82945P 0x2770
63#define PCI_DEVICE_ID_INTEL_82945GM 0x27a0
Björn Busse2d33dc42010-08-01 15:33:30 +000064#define PCI_DEVICE_ID_INTEL_82945GSE 0x27ac
Maciej Pijanka90d17402009-09-30 17:05:46 +000065#define PCI_DEVICE_ID_INTEL_PM965 0x2a00
Corey Osgood23d98c72010-07-29 19:25:31 +000066#define PCI_DEVICE_ID_INTEL_Q965 0x2990
Maciej Pijanka90d17402009-09-30 17:05:46 +000067#define PCI_DEVICE_ID_INTEL_82975X 0x277c
Loïc Grenié8429de72009-11-02 15:01:49 +000068#define PCI_DEVICE_ID_INTEL_82Q35 0x29b0
69#define PCI_DEVICE_ID_INTEL_82G33 0x29c0
70#define PCI_DEVICE_ID_INTEL_82Q33 0x29d0
Anton Kochkovda0b4562010-05-30 12:33:12 +000071#define PCI_DEVICE_ID_INTEL_GS45 0x2a40
Maciej Pijanka90d17402009-09-30 17:05:46 +000072#define PCI_DEVICE_ID_INTEL_X58 0x3405
Stefan Reinauer74cd56982010-06-01 10:04:28 +000073#define PCI_DEVICE_ID_INTEL_SCH_POULSBO 0x8100
Corey Osgood23d98c72010-07-29 19:25:31 +000074#define PCI_DEVICE_ID_INTEL_ATOM_DXXX 0xa000
75
76/* untested, but almost identical to D-series */
77#define PCI_DEVICE_ID_INTEL_ATOM_NXXX 0xa010
Maciej Pijanka90d17402009-09-30 17:05:46 +000078
79#define PCI_DEVICE_ID_INTEL_82443LX 0x7180
Maciej Pijanka90d17402009-09-30 17:05:46 +000080/* 82443BX has a different device ID if AGP is disabled (hardware-wise). */
81#define PCI_DEVICE_ID_INTEL_82443BX 0x7190
82#define PCI_DEVICE_ID_INTEL_82443BX_NO_AGP 0x7192
83
84/* 82371AB/EB/MB use the same device ID value. */
85#define PCI_DEVICE_ID_INTEL_82371XX 0x7110
Stefan Reinauer23190272008-08-20 13:41:24 +000086
87#define ARRAY_SIZE(a) ((int)(sizeof(a) / sizeof((a)[0])))
88
Stefan Reinauerf7f2f252009-09-01 09:52:14 +000089#ifndef __DARWIN__
Stefan Reinauer23190272008-08-20 13:41:24 +000090typedef struct { uint32_t hi, lo; } msr_t;
Stefan Reinauer1162f252008-12-04 15:18:20 +000091#endif
Stefan Reinauer23190272008-08-20 13:41:24 +000092typedef struct { uint16_t addr; int size; char *name; } io_register_t;
93
Stefan Reinauerf7f2f252009-09-01 09:52:14 +000094void *map_physical(unsigned long phys_addr, size_t len);
95void unmap_physical(void *virt_addr, size_t len);
Stefan Reinauer23190272008-08-20 13:41:24 +000096
97unsigned int cpuid(unsigned int op);
98int print_intel_core_msrs(void);
99int print_mchbar(struct pci_dev *nb);
100int print_pmbase(struct pci_dev *sb);
101int print_rcba(struct pci_dev *sb);
102int print_gpios(struct pci_dev *sb);
103int print_epbar(struct pci_dev *nb);
104int print_dmibar(struct pci_dev *nb);
105int print_pciexbar(struct pci_dev *nb);
106